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2016-02-29ARM: KVM: Add timer save/restoreMarc Zyngier3-0/+80
This patch shouldn't exist, as we should be able to reuse the arm64 version for free. I'll get there eventually, but in the meantime I need a timer ticking. Reviewed-by: Christoffer Dall <[email protected]> Signed-off-by: Marc Zyngier <[email protected]>
2016-02-29ARM: KVM: Add CP15 save/restore codeMarc Zyngier3-0/+113
Concert the CP15 save/restore code to C. Reviewed-by: Christoffer Dall <[email protected]> Signed-off-by: Marc Zyngier <[email protected]>
2016-02-29ARM: KVM: Add TLB invalidation codeMarc Zyngier4-0/+81
Convert the TLB invalidation code to C, hooking it into the build system whilst we're at it. Signed-off-by: Marc Zyngier <[email protected]>
2016-02-29ARM: KVM: Add system register accessor macrosMarc Zyngier1-0/+15
In order to move system register (CP15, mostly) access to C code, add a few macros to facilitate this, and minimize the difference between 32 and 64bit CP15 registers. This will get heavily used in the following patches. Acked-by: Christoffer Dall <[email protected]> Signed-off-by: Marc Zyngier <[email protected]>
2016-02-29ARM: KVM: Add a HYP-specific header fileMarc Zyngier1-0/+30
In order to expose the various HYP services that are private to the hypervisor, add a new hyp.h file. So far, it only contains mundane things such as section annotation and VA manipulation. Acked-by: Christoffer Dall <[email protected]> Signed-off-by: Marc Zyngier <[email protected]>
2016-02-29ARM: KVM: Move GP registers into the CPU context structureMarc Zyngier7-24/+34
Continuing our rework of the CPU context, we now move the GP registers into the CPU context structure. Reviewed-by: Christoffer Dall <[email protected]> Signed-off-by: Marc Zyngier <[email protected]>
2016-02-29ARM: KVM: Move CP15 array into the CPU context structureMarc Zyngier8-42/+43
Continuing our rework of the CPU context, we now move the CP15 array into the CPU context structure. As this causes quite a bit of churn, we introduce the vcpu_cp15() macro that abstract the location of the actual array. This will probably help next time we have to revisit that code. Reviewed-by: Christoffer Dall <[email protected]> Signed-off-by: Marc Zyngier <[email protected]>
2016-02-29ARM: KVM: Move VFP registers to a CPU context structureMarc Zyngier4-20/+26
In order to turn the WS code into something that looks a bit more like the arm64 version, move the VFP registers into a CPU context container for both the host and the guest. Reviewed-by: Christoffer Dall <[email protected]> Signed-off-by: Marc Zyngier <[email protected]>
2016-02-29ARM: KVM: Remove __kvm_hyp_code_start/__kvm_hyp_code_endMarc Zyngier2-4/+1
Now that we've unified the way we refer to the HYP text between arm and arm64, drop __kvm_hyp_code_start/end, and just use the __hyp_text_start/end symbols. Acked-by: Christoffer Dall <[email protected]> Signed-off-by: Marc Zyngier <[email protected]>
2016-02-29ARM: KVM: Move the HYP code to its own sectionMarc Zyngier4-10/+19
In order to be able to spread the HYP code into multiple compilation units, adopt a layout similar to that of arm64: - the HYP text is emited in its own section (.hyp.text) - two linker generated symbols are use to identify the boundaries of that section No functionnal change. Acked-by: Christoffer Dall <[email protected]> Signed-off-by: Marc Zyngier <[email protected]>
2016-02-29arm/arm64: KVM: Add hook for C-based stage2 initMarc Zyngier2-0/+5
As we're about to move the stage2 init to C code, introduce some C hooks that will later be populated with arch-specific implementations. Reviewed-by: Christoffer Dall <[email protected]> Signed-off-by: Marc Zyngier <[email protected]>
2016-02-29Merge tag 'renesas-dt2-for-v4.6' of ↵Arnd Bergmann8-34/+202
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt Merge "Second Round of Renesas ARM Based SoC DT Updates for v4.6" from Simon Horman: * Add L2 cache-controller nodes to r8a779[0134] and r8a73a4 * Add etheravb support to r8a7794 * Correct JP3 jumper description on Porter * Enable thermal zone on r8a779[013] * Replace gpio-key, wakeup with wakeup-source property on r8a7794 * Use demuxer for IIC0/I2C0 on lager * Use fallback etheravb, pci and pcie compatibility strings as appropriate * tag 'renesas-dt2-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: dts: r8a7790: use fallback etheravb compatibility string ARM: dts: r8a7790: lager: use demuxer for IIC0/I2C0 ARM: dts: r8a7794: add EtherAVB support ARM: dts: r8a7794: add EtherAVB clock ARM: dts: r8a7794: replace gpio-key, wakeup with wakeup-source property ARM: dts: r8a7794: Add L2 cache-controller node ARM: dts: r8a7793: Add L2 cache-controller node ARM: dts: r8a7791: Add L2 cache-controller node ARM: dts: r8a7790: Add L2 cache-controller nodes ARM: dts: r8a73a4: Add L2 cache-controller nodes ARM: dts: r8a7793: enable to use thermal-zone ARM: dts: r8a7791: enable to use thermal-zone ARM: dts: r8a7790: enable to use thermal-zone ARM: dts: porter: fix JP3 jumper description ARM: dts: r8a7794: use fallback pci compatibility string ARM: dts: r8a7791: use fallback pci compatibility string ARM: dts: r8a7790: use fallback pci compatibility string ARM: dts: r8a7791: use fallback pcie compatibility string ARM: dts: r8a7790: use fallback pcie compatibility string
2016-02-29arm/arm64: KVM: Fix ioctl error handlingMichael S. Tsirkin1-1/+1
Calling return copy_to_user(...) in an ioctl will not do the right thing if there's a pagefault: copy_to_user returns the number of bytes not copied in this case. Fix up kvm to do return copy_to_user(...)) ? -EFAULT : 0; everywhere. Cc: [email protected] Acked-by: Christoffer Dall <[email protected]> Signed-off-by: Michael S. Tsirkin <[email protected]> Signed-off-by: Marc Zyngier <[email protected]>
2016-02-29Merge branch 'sched/urgent' into sched/core, to pick up fixes before ↵Ingo Molnar55-269/+429
applying new changes Signed-off-by: Ingo Molnar <[email protected]>
2016-02-29ARM: dts: vfxxx: Add DAC node for Vybrid SoCSanchayan Maity1-0/+18
Add a device tree node entry for DAC peripheral on Vybrid SoC. Signed-off-by: Sanchayan Maity <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2016-02-29ARM: dts: imx6q: add missing links between ipu2 and mipi dsiPhilipp Zabel1-0/+2
The backlinks are already there since commit 4520e69238b3 ("ARM: dts: imx6qdl: Add IPU DI ports and endpoints, move imx-drm node to dtsi") and were moved by commit 70c2652c6c5b ("ARM: dts: imx6qdl: Move existing MIPI DSI ports into a new 'ports' node"), but the links from IPU2 DI0/1 to the MIPI DSI mux are missing. Fix this. Signed-off-by: Philipp Zabel <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2016-02-29ARM: dts: imx: Add support for Advantech/GE B850v3Akshay Bhat2-0/+158
Add support for Advantech/GE B850v3 board. Signed-off-by: Akshay Bhat <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2016-02-29ARM: dts: imx: Add support for Advantech/GE B650v3Akshay Bhat2-0/+89
Add support for Advantech/GE B650v3 board. Signed-off-by: Akshay Bhat <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2016-02-29ARM: dts: imx: Add support for Advantech/GE B450v3Akshay Bhat2-0/+89
Add support for Advantech/GE B450v3 board. Signed-off-by: Akshay Bhat <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2016-02-29ARM: dts: imx: Add support for Advantech/GE Bx50v3Justin Waters1-0/+225
Advantech has 3 carrier boards (B450v3, B650v3, B850v3) which use the Advantech BA-16 module (based on iMX6D). This file has the devicetree entries that are common to all 3 boards. Signed-off-by: Akshay Bhat <[email protected]> Signed-off-by: Justin Waters <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2016-02-29ARM: dts: imx: Add Advantech BA-16 Qseven moduleJustin Waters1-0/+632
Add support for Advantech BA-16 module based on iMX6D processor Basic information about the module: - Module manufacturer: Advantech - CPU: Freescale ARM Cortex-A9 i.MX6 - SPECS: Up to 2GB Onboard DDR3 Memory; Up to 16GB Onboard eMMC NAND Flash Supports OpenGL ES 2.0 and OpenVG 1.1 HDMI, 24-bit LVDS 1x UART, 2x I2C, 8x GPIO, 4x Host USB 2.0 port, 1x USB OTG port, 1x micro SD (SDHC),1x SDIO, 1x SATA II, 1x 10/100/1000 Mbps Ethernet, 1x PCIe X1 Gen2 - Website: http://goo.gl/JED98U Signed-off-by: Akshay Bhat <[email protected]> Signed-off-by: Justin Waters <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2016-02-29ARM: dts: imx35.dtsi: change the clock information for usbPeter Chen1-4/+4
For imx35, it needs three clocks to let the controller work, the old code is wrong, and the usbmisc does not include clock handling code any more. Signed-off-by: Peter Chen <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2016-02-29ARM: dts: imx25.dtsi: change the clock information for usbPeter Chen1-4/+4
For imx25, it needs three clocks to let the controller work, the old code is wrong, and usbmisc has not included clock handling code any more. Tested-by: Fabio Estevam <[email protected]> Signed-off-by: Peter Chen <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2016-02-29ARM: dts: imx6ul: add kpp supportLothar Waßmann1-0/+8
This patch adds the device node for the i.MX6UL keypad controller. Signed-off-by: Lothar Waßmann <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2016-02-29ARM: dts: imx6ul: add gpmi supportLothar Waßmann1-0/+33
Add the device node for the i.MX6UL GPMI interface and the related APBH DMA which is necessary for the GPMI to work properly. Signed-off-by: Lothar Waßmann <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2016-02-29ARM: dts: imx6ul: add lcdif supportLothar Waßmann1-0/+11
Add the device node for the i.MX6UL eLCDIF interface. Signed-off-by: Lothar Waßmann <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2016-02-29ARM: dts: imx6ul: add sai supportLothar Waßmann1-0/+45
Add device nodes for the i.MX6UL synchronous audio interfaces (SAI). Signed-off-by: Lothar Waßmann <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2016-02-29ARM: dts: imx6ul: add flexcan supportLothar Waßmann1-0/+20
Add device nodes for the i.MX6UL flexcan interfaces. Signed-off-by: Lothar Waßmann <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2016-02-29ARM: dts: imx6ul: add sdma supportLothar Waßmann1-0/+12
Add device node for the i.MX6UL SDMA unit. Signed-off-by: Lothar Waßmann <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2016-02-29ARM: dts: imx6ul: add pwm[1-4] nodesLothar Waßmann1-0/+44
Add device nodes for the PWM uinits 1..4 which were missing in the original commit for i.MX6UL support. Signed-off-by: Lothar Waßmann <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2016-02-29ARM: dts: imx6ul: disable PWMs by defaultLothar Waßmann1-0/+4
Since PWMs are only useful if they are actually connected to an output pin, let users enable them explicitly in their device trees where they should also set up the pin configuration. This is in sync with a recent change (commit e2675266b39b "ARM: dts: imx6qdl: disable PWMs by default") to other i.MX SoCs. Signed-off-by: Lothar Waßmann <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2016-02-29ARM: dts: imx6ul: specify proper clocks for the PWM nodesLothar Waßmann1-8/+8
i.MX6UL PWMs require real clocks. Define the appropriate clocks for the PWM units. Signed-off-by: Lothar Waßmann <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2016-02-29ARM: dts: imx6ul: specify proper clocks for GPT nodeLothar Waßmann1-2/+2
The i.MX6UL GPT unit requires real clocks. Define the appropriate clocks to make it work. Signed-off-by: Lothar Waßmann <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2016-02-29ARM: dts: imx6ul: move dt-bindings/input/input.h include to dtsi fileLothar Waßmann2-1/+1
imx6ul.dtsi references the macro 'KEY_POWER' from dt-bindings/input/input.h. Thus, move the include statement for this file from imx6ul-14x14-evk.dts to imx6ul.dtsi itself. Signed-off-by: Lothar Waßmann <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2016-02-29ARM: dts: imx6ul: move tsc node to appropriate place in the DTBLothar Waßmann1-11/+11
Move the tsc node to keep the nodes sorted in ascending order by unit address. Signed-off-by: Lothar Waßmann <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2016-02-29ARM: dts: imx51: remove bogus pin definitionLothar Waßmann1-1/+0
Pad DISPB2_SER_RS has no function DISP1_EXT_CLK. The definition is obviusly a copy/paste error from MX51_PAD_DISPB2_SER_RS__DISP1_PIN16. Signed-off-by: Lothar Waßmann <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2016-02-29ARM: dts: imx6ul: add missing input_sel config for various pinsLothar Waßmann1-45/+45
Various pads are missing the input_sel offset and value. Fix this. Signed-off-by: Lothar Waßmann <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2016-02-29ARM: dts: imx6ul: whitespace cleanup; no functional changeLothar Waßmann1-918/+918
Remove whitespace before TAB in indentation and reduce indentation level to improve readability. Signed-off-by: Lothar Waßmann <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2016-02-29ARM: dts: colibri-vf: Add pinmux for UART_0 aka UART_A RTS/CTS pinsBhuvanchandra DV1-0/+2
Add pinmux for UART_A RTS, CTS pin's. Signed-off-by: Bhuvanchandra DV <[email protected]> Acked-by: Stefan Agner <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2016-02-29ARM: dts: vf610: add performance monitoring unitStefan Agner1-0/+9
All Freescale Vybrid SoC include a Cortex-A5 core which supports ARM's standard PMU (performance monitoring unit). Include the monitoring unit into the Cortex-A5 base device tree vf500.dtsi. Signed-off-by: Stefan Agner <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2016-02-29ARM: dts: vf-colibri: disable write-protection for SD-cardStefan Agner1-0/+1
The Colibri standard does not define a pin for SD-Card write- protection. Use the disable-wp property to indicate that there is no physical WP line present. Signed-off-by: Stefan Agner <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2016-02-29ARM: dts: imx6: Use correct SDMA script for SPI coresSascha Hauer1-4/+4
According to the reference manual the shp_2_mcu / mcu_2_shp scripts must be used for devices connected through the SPBA. This fixes an issue we saw with DMA transfers from SPI NOR Flashes. Sometimes the SPI controller RX FIFO was not empty after a DMA transfer and the driver got stuck in the next PIO transfer when it read one word more than expected. Signed-off-by: Sascha Hauer <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2016-02-29ARM: dts: vf-colibri: add carrier boards 3.3V supplyStefan Agner1-0/+12
Add the carrier boards 3.3V supply as fixed regulator. This allows to specify the power supply for nodes like backlight. Signed-off-by: Stefan Agner <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2016-02-29ARM: dts: vf-colibri: add basic supply regulatorsStefan Agner1-0/+17
Colibri modules need to be powered using the power pins 3V3 and AVDD_AUDIO. Add fixed regulators which represent this power rails. Potentially, those power rails could be switched on a carrier board. A carrier board device tree could add a own regulator with a GPIO, and reference that regulator in a vin-supply property of those new module level system regulators. Signed-off-by: Stefan Agner <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2016-02-29ARM: dts: vf-colibri: remove regulator container nodeStefan Agner1-26/+16
Drop the fake simple-bus container 'regulators' and put the regulators directly under the root node. This also makes the artificial 'reg' properties superfluous. While at it, remove the unnecessary regulator-always-on property and name the regulators according to schematics. Signed-off-by: Stefan Agner <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2016-02-29ARM: dts: vf-colibri: assign Ethernet clock explicitlyStefan Agner1-0/+7
Assign Ethernet clock parents explicitly. The Colibri VF61 uses the 50MHz Ethernet clock provided by PLL5. The Vybrid SoC has two ethernet interfaces (fec0 and fec1) which use the same clock source (VF610_CLK_ENET). Therefore this parent configuration affects multiple consumer devices and need to be specified in the clock provider node. Signed-off-by: Stefan Agner <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2016-02-29ARM: dts: vf610twr: assign Ethernet clock explicitlyStefan Agner1-0/+4
Assign Ethernet clock parents explicitly. The VF610 Tower Board uses the external Ethernet clock input which is connected to a 50MHz clock. The Vybrid SoC has two ethernet interfaces (fec0 and fec1) which use the same clock source (VF610_CLK_ENET). Therefore this parent configuration affects multiple consumer devices and need to be specified in the clock provider node. Signed-off-by: Stefan Agner <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2016-02-29ARM: dts: imx6q-tbs2910: remove artificial simple-bus for regulatorsSoeren Moch1-26/+17
Signed-off-by: Soeren Moch <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2016-02-29ARM: dts: imx6q-tbs2910: remove unnecessary iomuxc container nodesSoeren Moch1-134/+128
Remove the following unnecessary iomuxc container nodes: imx6q-tbs2910 gpio_fan gpio_leds Sort the pinctrl nodes alphabetically. Signed-off-by: Soeren Moch <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2016-02-29ARM: dts: imx6q-tbs2910: avoid sdhci boot warningsSoeren Moch1-0/+9
Avoid the following warnings (example for usdhc2): /soc/aips-bus@02100000/usdhc@02194000: voltage-ranges unspecified sdhci-esdhc-imx 2194000.usdhc: could not get ultra high speed state, work on normal mode sdhci-esdhc-imx 2194000.usdhc: No vqmmc regulator found Signed-off-by: Soeren Moch <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
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