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2018-09-14ARM: dts: sunxi: Fix I2C bus warningsRob Herring3-3/+5
dtc has new checks for I2C buses. Fix the warnings in unit-addresses. arch/arm/boot/dts/sun8i-a23-gt90h-v4.dtb: Warning (i2c_bus_reg): /soc@1c00000/i2c@1c2ac00/touchscreen@0: I2C bus unit address format error, expected "40" arch/arm/boot/dts/sun8i-a23-inet86dz.dtb: Warning (i2c_bus_reg): /soc@1c00000/i2c@1c2ac00/touchscreen@0: I2C bus unit address format error, expected "40" arch/arm/boot/dts/sun8i-a23-polaroid-mid2407pxe03.dtb: Warning (i2c_bus_reg): /soc@1c00000/i2c@1c2ac00/touchscreen@0: I2C bus unit address format error, expected "40" arch/arm/boot/dts/sun8i-a23-polaroid-mid2809pxe04.dtb: Warning (i2c_bus_reg): /soc@1c00000/i2c@1c2ac00/touchscreen@0: I2C bus unit address format error, expected "40" arch/arm/boot/dts/sun8i-a33-ga10h-v1.1.dtb: Warning (i2c_bus_reg): /soc@1c00000/i2c@1c2ac00/touchscreen@0: I2C bus unit address format error, expected "40" arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dtb: Warning (i2c_bus_reg): /soc@1c00000/i2c@1c2ac00/touchscreen@0: missing or empty reg property arch/arm/boot/dts/sun8i-a33-ippo-q8h-v1.2.dtb: Warning (i2c_bus_reg): /soc@1c00000/i2c@1c2ac00/touchscreen@0: missing or empty reg property arch/arm/boot/dts/sun8i-a33-q8-tablet.dtb: Warning (i2c_bus_reg): /soc@1c00000/i2c@1c2ac00/touchscreen@0: missing or empty reg property arch/arm/boot/dts/sun5i-a13-utoo-p66.dtb: Warning (i2c_bus_reg): /soc@1c00000/i2c@1c2b000/touchscreen: I2C bus unit address format error, expected "40" arch/arm/boot/dts/sun5i-a13-difrnce-dit4350.dtb: Warning (i2c_bus_reg): /soc@1c00000/i2c@1c2b000/touchscreen: missing or empty reg property arch/arm/boot/dts/sun5i-a13-empire-electronix-m712.dtb: Warning (i2c_bus_reg): /soc@1c00000/i2c@1c2b000/touchscreen: missing or empty reg property arch/arm/boot/dts/sun5i-a13-inet-98v-rev2.dtb: Warning (i2c_bus_reg): /soc@1c00000/i2c@1c2b000/touchscreen: missing or empty reg property arch/arm/boot/dts/sun5i-a13-q8-tablet.dtb: Warning (i2c_bus_reg): /soc@1c00000/i2c@1c2b000/touchscreen: missing or empty reg property Cc: Maxime Ripard <[email protected]> Cc: Chen-Yu Tsai <[email protected]> Signed-off-by: Rob Herring <[email protected]> Signed-off-by: Chen-Yu Tsai <[email protected]>
2018-09-13ARM: dts: socfpga: Fix I2C bus unit-address errorDinh Nguyen1-1/+1
dtc has new checks for I2C buses. Fix the warnings in unit-addresses. arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dtb: Warning (i2c_bus_reg): /soc/i2c@ffc04000/adxl345@0: I2C bus unit address format error, expected "53" Signed-off-by: Rob Herring <[email protected]> Signed-off-by: Dinh Nguyen <[email protected]>
2018-09-14ARM: dts: aspeed: quanta-q71l: Enable adc & ibt nodesPatrick Venture1-0/+8
This machine uses the ADC and iBT devices. Signed-off-by: Patrick Venture <[email protected]> Signed-off-by: Joel Stanley <[email protected]>
2018-09-14ARM: dts: aspeed: quanta-q71l: Add four PSUsPatrick Venture1-0/+20
Enable the four PSUs via generic PMBUS. Signed-off-by: Patrick Venture <[email protected]> Signed-off-by: Joel Stanley <[email protected]>
2018-09-14ARM: dts: aspeed: quanta-q71l: add aliases for i2cPatrick Venture1-0/+19
Provide aliases to each i2c bus per labels added for each PCIe slot, etc, that are downstream beyond a mux. Signed-off-by: Patrick Venture <[email protected]> Signed-off-by: Joel Stanley <[email protected]>
2018-09-14ARM: dts: aspeed: Fix I2C bus warningsRob Herring2-2/+2
dtc has new checks for I2C buses. The ASpeed dts files have a node named 'i2c' which causes a false positive warning. As the node is a 'simple-bus', correct the node name to be 'bus' to fix the warnings. arch/arm/boot/dts/aspeed-bmc-opp-lanyang.dtb: Warning (i2c_bus_bridge): /ahb/apb/i2c@1e78a000: incorrect #size-cells for I2C bus arch/arm/boot/dts/aspeed-bmc-opp-romulus.dtb: Warning (i2c_bus_bridge): /ahb/apb/i2c@1e78a000: incorrect #size-cells for I2C bus arch/arm/boot/dts/aspeed-ast2500-evb.dtb: Warning (i2c_bus_bridge): /ahb/apb/i2c@1e78a000: incorrect #size-cells for I2C bus arch/arm/boot/dts/aspeed-bmc-arm-centriq2400-rep.dtb: Warning (i2c_bus_bridge): /ahb/apb/i2c@1e78a000: incorrect #size-cells for I2C bus arch/arm/boot/dts/aspeed-bmc-intel-s2600wf.dtb: Warning (i2c_bus_bridge): /ahb/apb/i2c@1e78a000: incorrect #size-cells for I2C bus arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dtb: Warning (i2c_bus_bridge): /ahb/apb/i2c@1e78a000: incorrect #size-cells for I2C bus arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dtb: Warning (i2c_bus_bridge): /ahb/apb/i2c@1e78a000: incorrect #size-cells for I2C bus arch/arm/boot/dts/aspeed-bmc-opp-zaius.dtb: Warning (i2c_bus_bridge): /ahb/apb/i2c@1e78a000: incorrect #size-cells for I2C bus arch/arm/boot/dts/aspeed-bmc-portwell-neptune.dtb: Warning (i2c_bus_bridge): /ahb/apb/i2c@1e78a000: incorrect #size-cells for I2C bus arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dtb: Warning (i2c_bus_bridge): /ahb/apb/i2c@1e78a000: incorrect #size-cells for I2C bus Cc: Joel Stanley <[email protected]> Cc: Andrew Jeffery <[email protected]> Cc: [email protected] Signed-off-by: Rob Herring <[email protected]> Signed-off-by: Joel Stanley <[email protected]>
2018-09-13ARM: dts: bcm: Fix SPI bus warningsRob Herring2-2/+2
dtc has new checks for SPI buses. Fix the warnings in node names. arch/arm/boot/dts/bcm53340-ubnt-unifi-switch8.dtb: Warning (spi_bus_bridge): /axi@18000000/qspi@27200: node name for SPI buses should be 'spi' arch/arm/boot/dts/bcm958525er.dtb: Warning (spi_bus_bridge): /axi/qspi@27200: node name for SPI buses should be 'spi' arch/arm/boot/dts/bcm958525xmc.dtb: Warning (spi_bus_bridge): /axi/qspi@27200: node name for SPI buses should be 'spi' arch/arm/boot/dts/bcm958622hr.dtb: Warning (spi_bus_bridge): /axi/qspi@27200: node name for SPI buses should be 'spi' arch/arm/boot/dts/bcm958625hr.dtb: Warning (spi_bus_bridge): /axi/qspi@27200: node name for SPI buses should be 'spi' arch/arm/boot/dts/bcm988312hr.dtb: Warning (spi_bus_bridge): /axi/qspi@27200: node name for SPI buses should be 'spi' Cc: Ray Jui <[email protected]> Cc: Scott Branden <[email protected]> Cc: Jon Mason <[email protected]> Cc: [email protected] Signed-off-by: Rob Herring <[email protected]> Signed-off-by: Florian Fainelli <[email protected]>
2018-09-13ARM: qcom_defconfig: Enable MAILBOXFrank Rowand1-0/+1
Problem: ab460a2e72da ("rpmsg: qcom_smd: Access APCS through mailbox framework" added a "depends on MAILBOX") to RPMSG_QCOM_SMD, thus RPMSG_QCOM_SMD becomes unset since MAILBOX was not enabled in qcom_defconfig and is not otherwise selected for the dragonboard. When the resulting kernel is booted the mmc device which contains the root file system is not available. Fix: add CONFIG_MAILBOX to qcom_defconfig Fixes: ab460a2e72da ("rpmsg: qcom_smd: Access APCS through mailbox framework" added a "depends on MAILBOX") Signed-off-by: Frank Rowand <[email protected]> Reviewed-by: Bjorn Andersson <[email protected]> Signed-off-by: Andy Gross <[email protected]>
2018-09-13ARM: dts: qcom: ipq4019: fix space vs tab indenting inside qcom-ipq4019.dtsiJohn Crispin1-38/+38
There are various places inside this dtsi file where 8 spaces where used for indenting instead of tabs. Signed-off-by: John Crispin <[email protected]> Signed-off-by: Andy Gross <[email protected]>
2018-09-13ARM: dts: qcom: ipq4019: fix PCI rangeMathias Kresin1-1/+1
The PCI range is invalid and PCI attached devices doen't work. Signed-off-by: Mathias Kresin <[email protected]> Signed-off-by: John Crispin <[email protected]> Signed-off-by: Andy Gross <[email protected]>
2018-09-13ARM: dts: qcom: ipq4019: fix cpu0's qcom,saw2 reg valueChristian Lamparter1-1/+1
while compiling an ipq4019 target, dtc will complain: regulator@b089000 unit address format error, expected "2089000" The saw0 regulator reg value seems to be copied and pasted from qcom-ipq8064.dtsi. This patch fixes the reg value to match that of the unit address which in turn silences the warning. (There is no driver for qcom,saw2 right now. So this went unnoticed) Signed-off-by: Christian Lamparter <[email protected]> Signed-off-by: John Crispin <[email protected]> Signed-off-by: Andy Gross <[email protected]>
2018-09-13ARM: dts: qcom: ipq4019: add cpu operating points for cpufreq supportMatthew McClintock1-28/+26
This adds some operating points for cpu frequeny scaling Signed-off-by: Matthew McClintock <[email protected]> Signed-off-by: John Crispin <[email protected]> Signed-off-by: Andy Gross <[email protected]>
2018-09-13ARM: dts: qcom: ipq4019: use v2 of the kpss bringup mechanismMatthew McClintock1-8/+17
v1 was the incorrect choice here and sometimes the board would not come up properly. Signed-off-by: Matthew McClintock <[email protected]> Signed-off-by: Christian Lamparter <[email protected]> Signed-off-by: John Crispin <[email protected]> Signed-off-by: Andy Gross <[email protected]>
2018-09-13ARM: dts: qcom: msm8974-hammerhead: add device tree bindings for ALS / proximityBrian Masney2-0/+38
This patch adds device tree bindings for the tsl2772 ALS / proximity sensor for the LG Nexus 5 (hammerhead) phone. Signed-off-by: Brian Masney <[email protected]> Signed-off-by: Jonathan Marek <[email protected]> Acked-by: Jonathan Cameron <[email protected]> Signed-off-by: Andy Gross <[email protected]>
2018-09-13ARM: dts: qcom: msm8974-hammerhead: add device tree bindings for mpu6515Brian Masney2-0/+67
This patch adds device tree bindings for the mpu6515 to the LG Nexus 5 (hammerhead) phone. Confirmed that the gyroscope / accelerometer (mpu6515), magnetometer (ak8963), and temperature / pressure (bmp280) sensors are available on the phone. Interrupts are not working properly on the ak8963 magnetometer so they are currently not configured. The bmp280 retuns temperature/pressure measurement skipped errors but will reliably work if I run: echo 1 > in_pressure_oversampling_ratio echo 1 > in_temp_oversampling_ratio Signed-off-by: Brian Masney <[email protected]> Signed-off-by: Jonathan Marek <[email protected]> Signed-off-by: Andy Gross <[email protected]>
2018-09-13ARM: dts: qcom: Add led and gpio-button nodes to ipq8064 boardsSricharan R3-0/+87
Add the dt nodes for enabling the leds and gpio-buttons. Signed-off-by: Sricharan R <[email protected]> Signed-off-by: Andy Gross <[email protected]>
2018-09-13ARM: dts: qcom: Move common nodes to ipq8064-v.1.0.dtsiSricharan R3-80/+77
The nodes in ipq8064-ap148.dts currently are common with boards that we will add next. So move the common data to ipq8064-v.1.0.dtsi. Signed-off-by: Sricharan R <[email protected]> Signed-off-by: Andy Gross <[email protected]>
2018-09-13ARM: dts: qcom: Add sdcc nodes for ipq8064Sricharan R1-0/+76
The relevant data for sdcc. Signed-off-by: Sricharan R <[email protected]> Signed-off-by: Andy Gross <[email protected]>
2018-09-13ARM: dts: qcom: Add pcie nodes for ipq8064Sricharan R1-0/+182
Adding the pcie nodes and pins. Signed-off-by: Sricharan R <[email protected]> Signed-off-by: Andy Gross <[email protected]>
2018-09-13ARM: dts: qcom-msm8974: change invalid flag IRQ NONE to valid valueFrank Rowand1-13/+13
Change the third field of the "interrupts" property from IRQ_TYPE_NONE to the correct value. I do not have hardware documentation for these devices, so I followed a mail list suggestion to copy the flag values from the same type of node in arch/arm64/boot/dts/qcom/msm8916.dtsi Signed-off-by: Frank Rowand <[email protected]> Signed-off-by: Andy Gross <[email protected]>
2018-09-13ARM: dts: qcom-msm8974: use named constant for interrupt flag NONEFrank Rowand1-8/+8
Cosmetic change of integer value "0" in the third field of the "interrupts" property to the correct named constant. Signed-off-by: Frank Rowand <[email protected]> Signed-off-by: Andy Gross <[email protected]>
2018-09-13ARM: dts: qcom-msm8974: use named constant for interrupt flag LEVEL HIGHFrank Rowand1-8/+8
Cosmetic change of integer value "4" in the third field of the "interrupts" property to the correct named constant. Signed-off-by: Frank Rowand <[email protected]> Signed-off-by: Andy Gross <[email protected]>
2018-09-13ARM: dts: qcom-msm8974: use named constant for interrupt flag EDGE RISINGFrank Rowand1-1/+1
Cosmetic change of integer value "1" in the third field of the "interrupts" property to the correct named constant. Signed-off-by: Frank Rowand <[email protected]> Signed-off-by: Andy Gross <[email protected]>
2018-09-13ARM: dts: qcom-msm8974: use named constant for interrupt type GIC_SPIFrank Rowand1-27/+29
Cosmetic change of integer value "0" in the first field of the "interrupts" property to the correct named constant. Signed-off-by: Frank Rowand <[email protected]> Signed-off-by: Andy Gross <[email protected]>
2018-09-13ARM: dts: qcom-msm8974: use named constant for interrupt type GIC_PPIFrank Rowand1-6/+6
Cosmetic change of integer value "1" in the first field of the "interrupts" property to the correct named constant. Signed-off-by: Frank Rowand <[email protected]> Signed-off-by: Andy Gross <[email protected]>
2018-09-13Merge tag 'tags/bcm2835-dt-next-2018-09-09' into devicetree/nextFlorian Fainelli4-0/+154
This pull request brings in a board DT for the Raspberry Pi Compute Module 3, its I/O board and enables the Ethernet LEDs for the RPi 3B+. Signed-off-by: Florian Fainelli <[email protected]>
2018-09-13ARM: dts: NSP: Wire up switch interruptsFlorian Fainelli1-1/+30
The Switch Register Access Block (SRAB) has one interrupt for link state change on each ports (0-5, 7-8) a PHY interrupt, timestamping interrupt and sleep timer interrupts for each management ports (5,7,8). Wire those up so we can utilize them to speed up link resolution. Signed-off-by: Florian Fainelli <[email protected]>
2018-09-13ARM: dts: NSP: Enable SFP on bcm958625hrFlorian Fainelli1-0/+26
Enable the SFP connected to port 5 of the switch and wire up all GPIOs to the SFP cage. Because of a hardware limitation of the i2c controller on the iProc SoCs which prevents large i2c (> 63 bytes) transactions to work, we use the i2c-gpio interface instead, which does not have that limitation. This allows us to read the SFP module EEPROM, which would not be possible otherwise since it exceeds that size during a single read transfer. Signed-off-by: Florian Fainelli <[email protected]> Reviewed-by: Ray Jui <[email protected]>
2018-09-12ARM: dts: at91: sama5d2_ptc_ek: fix nand pinctrlLudovic Desroches1-0/+2
The drive strength has to be set to medium otherwise some data corruption may happen. Signed-off-by: Ludovic Desroches <[email protected]> Acked-by: Nicolas Ferre <[email protected]> Signed-off-by: Alexandre Belloni <[email protected]>
2018-09-12ARM: dts: at91: sama5d4: add labels to soc dtsi for derivative boardsEugen Hristev1-4/+4
This adds labels to commonly used device-tree nodes so that derivative boards can avoid ahb/apb hierarchy. Signed-off-by: Eugen Hristev <[email protected]> Acked-by: Ludovic Desroches <[email protected]> Signed-off-by: Alexandre Belloni <[email protected]>
2018-09-12ARM: dts: imx53-qsb: disable 1.2GHz OPPSascha Hauer1-0/+11
The maximum CPU frequency for the i.MX53 QSB is 1GHz, so disable the 1.2GHz OPP. This makes the board work again with configs that have cpufreq enabled like imx_v6_v7_defconfig on which the board stopped working with the addition of cpufreq-dt support. Fixes: 791f416608 ("ARM: dts: imx53: add cpufreq-dt support") Signed-off-by: Sascha Hauer <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2018-09-12ARM: dts: imx6ul: Add DTS for ConnectCore 6UL SBC ProAlex Gonzalez2-0/+391
The ConnectCore 6UL Single Board Computer (SBC) Pro contains the ConnectCore 6UL System-On-Module. Its hardware specifications are: * 256MB DDR3 memory * On module 256MB NAND flash * Dual 10/100 Ethernet * USB Host and USB OTG * Parallel RGB display header * LVDS display header * CSI camera * GPIO header * I2C, SPI, CAN headers * PCIe mini card and micro SIM slot * MicroSD external storage * On board 4GB eMMC flash * Audio headphone, line in/out, microphone lines Signed-off-by: Alex Gonzalez <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2018-09-12ARM: imx6: register pm_power_off handler if "fsl,pmic-stby-poweroff" is setOleksij Rempel1-0/+25
One of the Freescale recommended sequences for power off with external PMIC is the following: ... 3. SoC is programming PMIC for power off when standby is asserted. 4. In CCM STOP mode, Standby is asserted, PMIC gates SoC supplies. See: http://www.nxp.com/assets/documents/data/en/reference-manuals/IMX6DQRM.pdf page 5083 This patch implements step 4. of this sequence. Signed-off-by: Oleksij Rempel <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2018-09-12ARM: dts: imx6: RIoTboard provide standby on power off optionOleksij Rempel1-0/+5
This board, as well as some other boards with i.MX6 and a PMIC, uses a "PMIC_STBY_REQ" line to notify the PMIC about a state change. The PMIC is programmed for a specific state change before triggering the line. In this case, PMIC_STBY_REQ can be used for stand by, sleep and power off modes. Signed-off-by: Oleksij Rempel <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2018-09-11ARM: shmobile: convert to SPDX identifiersKuninori Morimoto11-59/+14
This patch updates license to use SPDX-License-Identifier instead of verbose license text. Signed-off-by: Kuninori Morimoto <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2018-09-11ARM: dts: sun8i-a33: Add Video Engine and reserved memory nodesPaul Kocialkowski1-0/+26
This adds nodes for the Video Engine and the associated reserved memory for the A33. Up to 96 MiB of memory are dedicated to the CMA pool. The VPU can only map the first 256 MiB of DRAM, so the reserved memory pool has to be located in that area. Following Allwinner's decision in downstream software, the last 96 MiB of the first 256 MiB of RAM are reserved for this purpose. Signed-off-by: Paul Kocialkowski <[email protected]> Acked-by: Maxime Ripard <[email protected]> Signed-off-by: Maxime Ripard <[email protected]>
2018-09-11ARM: dts: sun7i-a20: Add Video Engine and reserved memory nodesPaul Kocialkowski1-0/+26
This adds nodes for the Video Engine and the associated reserved memory for the A20. Up to 96 MiB of memory are dedicated to the CMA pool. The VPU can only map the first 256 MiB of DRAM, so the reserved memory pool has to be located in that area. Following Allwinner's decision in downstream software, the last 96 MiB of the first 256 MiB of RAM are reserved for this purpose. Signed-off-by: Paul Kocialkowski <[email protected]> Acked-by: Maxime Ripard <[email protected]> Signed-off-by: Maxime Ripard <[email protected]>
2018-09-11ARM: dts: sun5i: Add Video Engine and reserved memory nodesPaul Kocialkowski1-0/+26
This adds nodes for the Video Engine and the associated reserved memory for sun5i-based platforms. Up to 96 MiB of memory are dedicated to the CMA pool. The VPU can only map the first 256 MiB of DRAM, so the reserved memory pool has to be located in that area. Following Allwinner's decision in downstream software, the last 96 MiB of the first 256 MiB of RAM are reserved for this purpose. Signed-off-by: Paul Kocialkowski <[email protected]> Acked-by: Maxime Ripard <[email protected]> Signed-off-by: Maxime Ripard <[email protected]>
2018-09-10ARM: s3c24xx: Correct SD card write protect detection on Mini2440Cedric Roux1-0/+1
The mini2440 computer uses "active high" to signal that the "write protect" of the inserted MMC is set. The current code uses the opposite, leading to a wrong detection of write protection. The solution is simply to use ".wprotect_invert = 1" in the description of the MMC. Signed-off-by: Cedric Roux <[email protected]> Signed-off-by: Krzysztof Kozlowski <[email protected]>
2018-09-10ARM: s3c24xx: Consistently use tab for indenting member assignmentsKrzysztof Kozlowski1-20/+20
Code was mixing spaces and tabs for indenting members in structures. Signed-off-by: Krzysztof Kozlowski <[email protected]>
2018-09-10ARM: s3c24xx: formatting cleanup in mach-mini2440.cCedric Roux1-37/+43
Running: scripts/checkpatch.pl -f arch/arm/mach-s3c24xx/mach-mini2440.c revealed several errors and warnings. They were all removed, except one which is an #if 0 around the declaration of a gpio pin. This needs some more investigation and I prefer to let it here. This is not some dead code. 'printk' was replaced by 'pr_info'. Signed-off-by: Cedric Roux <[email protected]> Signed-off-by: Krzysztof Kozlowski <[email protected]>
2018-09-10ARM: dts: exynos: Add external SD card support for Trats boardMarek Szyprowski1-0/+15
Enable support for SDHCI controller number 2 and add required regulator for external SD card. Signed-off-by: Marek Szyprowski <[email protected]> Signed-off-by: Krzysztof Kozlowski <[email protected]>
2018-09-10ARM: dts: exynos: Disable pull control for PMIC IRQ line on Artik5 boardMarek Szyprowski1-0/+7
S2MPS14 PMIC interrupt line on Exynos3250-based Artik5 evaluation board has external pull-up resistors, so disable any pull control for it in controller node. This fixes support for S2MPS14 PMIC interrupts and enables operation of wakeup from S2MPS14 RTC alarm. Signed-off-by: Marek Szyprowski <[email protected]> Signed-off-by: Krzysztof Kozlowski <[email protected]>
2018-09-10sched/topology, arch/arm: Rebuild sched_domain hierarchy when CPU capacity ↵Morten Rasmussen1-0/+3
changes Asymmetric CPU capacity can not necessarily be determined accurately at the time the initial sched_domain hierarchy is built during boot. It is therefore necessary to be able to force a full rebuild of the hierarchy later triggered by the arch_topology driver. A full rebuild requires the arch-code to implement arch_update_cpu_topology() which isn't yet implemented for arm. This patch points the arm implementation to arch_topology driver to ensure that full hierarchy rebuild happens when needed. Signed-off-by: Morten Rasmussen <[email protected]> Signed-off-by: Peter Zijlstra (Intel) <[email protected]> Cc: Linus Torvalds <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Russell King <[email protected]> Cc: Thomas Gleixner <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Ingo Molnar <[email protected]>
2018-09-10ARM: dts: imx6q-apalis: mux RESET_MOCI# signalStefan Agner4-4/+6
The pinctrl properties on the IOMUXC node get overwritten by the carrier board level device tree, hence the pinctrl_reset_moci pinctrl does not get applied. Associate the pinctrl_reset_moci pinctrl with the PCIe node where we also make use of the pin as a reset GPIO. Since the pin is muxed as a GPIO by default not muxing it explicitly worked fine in practise. Signed-off-by: Stefan Agner <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2018-09-10ARM: dts: imx6ul: Enable the PMU nodeFabio Estevam1-1/+0
There is no need to keep the PMU disabled. Enable it like it is done in the other i.MX dtsi files. With this change applied we see: [ 1.338866] hw perfevents: enabled with armv7_cortex_a7 PMU driver, 5 counters available Signed-off-by: Fabio Estevam <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2018-09-10ARM: dts: imx6qdl-sabreauto: add egalax touch screen supportAnson Huang1-0/+15
Add egalax touch screen support on i2c2 bus. Signed-off-by: Anson Huang <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2018-09-10ARM: dts: imx6qdl-sabreauto: add gpio keys supportAnson Huang1-0/+52
Add i.MX6QDL SabreAuto board's gpio keys support, there are 5 gpio keys on base board: SW3: KEY_HOME; SW4: KEY_BACK; SW5: KEY_PROGRAM; SW6: KEY_VOLUMEUP; SW7: KEY_VOLUMEDOWN; Signed-off-by: Anson Huang <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2018-09-10ARM: dts: vf610-zii-dev-rev-c: add support for one SFF moduleRussell King1-19/+25
The board typically has 2 populated SFF interfaces. The mv88e6xxx driver currently supports SFF modules connected to ports 9 and 10 of the mv88e6390. Add support for sff2, which is connected to port 9. Signed-off-by: Russell King <[email protected]> Signed-off-by: Andrew Lunn <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2018-09-10ARM: dts: vf610-zii-cfu1: Add SFF interface to switchAndrew Lunn1-0/+27
The switch has an SFF attached to port 5. Add the SFF device, the pinmux for its GPIOs, and list the port in the switch configuration. Signed-off-by: Andrew Lunn <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
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