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2018-09-20ARM: dts: am335x-shc: get rid of phy_id propertyGrygorii Strashko1-1/+0
The phy_id property is deprecated and phy-handle has to be used instead. Signed-off-by: Grygorii Strashko <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2018-09-20Merge branch 'am335x-evm-port-fix' into omap-for-v4.20/dtTony Lindgren1-6/+6
2018-09-20ARM: dts: am335x-evm: fix number of cpswGrygorii Strashko1-6/+6
am335x-evm has only one CPSW external port physically wired, but DT defines 2 ext. ports. As result, PHY connection failure reported for the second ext. port. Update DT to reflect am335x-evm board HW configuration, and, while here, switch to use phy-handle instead of phy_id. Signed-off-by: Grygorii Strashko <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2018-09-20ARM: OMAP1: ams-delta: Don't request unused GPIOsJanusz Krzysztofik1-39/+1
GPIOs with no kernel drivers can still be used from user space, don't request them from the board file. Signed-off-by: Janusz Krzysztofik <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2018-09-20ARM: OMAP1: ams-delta-fiq: Use <linux/platform_data/gpio-omap.h>Janusz Krzysztofik1-9/+3
Instead of defining symbols already defined in linux/platform_data/gpio-omap.h, use that header file. Since we include the header into an assembler code, prevent C only bits from being read in. Signed-off-by: Janusz Krzysztofik <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2018-09-20ARM: OMAP1: ams-delta: register MODEM device earlierJanusz Krzysztofik1-4/+18
Amstrad Delta MODEM device used to be initialized at arch_initcall before it was once moved to late_initcall by commit f7519d8c8290 ("ARM: OMAP1: ams-delta: register latch dependent devices later"). The purpose of that change was to postpone initialization of devices which depended on latch2 pins until latch2 converted to GPIO device was ready. After recent fixes to GPIO handling, it was possible to moove registration of most of those device back to where they were before. The same can be safely done with the MODEM device as initialization of GPIO pins it depends on was moved to machine_init by preceding patch. Move registration of the MODEM device to arch_initcall_sync, not to arch_initcall, so it is never exposed to potential conflict in registration order hazard against OMAP serial ports. Signed-off-by: Janusz Krzysztofik <[email protected]> Reviewed-by: Linus Walleij <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2018-09-20ARM: OMAP1: ams-delta: initialize latch2 pins to safe valuesJanusz Krzysztofik2-24/+35
Latch2 pins control a number of on-board devices, namely LCD, NAND, MODEM and CODEC. Those pins used to be initialized with safe values from init_machine before that operation was: 1) moved to late_initcall in preparation for conversion of latch2 to GPIO device - see commit f7519d8c8290 ("ARM: OMAP1: ams-delta: register latch dependent devices later"), 2) replaced with non-atomic initialization performed by means of gpio_request_array() - see commit 937eb4bb0058 ("ARM: OMAP1: ams-delta: convert latches to basic_mmio_gpio"), 3) made completely asynchronous by delegation of GPIO request operations performed on subsets of pins to respective device drivers in subsequent commits. One visible negative result of that disintegration was corrupt keyboard data reported by serio driver, recently fixed by commit 41f8fee385a0 ("ARM: OMAP1: ams-delta: Hog "keybrd_dataout" GPIO pin"). Moreover, initialization of LATCH2_PIN_MODEM_CODEC still performed with ams_delta_latch2_write() wrapper from late_init() is now done on not requested GPIO pin. Reintroduce atomic initialization of latch2 pins at machine_init to prevent from random values potentially corrupting NAND data or maybe even destroing other hardware. Also take care of MODEM/CODEC related pins so MODEM device probe succeeds even if latch2 GPIO device or dependent regulator is not ready and CODEC can be reached over the MODEM even if audio driver doesn't take control over LATCH2_PIN_MODEM_CODEC. Once done, remove the no longer needed GPIO based implementation of ams_delta_latch_write() and its frontend macro. Signed-off-by: Janusz Krzysztofik <[email protected]> Reviewed-by: Linus Walleij <[email protected]> [[email protected]: updated for the header location to remove dependency] Signed-off-by: Tony Lindgren <[email protected]>
2018-09-20ARM: OMAP1: ams-delta: assign MODEM IRQ from GPIO descriptorJanusz Krzysztofik1-12/+35
Don't request MODEM IRQ GPIO by its global number in ams_delta_modem_init(). Instead, obtain its GPIO descriptor and assign related IRQ to the MODEM. Do that from omap_gpio_deps_init(), where the chip is already looked up. Then, in ams_delta_modem_init(), just check for the IRQ number having been already assigned. Signed-off-by: Janusz Krzysztofik <[email protected]> Reviewed-by: Linus Walleij <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2018-09-20ARM: dts: mvebu: Add device tree for db-88f6820-amc boardChris Packham2-0/+158
This board is a plugin card for some of Marvell's switch development kits. It's similar to the non-amc board except that it has no SATA support. [gregory: fix DTC warning and use the new partition binding] Signed-off-by: Chris Packham <[email protected]> Signed-off-by: Gregory CLEMENT <[email protected]>
2018-09-20gpio: davinci: Remove unneeded GPIO macroAndrew F. Davis1-4/+4
This macro does nothing and has only one user, remove it. Signed-off-by: Andrew F. Davis <[email protected]> Tested-by: Keerthy <[email protected]> Acked-by: Keerthy <[email protected]> Signed-off-by: Linus Walleij <[email protected]>
2018-09-20ARM: dts: mvebu: db-xc3-24g4: use new style nand bindingChris Packham1-6/+10
Update the nand flash binding to the new style. Signed-off-by: Chris Packham <[email protected]> Signed-off-by: Gregory CLEMENT <[email protected]>
2018-09-20ARM: dts: mvebu: db-dxbc2: use new style nand bindingChris Packham1-6/+10
Update the nand flash binding to the new style. Signed-off-by: Chris Packham <[email protected]> Signed-off-by: Gregory CLEMENT <[email protected]>
2018-09-20ARM: dts: mvebu: 98dx3236: Rename nand controller nodeChris Packham3-3/+3
Update the 98dx3236 SoC and dependent boards to use "nand-controller" instead of "nand". Signed-off-by: Chris Packham <[email protected]> Signed-off-by: Gregory CLEMENT <[email protected]>
2018-09-20USB: EHCI: ehci-mv: use phy-pxa-usbLubomir Rintel1-10/+1
Use a proper PHY driver, instead of hooks to a board support package. Signed-off-by: Lubomir Rintel <[email protected]> Acked-by: Alan Stern <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2018-09-20ARM: dts: aspeed: Adding Facebook TiogaPass BMCVijay Khemka2-0/+147
Initial introduction of Facebook TiogaPass family equipped with Aspeed 2500 BMC SoC. TiogaPass is a x86 server development kit with a ASPEED ast2500 BMC manufactured by Facebook. Specifically, This adds the TiogaPass platform device tree file including the flash layout used by the TiogaPass BMC machines. Signed-off-by: Vijay Khemka <[email protected]> Signed-off-by: Joel Stanley <[email protected]>
2018-09-20ARM: dts: aspeed: Add HXT StarDragon 4800 REP2 BMCYuan Yao2-0/+208
The HXT StarDragon 4800 REP2 (Reference Evaluation Platform) is an aarch64 ARMv8 server platform with an ast2520 BMC. Signed-off-by: Yuan Yao <[email protected]> Signed-off-by: Joel Stanley <[email protected]>
2018-09-20ARM: dts: stm32: update rtc st,syscfg property on stm32h743Amelie Delaunay1-1/+1
To fit with latest rtc driver updates, rtc st,syscfg property must contain the control register offset of pwrcfg and the mask corresponding to the DBP (Disable Backup Protection) bit. Signed-off-by: Amelie Delaunay <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2018-09-20ARM: dts: stm32: Remove cd-inverted property for stm32f746-discoPatrice Chotard1-2/+1
Remove cd-inverted property and update cd-gpios active level accordingly Signed-off-by: Patrice Chotard <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2018-09-20ARM: dts: stm32: Remove cd-inverted property for stm32f769-discoPatrice Chotard1-2/+1
Remove cd-inverted property and update cd-gpios active level accordingly Signed-off-by: Patrice Chotard <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2018-09-20ARM: dts: stm32: Remove cd-inverted property for stm32f469-discoPatrice Chotard1-2/+1
Remove cd-inverted property and update cd-gpios active level accordingly Signed-off-by: Patrice Chotard <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2018-09-20ARM: dts: stm32: Remove cd-inverted property for stm32429i-evalPatrice Chotard1-2/+1
Remove cd-inverted property and update cd-gpios active level accordingly Signed-off-by: Patrice Chotard <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2018-09-20ARM: dts: stm32: Add clk-lse node's label on stm32f429Patrice Chotard1-1/+1
Add missing clk_lse label for node clk-lse. Signed-off-by: Patrice Chotard <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2018-09-20dma-mapping: consolidate the dma mmap implementationsChristoph Hellwig1-1/+1
The only functional differences (modulo a few missing fixes in the arch code) is that architectures without coherent caches need a hook to convert a virtual or dma address into a pfn, given that we don't have the kernel linear mapping available for the otherwise easy virt_to_page call. As a side effect we can support mmap of the per-device coherent area even on architectures not providing the callback, and we make previous dangerous default methods dma_common_mmap actually save for non-coherent architectures by rejecting it without the right helper. In addition to that we need a hook so that some architectures can override the protection bits when mmaping a dma coherent allocations. Signed-off-by: Christoph Hellwig <[email protected]> Acked-by: Paul Burton <[email protected]> # MIPS parts
2018-09-20dma-mapping: merge direct and noncoherent opsChristoph Hellwig1-2/+3
All the cache maintainance is already stubbed out when not enabled, but merging the two allows us to nicely handle the case where cache maintainance is required for some devices, but not others. Signed-off-by: Christoph Hellwig <[email protected]> Acked-by: Paul Burton <[email protected]> # MIPS parts
2018-09-20ARM: dts: sun8i: drop A64 HDMI PHY fallback compatible from R40 DTIcenowy Zheng1-2/+1
The R40 HDMI PHY seems to be different to the A64 one, the A64 one has no input mux, but the R40 one has. Drop the A64 fallback compatible from the HDMI PHY node in R40 DT. Signed-off-by: Icenowy Zheng <[email protected]> Signed-off-by: Maxime Ripard <[email protected]> [[email protected]: Fix subject prefix order] Signed-off-by: Chen-Yu Tsai <[email protected]>
2018-09-19libfdt: Ensure INT_MAX is defined in libfdt_env.hRob Herring1-0/+2
The next update of libfdt has a new dependency on INT_MAX. Update the instances of libfdt_env.h in the kernel to either include the necessary header with the definition or define it locally. Cc: Russell King <[email protected]> Cc: Benjamin Herrenschmidt <[email protected]> Cc: Paul Mackerras <[email protected]> Cc: Michael Ellerman <[email protected]> Cc: [email protected] Cc: [email protected] Signed-off-by: Rob Herring <[email protected]>
2018-09-19arm: dts: sama5d2: Update coresight bindings for hardware portsSuzuki K Poulose1-7/+10
Switch to the new coresight bindings for hardware ports Cc: Nicolas Ferre <[email protected]> Cc: Alexandre Belloni <[email protected]> Cc: Mathieu Poirier <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Signed-off-by: Alexandre Belloni <[email protected]>
2018-09-19ARM: s3c24xx: Restore proper usage of pr_info/pr_contCedric Roux1-3/+3
Fix wrong usage of pr_info introduced by the commit e728e4f20100 ("ARM: s3c24xx: formatting cleanup in mach-mini2440.c"). Since the idea is to print on a single line, pr_cont has to be used. Signed-off-by: Cedric Roux <[email protected]> Signed-off-by: Krzysztof Kozlowski <[email protected]>
2018-09-19ARM: dts: at91: sama5d27_som1_ek: add adc regulatorsEugen Hristev1-0/+42
Add fixed regulators for the ADC. This board does not have a programmable PMIC, but fixed regulators. Adding them to DT so the ADC can probe correctly. Tested-by: Swapna Gurumani <[email protected]> Signed-off-by: Ludovic Desroches <[email protected]> Signed-off-by: Eugen Hristev <[email protected]> Signed-off-by: Alexandre Belloni <[email protected]>
2018-09-19ARM: dts: atmel: Fix I2C and SPI bus warningsRob Herring6-8/+8
dtc has new checks for I2C and SPI buses. Fix the warnings in node names and unit-addresses. arch/arm/boot/dts/at91-dvk_som60.dtb: Warning (i2c_bus_reg): /ahb/apb/i2c@f0018000/eeprom@87: I2C bus unit address format error, expected "57" arch/arm/boot/dts/at91-dvk_som60.dtb: Warning (i2c_bus_reg): /ahb/apb/i2c@f0018000/ft5426@56: I2C bus unit address format error, expected "38" arch/arm/boot/dts/at91-vinco.dtb: Warning (i2c_bus_reg): /ahb/apb/i2c@f8024000/rtc@64: I2C bus unit address format error, expected "32" arch/arm/boot/dts/at91sam9260ek.dtb: Warning (spi_bus_reg): /ahb/apb/spi@fffc8000/mtd_dataflash@0: SPI bus unit address format error, expected "1" arch/arm/boot/dts/at91sam9g20ek_2mmc.dtb: Warning (spi_bus_reg): /ahb/apb/spi@fffc8000/mtd_dataflash@0: SPI bus unit address format error, expected "1" arch/arm/boot/dts/at91sam9g20ek.dtb: Warning (spi_bus_reg): /ahb/apb/spi@fffc8000/mtd_dataflash@0: SPI bus unit address format error, expected "1" arch/arm/boot/dts/at91sam9261ek.dtb: Warning (spi_bus_reg): /ahb/apb/spi@fffc8000/tsc2046@0: SPI bus unit address format error, expected "2" Signed-off-by: Rob Herring <[email protected]> Acked-by: Nicolas Ferre <[email protected]> Signed-off-by: Alexandre Belloni <[email protected]>
2018-09-19arm: dts: hip04: Update coresight bindings for hardware portsSuzuki K Poulose1-170/+176
Switch to the new the hardware port bindings. Cc: Wei Xu <[email protected]> Cc: Mathieu Poirier <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Signed-off-by: Wei Xu <[email protected]>
2018-09-19ARM: 8798/1: remove unnecessary KBUILD_SRC ifeq conditionalMasahiro Yamada1-4/+0
You can always prefix machine/plat header search paths with $(srctree)/ because $(srctree) is '.' for in-tree building. Signed-off-by: Masahiro Yamada <[email protected]> Signed-off-by: Russell King <[email protected]>
2018-09-19ARM: 8788/1: ftrace: remove old mcount supportStefan Agner5-133/+4
Commit cafa0010cd51 ("Raise the minimum required gcc version to 4.6") raised the minimum GCC version to 4.6. Old mcount is only required for GCC versions older than 4.4.0. Hence old mcount support can be dropped too. Signed-off-by: Stefan Agner <[email protected]> Signed-off-by: Russell King <[email protected]>
2018-09-19ARM: 8786/1: Debug kernel copy by printingFabrizio Castro1-0/+43
It may happen that when we relocate the kernel we corrupt other sensible memory (e.g. the memory needed by U-Boot for dealing with bootm command) while copying the kernel. If we overwrite the content of the memory area used by U-Boot's command bootm (described by U-Boot's parameters bootm_low and bootm_size), the kernel won't be able to boot. Troubleshooting the problem then is not straightforward. This commit allows the user to easily print information on where the kernel gets copied from/to in order to help with the design of the system memory map (e.g. bootm_low and bootm_size) at boot up. Signed-off-by: Fabrizio Castro <[email protected]> Reviewed-by: Chris Paterson <[email protected]> Acked-by: Biju Das <[email protected]> Signed-off-by: Russell King <[email protected]>
2018-09-19ARM: 8799/1: mm: fix pci_ioremap_io() offset checkThomas Petazzoni1-1/+1
IO_SPACE_LIMIT is the ending address of the PCI IO space, i.e something like 0xfffff (and not 0x100000). Therefore, when offset = 0xf0000 is passed as argument, this function fails even though the offset + SZ_64K fits below the IO_SPACE_LIMIT. This makes the last chunk of 64 KB of the I/O space not usable as it cannot be mapped. This patch fixes that by substracing 1 to offset + SZ_64K, so that we compare the addrss of the last byte of the I/O space against IO_SPACE_LIMIT instead of the address of the first byte of what is after the I/O space. Fixes: c2794437091a4 ("ARM: Add fixed PCI i/o mapping") Signed-off-by: Thomas Petazzoni <[email protected]> Acked-by: Nicolas Pitre <[email protected]> Signed-off-by: Russell King <[email protected]>
2018-09-19ARM: 8787/1: wire up io_pgetevents syscallStefan Agner1-0/+1
Wire up the new io_pgetevents syscall for ARM. Signed-off-by: Stefan Agner <[email protected]> Acked-by: Christoph Hellwig <[email protected]> Signed-off-by: Russell King <[email protected]>
2018-09-19ARM: shmobile: Rework the PMIC IRQ line quirkMarek Vasut1-29/+110
Rather than hard-coding the quirk topology, which stopped scaling, parse the information from DT. The code looks for all compatible PMICs -- da9063 and da9210 -- and checks if their IRQ line is tied to the same pin. If so, the code sends a matching sequence to the PMIC to deassert the IRQ. Signed-off-by: Marek Vasut <[email protected]> Acked-by: Wolfram Sang <[email protected]> Tested-by: Geert Uytterhoeven <[email protected]> (on Koelsch) Reviewed-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2018-09-19ARM: debug-ll: Add support for r8a7744Biju Das1-4/+5
Enable low-level debugging support for RZ/G1N (R8A7744). RZ/G1N uses SCIF0 for the debug console. Signed-off-by: Biju Das <[email protected]> Reviewed-by: Fabrizio Castro <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2018-09-19ARM: shmobile: defconfig: Enable r8a7744 SoCBiju Das1-0/+1
Enable recently added r8a7744 (RZ/G1N) SoC. Signed-off-by: Biju Das <[email protected]> Reviewed-by: Fabrizio Castro <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2018-09-19ARM: multi_v7_defconfig: Enable r8a7744 SoCBiju Das1-0/+1
Enable recently added r8a7744 (RZ/G1N) SoC. Signed-off-by: Biju Das <[email protected]> Reviewed-by: Fabrizio Castro <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2018-09-18arm64: KVM: Enable Common Not Private translationsVladimir Murzin2-0/+6
We rely on cpufeature framework to detect and enable CNP so for KVM we need to patch hyp to set CNP bit just before TTBR0_EL2 gets written. For the guest we encode CNP bit while building vttbr, so we don't need to bother with that in a world switch. Reviewed-by: James Morse <[email protected]> Acked-by: Catalin Marinas <[email protected]> Acked-by: Marc Zyngier <[email protected]> Signed-off-by: Vladimir Murzin <[email protected]> Signed-off-by: Catalin Marinas <[email protected]>
2018-09-18ARM: dts: xilinx: Fix I2C and SPI bus warningsRob Herring3-8/+8
dtc has new checks for I2C and SPI buses. Fix the warnings in node names and unit-addresses. arch/arm/boot/dts/zynq-zc702.dtb: Warning (i2c_bus_reg): /amba/i2c@e0004000/i2c-mux@74/i2c@7/hwmon@52: I2C bus unit address format error, expected "34" arch/arm/boot/dts/zynq-zc702.dtb: Warning (i2c_bus_reg): /amba/i2c@e0004000/i2c-mux@74/i2c@7/hwmon@53: I2C bus unit address format error, expected "35" arch/arm/boot/dts/zynq-zc702.dtb: Warning (i2c_bus_reg): /amba/i2c@e0004000/i2c-mux@74/i2c@7/hwmon@54: I2C bus unit address format error, expected "36" arch/arm/boot/dts/zynq-zc770-xm013.dtb: Warning (spi_bus_reg): /amba/spi@e0006000/eeprom@0: SPI bus unit address format error, expected "2" arch/arm/boot/dts/zynq-zc770-xm010.dtb: Warning (spi_bus_reg): /amba/spi@e0007000/flash@0: SPI bus unit address format error, expected "1" Cc: Michal Simek <[email protected]> Signed-off-by: Rob Herring <[email protected]> Signed-off-by: Michal Simek <[email protected]>
2018-09-17regulator: fixed: Convert to use GPIO descriptor onlyLinus Walleij16-37/+133
As we augmented the regulator core to accept a GPIO descriptor instead of a GPIO number, we can augment the fixed GPIO regulator to look up and pass that descriptor directly from device tree or board GPIO descriptor look up tables. Some boards just auto-enumerate their fixed regulator platform devices and I have assumed they get names like "fixed-regulator.0" but it's pretty hard to guess this. I need some testing from board maintainers to be sure. Other boards are straight forward, using just plain "fixed-regulator" (ID -1) or "fixed-regulator.1" hammering down the device ID. It seems the da9055 and da9211 has never got around to actually passing any enable gpio into its platform data (not the in-tree code anyway) so we can just decide to simply pass a descriptor instead. The fixed GPIO-controlled regulator in mach-pxa/ezx.c was confusingly named "*_dummy_supply_device" while it is a very real device backed by a GPIO line. There is nothing dummy about it at all, so I renamed it with the infix *_regulator_* as part of this patch set. Intel MID portions tested by Andy. Tested-by: Andy Shevchenko <[email protected]> # Check the x86 BCM stuff Acked-by: Tony Lindgren <[email protected]> # OMAP1,2,3 maintainer Signed-off-by: Linus Walleij <[email protected]> Reviewed-by: Janusz Krzysztofik <[email protected]> Reviewed-by: Mike Rapoport <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-09-17ARM: dts: socfpga: add timer resets for SoCFPGA platformDinh Nguyen2-0/+16
Add the resets property for all the timers on the Cyclone5/Arria5/Arria10 platforms. Signed-off-by: Marek Vasut <[email protected]> Signed-off-by: Dinh Nguyen <[email protected]>
2018-09-17ARM: dts: at91: add new compatibility string for macb on sama5d3Nicolas Ferre1-1/+1
We need this new compatibility string as we experienced different behavior for this 10/100Mbits/s macb interface on this particular SoC. Backward compatibility is preserved as we keep the alternative strings. Signed-off-by: Nicolas Ferre <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2018-09-17ARM: shmobile: r8a7744: Basic SoC supportBiju Das2-0/+7
Add minimal support for the RZ/G1N (R8A7744) SoC. Signed-off-by: Biju Das <[email protected]> Reviewed-by: Fabrizio Castro <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2018-09-17ARM: dts: rockchip: Fix erroneous SPI bus dtc warnings on rk3036Rob Herring1-1/+1
dtc has new checks for SPI buses. The rk3036 dts file has a node named spi' which causes false positive warnings. As the node is a pinctrl child node, change the node name to be 'spi-pins' to fix the warnings. arch/arm/boot/dts/rk3036-evb.dtb: Warning (spi_bus_bridge): /pinctrl/spi: incorrect #address-cells for SPI bus arch/arm/boot/dts/rk3036-kylin.dtb: Warning (spi_bus_bridge): /pinctrl/spi: incorrect #address-cells for SPI bus arch/arm/boot/dts/rk3036-evb.dtb: Warning (spi_bus_bridge): /pinctrl/spi: incorrect #size-cells for SPI bus arch/arm/boot/dts/rk3036-kylin.dtb: Warning (spi_bus_bridge): /pinctrl/spi: incorrect #size-cells for SPI bus Cc: Heiko Stuebner <[email protected]> Cc: [email protected] Signed-off-by: Rob Herring <[email protected]> Signed-off-by: Heiko Stuebner <[email protected]>
2018-09-16power: reset: at91-poweroff: switch to slow clock before shutdownClaudiu Beznea1-0/+8
The SAMA5D2 NRST input signal is resynchronized with the SLCK clock and it can take up to 2 SLCK cycles (about 90us) for the internal reset to be effective. During this delay, the VDDCORE current consumption may still be high (application-dependent) with the VDDCORE regulator already OFF. Under such conditions, VDDCORE may operate below its operating range leading to potential register corruption. To prevent such situation, it is recommended to decrease significantly the power consumption of the device once the voltage regulator is turned-off. This can be achieved by operating the device at a much lower low frequency. To solve this switch the master clock to slock clock just before writing shutdown command to shutdown controller. Signed-off-by: Claudiu Beznea <[email protected]> Suggested-by: Patrice Vilchez <[email protected]> Acked-by: Nicolas Ferre <[email protected]> Signed-off-by: Sebastian Reichel <[email protected]>
2018-09-14ARM: dts: r9a06g032: Correct UART and add all other UARTsPhil Edworthy1-3/+80
- UART0 was missing the bus clock ("apb_pclk"). - Use recently accepted r9a06g032 and rzn1 compat strings. - Add all the other UARTs. Signed-off-by: Phil Edworthy <[email protected]> [simon: updated changelog] Signed-off-by: Simon Horman <[email protected]>
2018-09-14ARM: dts: sun9i: Fix I2C bus warningsRob Herring1-1/+1
dtc has new checks for I2C buses. The sun9i-a80 dts file has a node named 'i2c' which causes a false positive warning. As the node is a RSB bus, correct the node name to be 'rsb' to fix the warnings. arch/arm/boot/dts/sun9i-a80-cubieboard4.dtb: Warning (i2c_bus_reg): /soc/i2c@8003400/codec@e89:reg: I2C address must be less than 10-bits, got "0xe89" arch/arm/boot/dts/sun9i-a80-cubieboard4.dtb: Warning (i2c_bus_reg): /soc/i2c@8003400/pmic@745:reg: I2C address must be less than 10-bits, got "0x745" arch/arm/boot/dts/sun9i-a80-optimus.dtb: Warning (i2c_bus_reg): /soc/i2c@8003400/codec@e89:reg: I2C address must be less than 10-bits, got "0xe89" arch/arm/boot/dts/sun9i-a80-optimus.dtb: Warning (i2c_bus_reg): /soc/i2c@8003400/pmic@745:reg: I2C address must be less than 10-bits, got "0x745" Cc: Maxime Ripard <[email protected]> Cc: Chen-Yu Tsai <[email protected]> Signed-off-by: Rob Herring <[email protected]> Signed-off-by: Chen-Yu Tsai <[email protected]>