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2011-03-11futex: Sanitize futex ops argument typesMichel Lespinasse1-6/+7
Change futex_atomic_op_inuser and futex_atomic_cmpxchg_inatomic prototypes to use u32 types for the futex as this is the data type the futex core code uses all over the place. Signed-off-by: Michel Lespinasse <[email protected]> Cc: Darren Hart <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Matt Turner <[email protected]> Cc: Russell King <[email protected]> Cc: David Howells <[email protected]> Cc: Tony Luck <[email protected]> Cc: Michal Simek <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: "James E.J. Bottomley" <[email protected]> Cc: Benjamin Herrenschmidt <[email protected]> Cc: Martin Schwidefsky <[email protected]> Cc: Paul Mundt <[email protected]> Cc: "David S. Miller" <[email protected]> Cc: Chris Metcalf <[email protected]> Cc: Linus Torvalds <[email protected]> LKML-Reference: <[email protected]> Signed-off-by: Thomas Gleixner <[email protected]>
2011-03-11futex: Sanitize cmpxchg_futex_value_locked APIMichel Lespinasse1-8/+10
The cmpxchg_futex_value_locked API was funny in that it returned either the original, user-exposed futex value OR an error code such as -EFAULT. This was confusing at best, and could be a source of livelocks in places that retry the cmpxchg_futex_value_locked after trying to fix the issue by running fault_in_user_writeable(). This change makes the cmpxchg_futex_value_locked API more similar to the get_futex_value_locked one, returning an error code and updating the original value through a reference argument. Signed-off-by: Michel Lespinasse <[email protected]> Acked-by: Chris Metcalf <[email protected]> [tile] Acked-by: Tony Luck <[email protected]> [ia64] Acked-by: Thomas Gleixner <[email protected]> Tested-by: Michal Simek <[email protected]> [microblaze] Acked-by: David Howells <[email protected]> [frv] Cc: Darren Hart <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Matt Turner <[email protected]> Cc: Russell King <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: "James E.J. Bottomley" <[email protected]> Cc: Benjamin Herrenschmidt <[email protected]> Cc: Martin Schwidefsky <[email protected]> Cc: Paul Mundt <[email protected]> Cc: "David S. Miller" <[email protected]> Cc: Linus Torvalds <[email protected]> LKML-Reference: <[email protected]> Signed-off-by: Thomas Gleixner <[email protected]>
2011-03-11futex: Remove redundant pagefault_disable in futex_atomic_cmpxchg_inatomic()Michel Lespinasse1-3/+2
kernel/futex.c disables page faults before calling futex_atomic_cmpxchg_inatomic(), so there is no need to do it again within that function. Signed-off-by: Michel Lespinasse <[email protected]> Cc: Darren Hart <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Matt Turner <[email protected]> Cc: Russell King <[email protected]> Cc: David Howells <[email protected]> Cc: Tony Luck <[email protected]> Cc: Michal Simek <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: "James E.J. Bottomley" <[email protected]> Cc: Benjamin Herrenschmidt <[email protected]> Cc: Martin Schwidefsky <[email protected]> Cc: Paul Mundt <[email protected]> Cc: "David S. Miller" <[email protected]> Cc: Chris Metcalf <[email protected]> Cc: Linus Torvalds <[email protected]> LKML-Reference: <[email protected]> Signed-off-by: Thomas Gleixner <[email protected]>
2011-03-11arm: tcc8k: Fix bus clock calculationOskar Schirmer1-3/+10
There are two dividers used to derive bus clock from system clock: system clock is divided by SCKDIV+1, then by BCKDIV+1. SCKDIV divider has been ignored up to now, which is no problem as long as it is 0. Take SCKDIV into account for bus clock calculation. Signed-off-by: Oskar Schirmer <[email protected]> Cc: [email protected] Signed-off-by: Thomas Gleixner <[email protected]>
2011-03-11arm: tcc8k: Fix indent, coding syleOskar Schirmer1-4/+3
Remove double definition of ACLKUSBH, change parameter name in root_clk_disable, as there is no reason to have a different name than in root_clk_enable. No functional change. Signed-off-by: Oskar Schirmer <[email protected]> Cc: [email protected] Signed-off-by: Thomas Gleixner <[email protected]>
2011-03-11arm: tcc8k: Avoid reading clock register twiceOskar Schirmer1-1/+1
There is no reason why in case of PLL2 the configuration register should be read twice, while for PLL0/1 using the value previously read is used. Do the same for PLL2. Signed-off-by: Oskar Schirmer <[email protected]> Cc: [email protected] Signed-off-by: Thomas Gleixner <[email protected]>
2011-03-11arm: tcc8k: Fix clock rate calculationHans J. Koch1-4/+12
The calculation of the best divider value for a requested clock rate always returned a value that was slightly too large. It was also not protected against possible divisions by zero. Request for very low, but non zero rates would cause the ACLK divisor field to overflow. Catch this situation by using the maximum value. The internal function aclk_set_rate() calculates the correct divider value, but doesn't write it back to the register. Add the write back. Signed-off-by: Hans J. Koch <[email protected]> Signed-off-by: Oskar Schirmer <[email protected]> Cc: [email protected] Signed-off-by: Thomas Gleixner <[email protected]>
2011-03-11arm: tcc8k: Choose PLL settings conforming to board layoutOskar Schirmer1-0/+18
The evaluation board is driven with 1.2V core voltage, so system clock must not exceed 192 MHz, bus clock must not exceed 110 MHz. Choose appropriate values and set DTCMWAIT accordingly. Adapt UART setting to avoid console log interruption and wait for the specified locking time of 300us to pass. Signed-off-by: Oskar Schirmer <[email protected]> Cc: [email protected] Signed-off-by: Thomas Gleixner <[email protected]>
2011-03-11arm: tcc8k: Add missing includeOskar Schirmer1-0/+1
If NAND is enabled we better have the include around. Signed-off-by: Oskar Schirmer <[email protected]> Signed-off-by: Thomas Gleixner <[email protected]>
2011-03-11ARM: S5P: Add support for common MIPI CSIS/DSIM D-PHY controlSylwester Nawrocki6-2/+81
Add common code for MIPI-CSIS and MIPI-DSIM drivers to support their corresponding D-PHY's enable and reset control. Signed-off-by: Sylwester Nawrocki <[email protected]> Signed-off-by: Kyungmin Park <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2011-03-11ARM: S5P: Extend MIPI-CSIS platform_data with the PHY control callbackSylwester Nawrocki1-0/+15
Extend MIPI-CSIS driver's platform data structure with a callback for D-PHY enable and reset control. Also add a flag indicating whether the external MIPI-CSI (VDD18_MIPI) power supply should be managed in the driver through the "vdd" power supply. On some boards this regulator may be a fixed voltage regulator without an inhibit function. Signed-off-by: Sylwester Nawrocki <[email protected]> Signed-off-by: Kyungmin Park <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2011-03-11ARM: S5P: Rename MIPI-CSIS driver header and update CopyrightSylwester Nawrocki3-7/+7
Signed-off-by: Sylwester Nawrocki <[email protected]> Signed-off-by: Kyungmin Park <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2011-03-11ARM: S5P: Add platform helpers for camera GPIO configurationSylwester Nawrocki7-0/+127
Add functions for configuration of the parallel camera bus pins on S5PV210 and Exynos4 SoC. Signed-off-by: Sylwester Nawrocki <[email protected]> Signed-off-by: Kyungmin Park <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2011-03-11Merge branch 'dev/pwm-backlight' into for-nextKukjin Kim14-49/+290
Conflicts: arch/arm/mach-s3c64xx/mach-smdk6410.c
2011-03-11Merge branch 'next-s3c2440-gta02' into for-nextKukjin Kim1-17/+54
2011-03-10Merge remote branch 'remotes/origin/voltage_split_2.6.39' into ↵Paul Walmsley22-788/+1236
tmp-integration-2.6.39-20110310-024 Conflicts: arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
2011-03-10Merge remote branch 'remotes/origin/hwmod_a_2.6.39' into ↵Paul Walmsley7-60/+82
tmp-integration-2.6.39-20110310-024 Conflicts: arch/arm/mach-omap2/omap_hwmod_2430_data.c arch/arm/mach-omap2/omap_hwmod_3xxx_data.c arch/arm/plat-omap/include/plat/omap_hwmod.h
2011-03-10Merge remote branches 'remotes/origin/pwrdm_clkdm_b_2.6.39', ↵Paul Walmsley163-3132/+14750
'remotes/origin/pwrdm_add_can_lose_context_fns_2.6.39', 'remotes/origin/omap_device_a_2.6.39', 'remotes/origin/mmc_a_2.6.39', 'remotes/origin/hwmod_b_2.6.39', 'remotes/origin/dmtimer_a_2.6.39', 'remotes/origin/pwrdm_clkdm_a_2.6.39', 'remotes/origin/clkdm_statdep_omap4_2.6.39', 'remotes/origin/clk_a_2.6.39', 'remotes/origin/clk_autoidle_a_2.6.39', 'remotes/origin/clk_autoidle_b_2.6.39', 'remotes/origin/clk_b_2.6.39', 'remotes/origin/clk_clkdm_a_2.6.39', 'remotes/origin/misc_a_2.6.39', 'remotes/origin/for_2.6.39/omap3_hwmod_data' and 'remotes/origin/wdtimer_a_2.6.39' into tmp-integration-2.6.39-20110310-024
2011-03-10OMAP3: wdtimer: Fix CORE idle transitionPaul Walmsley1-0/+5
The HW superwised smart idle for wdtimer in OMAP3 prevents CORE power domain idle transitions. Disable it by swithing to SW supervised transitions. This could be a hardware bug in the OMAP3 wdtimer2 block. Signed-off-by: Kalle Jokiniemi <[email protected]> Signed-off-by: Paul Walmsley <[email protected]> Cc: Benoit Cousson <[email protected]> Acked-by: Kevin Hilman <[email protected]>
2011-03-10OMAP2+: voltage: reorganize, split code from dataPaul Walmsley14-778/+1226
This is a first pass at reorganizing mach-omap2/voltage.c: - Separate almost all of the data from the code of mach-omap2/voltage.c. The code remains in mach-omap2/voltage.c. The data goes into one of several places, depending on what type of data it is: - Silicon process/validation data: mach-omap2/opp*_data.c - VC (Voltage Controller) data: mach-omap2/vc*_data.c - VP (Voltage Processor) data: mach-omap2/vp*_data.c - Voltage domain data: mach-omap2/voltagedomains*_data.c The ultimate goal is for all this data to be autogenerated, the same way we autogenerate the rest of our data. - Separate VC and VP common data from VDD-specific VC and VP data. - Separate common voltage.c code from SoC-specific code; reuse common code. - Reorganize structures to avoid unnecessary memory loss due to unpacked fields. There is much left to be done. VC code and VP code should be separated out into vc*.c and vp*.c files. Many fields in the existing structures are superfluous, and should be removed. Some code in voltage.c seems to be duplicated; that code should be moved into functions of its own. Proper voltage domain code should be created, as was done with the powerdomain and clockdomains, and powerdomains should reference voltagedomains. Thanks to Shweta Gulati <[email protected]> for comments. Thanks to Rajendra Nayak <[email protected]> for finding and fixing some bugs that prevented OMAP4 from booting: https://patchwork.kernel.org/patch/587311/ His patch has been folded into this one to avoid breaking OMAP4 between patches. Thanks also to Kevin Hilman <[email protected]> for finding and fixing a compile problem when !CONFIG_PM: http://www.spinics.net/lists/arm-kernel/msg118067.html His patch has also been folded into this one to avoid breaking !CONFIG_PM builds. Signed-off-by: Paul Walmsley <[email protected]> Cc: Shweta Gulati <[email protected]> Cc: Rajendra Nayak <[email protected]> Cc: Kevin Hilman <[email protected]>
2011-03-10Merge branch 'for_2.6.39/pm-misc' of ↵Tony Lindgren46-315/+463
ssh://master.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into omap-for-linus
2011-03-11Merge branch 'next-s5p' into for-nextKukjin Kim2-79/+76
2011-03-11Merge branch 'next-exynos4' into for-nextKukjin Kim75-1528/+3060
2011-03-11ARM: EXYNOS4: Implement kernel timers using MCTChanghwan Youn5-2/+487
The Multi-Core Timer(MCT) of EXYNOS4 is designed for implementing clock source timer and clock event timers. This patch implements 1 clock source timer with 64 bit free running counter of MCT and 2 clock event timers with two of 31-bit tick counters. Signed-off-by: Changhwan Youn <[email protected]> Cc: Ben Dooks <[email protected]> Cc: Russell King <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2011-03-11ARM: EXYNOS4: Add irq definition for kernel global timerChanghwan Youn1-0/+1
This patch adds IRQ_MCT_G0 to irq map. IRQ_MCT_G0 is an interrupt of MCT comparator and used for kernel global timer. Signed-off-by: Changhwan Youn <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2011-03-11ARM: EXYNOS4: Add SYSTIMER IO Address mapping for MCTChanghwan Youn2-0/+6
The MCT(Multi-Core Timer) is used for implementing kernel timers for EXYNOS4210. Signed-off-by: Changhwan Youn <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2011-03-10OMAP3: PM: Clear the SCTLR C bit in asm code to prevent data cache allocationSantosh Shilimkar1-0/+27
On the newer ARM processors like CortexA8, CortexA9, the caches can be speculatively loaded while they are getting flushed. Clear the SCTLR C bit to prevent further data cache allocation as part of cache clean routine Signed-off-by: Santosh Shilimkar <[email protected]> Signed-off-by: Kevin Hilman <[email protected]>
2011-03-10OMAP3: PM: Remove un-necessary cp15 registers form low power cpu contextSantosh Shilimkar1-116/+40
The current code saves few un-necessary registers which are read-only or write-only, unused CP15 registers. Remove them and keep only necessary CP15 registers part of low power context save/restore. Signed-off-by: Santosh Shilimkar <[email protected]> Signed-off-by: Kevin Hilman <[email protected]>
2011-03-10OMAP3: PM: Allow the cache clean when L1 is lost.Santosh Shilimkar1-12/+3
When L1 cache is suppose to be lost, it needs to be cleaned before entrering to the low power mode. While at this, also fix few comments and remove un-necessary clean_l2 lable. Signed-off-by: Santosh Shilimkar <[email protected]> Signed-off-by: Kevin Hilman <[email protected]>
2011-03-10OMAP3: PM: Fix the MMU on sequence in the asm codeSantosh Shilimkar1-0/+5
Add necessary barriers after enabling MMU. Also use the sane way to load pc and jump to it instead of executing ldma first up. Signed-off-by: Santosh Shilimkar <[email protected]> Signed-off-by: Kevin Hilman <[email protected]>
2011-03-10OMAP3: PM: Use ARMv7 supported instructions instead of legacy CP15 onesSantosh Shilimkar1-11/+10
On ARMv7 dsb, dmb instructions are supported and can be used directly instead of their cp15 equivalnet. Also remove the opcodes for smc and use the available instruction directly in OMAP3 low power asm code Signed-off-by: Santosh Shilimkar <[email protected]> Signed-off-by: Kevin Hilman <[email protected]>
2011-03-10msm: scm: Check for interruption immediatelyStephen Boyd1-24/+27
When we're interrupted on the secure side, we should just issue another smc instruction again instead of replaying the arguments to smc. Fix it. Signed-off-by: Stephen Boyd <[email protected]> Signed-off-by: David Brown <[email protected]>
2011-03-10msm: scm: Fix improper register assignmentStephen Boyd1-2/+5
Assign the registers used in the inline assembly immediately before the inline assembly block. This ensures the compiler doesn't optimize away dead register assignments when it shouldn't. Signed-off-by: Stephen Boyd <[email protected]> Acked-by: Nicolas Pitre <[email protected]> Signed-off-by: David Brown <[email protected]>
2011-03-10msm: scm: Mark inline asm as volatileStephen Boyd1-2/+2
We don't want the compiler to remove these asm statements or reorder them in any way. Mark them as volatile to be sure. Signed-off-by: Stephen Boyd <[email protected]> Acked-by: Will Deacon <[email protected]> Signed-off-by: David Brown <[email protected]>
2011-03-10omap: Fix H4 init_irq to not call h4_init_flashTony Lindgren1-1/+1
There should be no reason to call h4_init_flash this early. It causes problems as things are not yet initialized. Tested-by: Tarun Kanti DebBarma <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2011-03-10ARM: 6781/1: Thumb-2: Work around buggy Thumb-2 short branch relocations in gasDave Martin2-0/+35
Various binutils versions can resolve Thumb-2 branches to locally-defined, preemptible global symbols as short-range "b.n" branch instructions. This is a problem, because there's no guarantee the final destination of the symbol, or any candidate locations for a trampoline, are within range of the branch. For this reason, the kernel does not support fixing up the R_ARM_THM_JUMP11 (102) relocation in modules at all, and it makes little sense to add support. The symptom is that the kernel fails with an "unsupported relocation" error when loading some modules. Until fixed tools are available, passing -fno-optimize-sibling-calls to gcc should prevent gcc generating code which hits this problem, at the cost of a bit of extra runtime stack usage in some cases. The problem is described in more detail at: https://bugs.launchpad.net/binutils-linaro/+bug/725126 Only Thumb-2 kernels are affected. This patch adds a new CONFIG_THUMB2_AVOID_R_ARM_THM_JUMP11 config option which adds -fno-optimize-sibling-calls to CFLAGS_MODULE when building a Thumb-2 kernel. Signed-off-by: Dave Martin <[email protected]> Acked-by: Nicolas Pitre <[email protected]> Signed-off-by: Russell King <[email protected]>
2011-03-10ARM: 6747/1: P2V: Thumb2 supportNicolas Pitre2-3/+50
Adding Thumb2 support to the runtime patching of the virt_to_phys and phys_to_virt opcodes. Tested both the 8-bit and the 16-bit fixups, using different placements in memory to exercize all code paths. Signed-off-by: Nicolas Pitre <[email protected]> Reviewed-by: Dave Martin <[email protected]> Signed-off-by: Russell King <[email protected]>
2011-03-10ARM: 6798/1: aout-core: zero thread debug registers in a.out core dumpWill Deacon2-6/+2
The removal of the single-step emulation from ptrace on ARM means that thread_struct no longer has software breakpoint fields in its debug member. This patch fixes the a.out core dump code so that the debug registers are zeroed rather than trying to copy from non-existent fields. Cc: Nicolas Pitre <[email protected]> Signed-off-by: Bryan Wu <[email protected]> Signed-off-by: Will Deacon <[email protected]> Signed-off-by: Russell King <[email protected]>
2011-03-10Merge branch 'for-rmk' of git://git.pengutronix.de/git/imx/linux-2.6 into ↵Russell King146-2174/+7469
devel-stable
2011-03-10arm: imx: Zero entire imxdma structureIlia Mirkin1-1/+1
The semantic match that finds the problem: // <smpl> @@ type T; identifier x; @@ T *x; ... * memset(x, ..., ... * sizeof(x) * ...); // </smpl> Signed-off-by: Ilia Mirkin <[email protected]> Signed-off-by: Sascha Hauer <[email protected]>
2011-03-10mx51 enchance the sd/mmc HW timing compatibility on mx51 boards.Richard Zhu1-20/+20
Some cards have the CRC errors in read on mx51 BBG board. Configure the eSDHC pad configurations to level up the compatibility to fix this issue. Signed-off-by: Richard Zhu <[email protected]> Tested-by: Shawn Guo <[email protected]> Signed-off-by: Sascha Hauer <[email protected]>
2011-03-10omap2/3: dmtimer: Enable autoidleTero Kristo1-0/+4
This saves some power. OMAP4 version should check for GPT module ID, as autoidle is only supported on a subset of these. Signed-off-by: Tero Kristo <[email protected]> Signed-off-by: Paul Walmsley <[email protected]>
2011-03-10OMAP2+: clockdomain: add flag that will block autodeps from being added for ↵Paul Walmsley3-8/+24
a clockdomain Add a new clockdomain flag, CLKDM_NO_AUTODEPS, which, when marked on a clockdomain, will prevent "autodeps" from being associated with the clockdomain. ("Autodeps" are sleep dependencies and wakeup dependencies from/to processor modules that are automatically added to a clockdomain when it is in hardware-supervised idle mode. They are deprecated -- a relic from the old CDP trees -- but are still in use for OMAP3.) Also, prevent the hwmod code from adding or removing initiator dependencies for clockdomains with this flag set. This patch should allow others to test which clockdomains actually still need autodeps. Thanks to Kevin Hilman <[email protected]> for noting that the original version should also modify the hwmod code. Signed-off-by: Paul Walmsley <[email protected]> Cc: Kevin Hilman <[email protected]>
2011-03-10OMAP2+: hwmod: add API to handle autoidle modeKishon Vijay Abraham I2-0/+37
Create a new API that forms a wrapper to _set_module_autoidle() to modify the AUTOIDLE bit. This API is intended to be used by drivers that requires direct manipulation of the AUTOIDLE bits in SYSCONFIG register. McBSP driver requires autoidle bit to be enabled/disabled while using sidetone feature. Signed-off-by: Kishon Vijay Abraham I <[email protected]> Cc: Paul Walmsley <[email protected]> Cc: Benoit Cousson <[email protected]> [[email protected]: restrict the hwmod states that the autoidle bit can be changed in; changed function name; dropped "int" from "unsigned int long"] Signed-off-by: Paul Walmsley <[email protected]>
2011-03-10OMAP2+: hwmod: allow board files to prevent devices from being reset upon initPaul Walmsley2-0/+28
Some boards can't tolerate IP blocks being reset when they are initialized. Michael Büsch cites a case with the Nokia N810: http://www.spinics.net/lists/linux-omap/msg47277.html To allow such boards to continue working normally, allow board file maintainers to mark IP blocks to prevent them from being reset upon init. This is done via a hwmod function, omap_hwmod_no_setup_reset(). Signed-off-by: Paul Walmsley <[email protected]> Cc: Michael Buesch <[email protected]>
2011-03-10OMAP2+: hwmod: use status bit info for reset lineomar ramirez4-42/+58
On OMAP2 and OMAP3 the reset ctrl shift doesn't match the status bit, as it does on OMAP4, when handling the reset lines. This patch adds a new member in the reset info structure, so now it can be added as part of hwmod data, and checked accordingly for OMAP2 or 3; otherwise, there could be cases when the shift masks doesn't match both of the registers, and a successful reset might throw an error message or vice versa. Signed-off-by: Omar Ramirez Luna <[email protected]> [[email protected]: added a warning if st_shift used on OMAP4; renamed 'r' variable; improved some documentation] Signed-off-by: Paul Walmsley <[email protected]>
2011-03-10OMAP2+: hwmod: fix a documentation bug with HWMOD_NO_OCP_AUTOIDLEPaul Walmsley1-1/+1
The documented name of the HWMOD_NO_OCP_AUTOIDLE flag was incorrect; fix it. Signed-off-by: Paul Walmsley <[email protected]>
2011-03-10OMAP2+: hwmod: Fix what _init_clock returnsRajendra Nayak1-1/+1
_init_clock always returns 0 and does not propogate the error (in case of failure) back to the caller, causing _init_clocks to fail silently. Signed-off-by: Rajendra Nayak <[email protected]> Acked-by: Benoît Cousson <[email protected]> Signed-off-by: Paul Walmsley <[email protected]>
2011-03-10omap: hwmod: add syss reset done flags to omap2, omap3 hwmodsAvinash.H.M3-15/+21
Some of the omap2, omap3 peripherals support software reset. This can be done through the softreset bit in sysconfig register. The reset status can be checked through resetdone bit of sysstatus register. syss_has_reset_status is added to the hwmod database of peripherals which have resetdone bit in sysstatus register. Cc: Rajendra Nayak <[email protected]> Cc: Paul Walmsley <[email protected]> Cc: Benoit Cousson <[email protected]> Cc: Kevin Hilman <[email protected]> Reviewed-by: Govindraj.R <[email protected]> Signed-off-by: Avinash.H.M <[email protected]> Signed-off-by: Paul Walmsley <[email protected]>
2011-03-10OMAP2+: hwmod: fix incorrect computation of autoidle_maskTarun Kanti DebBarma1-1/+1
Autoidle is a single bit, TIOCP_CFG[0], setting on OMAP1/2/3/4 platforms. In _set_module_autoidle() I am seeing 0x3 value where the mask is computed. This should be 0x1. v2: (1) Modified the subject. (2) Modified the description with further specific information. Baseline: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git Tested Info: Boot tested on OMAP 1/2/3/4. Signed-off-by: Tarun Kanti DebBarma <[email protected]> Acked-by: Rajendra Nayak <[email protected]> Acked-by: Benoit Cousson <[email protected]> Signed-off-by: Paul Walmsley <[email protected]>
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