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2022-11-21arm64: tegra: Enable PWM users on Jetson AGX OrinSandipan Patra1-0/+14
Enable additional PWM controllers in device tree so that the PWM pins on the Jetson AGX Orin Developer Kit 40-pin header can be used. Signed-off-by: Sandipan Patra <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2022-11-21arm64: tegra: Add missing whitespaceThierry Reding1-1/+1
The unit-address of a node should be separated from the opening brace by a space. Signed-off-by: Thierry Reding <[email protected]>
2022-11-21arm64: tegra: Sort nodes by unit-addressThierry Reding1-192/+192
The P2U nodes that were recently added were not added in the correct order. Sort them in the right place by unit-address. Signed-off-by: Thierry Reding <[email protected]>
2022-11-21arm64: tegra: Add Tegra234 SDMMC1 device tree nodePrathamesh Shete2-0/+63
Add device tree node for Tegra234 SDMMC1 instance. Add and enable SD card instance in device tree. Signed-off-by: Prathamesh Shete <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2022-11-21arm64: tegra: Add SBSA UART for Tegra234Jon Hunter2-0/+12
Populate the SBSA UART for Tegra234 and enable this UART for Jetson AGX Orin. Signed-off-by: Jon Hunter <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2022-11-21arm64: tegra: Add PWM fan for Jetson AGX OrinJon Hunter1-0/+14
Add the PWM fan node for the Tegra234 Jetson AGX Orin platform. Signed-off-by: Jon Hunter <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2022-11-21arm64: tegra: Populate Tegra234 PWMsJon Hunter1-2/+78
Populate all the PWM devices for Tegra234. Finally, update the compatible string for the existing 'pwm1' node to just be 'tegra194-pwm' and remove the fallback to 'tegra186-pwm', which aligns with the binding documentation. Signed-off-by: Jon Hunter <[email protected]> Acked-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2022-11-21arm64: tegra: Remove unused property for I2CJon Hunter1-1/+0
Commit 156af9de0932 ("arm64: tegra: Add Tegra234 I2C devicetree nodes") populated the I2C device nodes for Tegra234. One of these nodes contains the property 'nvidia,hw-instance-id' which is neither documented or used. Remove this unused property. Fixes: 156af9de0932 ("arm64: tegra: Add Tegra234 I2C devicetree nodes") Signed-off-by: Jon Hunter <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2022-11-21arm64: tegra: Fix Prefetchable aperture ranges of Tegra234 PCIe controllersVidya Sagar1-3/+3
commit edf408b946d3 ("PCI: dwc: Validate iATU outbound mappings against hardware constraints") exposes an issue with the existing partitioning of the aperture space where the Prefetchable apertures of controllers C5, C7 and C9 in Tegra234 cross the 32GB boundary hardware constraint. This patch makes sure that the Prefetchable region doesn't spill over the 32GB boundary. Fixes: ec142c44b026 ("arm64: tegra: Add P2U and PCIe controller nodes to Tegra234 DT") Signed-off-by: Vidya Sagar <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2022-11-21arm64: tegra: Add NVDEC on Tegra234Mikko Perttunen1-0/+36
Add a device tree node for NVDEC on Tegra234. Booting the firmware requires some information regarding offsets within the firmware binary. These are passed through the device tree, but since the values vary depending on the firmware version, and the firmware itself is not available to the OS, the flasher is expected to provide a device tree overlay with values corresponding to the firmware it is flashing. The overlay then replaces the placeholder values here. Signed-off-by: Mikko Perttunen <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2022-11-21arm64: tegra: Fix ranges for host1x nodesMikko Perttunen2-2/+2
The currently specified 'ranges' properties don't actually include all devices under the host1x bus on Tegra194 and Tegra234. Expand them appropriately. Signed-off-by: Mikko Perttunen <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2022-11-21arm64: dts: mediatek: Add support for MT6795 Sony Xperia M5 smartphoneAngeloGioacchino Del Regno2-0/+89
Add a basic support for the Sony Xperia M5 (codename "Holly") smartphone, powered by a MediaTek Helio X10 SoC. This achieves a console boot. Signed-off-by: AngeloGioacchino Del Regno <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Matthias Brugger <[email protected]>
2022-11-21arm64: dts: mediatek: mt6795: Add support for eMMC/SD/SDIO controllersAngeloGioacchino Del Regno1-0/+41
Add the mmc nodes to support all of the four controllers, used for eMMC, SD/MicroSD and SDIO storage. All of these controller nodes are left disabled by default, as usage is board dependent. Signed-off-by: AngeloGioacchino Del Regno <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Matthias Brugger <[email protected]>
2022-11-21arm64: dts: mediatek: mt6795: Add support for APDMA and wire up UART DMAsAngeloGioacchino Del Regno1-0/+34
This SoC has a DMA controller with tx/rx channels for all of the UART controller IPs: add the apdma node and wire up the DMAs on all controllers. When one of the UART controllers is used as a serial console, the DMA will be automatically ignored. Signed-off-by: AngeloGioacchino Del Regno <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Matthias Brugger <[email protected]>
2022-11-21arm64: dts: mediatek: mt6795: Replace UART dummy clocks with pericfgAngeloGioacchino Del Regno1-4/+8
The UART nodes had a dummy clock for early bringup, as it is expected that these are left on by the bootloader: now that the pericfg clock controller is supported, we can replace them with the real clocks. Signed-off-by: AngeloGioacchino Del Regno <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Matthias Brugger <[email protected]>
2022-11-21arm64: dts: mediatek: mt6795: Add topckgen, infra, peri clocks/resetsAngeloGioacchino Del Regno1-0/+22
Add nodes for topckgen, infracfg and pericfg, providing various clocks and resets and needed to support basic IPs of this SoC. Signed-off-by: AngeloGioacchino Del Regno <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Matthias Brugger <[email protected]>
2022-11-21arm64: dts: mediatek: cherry: Add edptx and dptx supportBo-Chen Chen1-0/+68
In cherry projects, we use edptx as the internal display interface and use dptx as the external display interface. To support this, we need to add more properties. - Add pinctrls for edptx and dptx. - Add ports for edptx and dptx. The port connections for the internal and external display: dp-intf0 -> edptx -> panel dp-intf1 -> dptx The edptx endpoint is kept empty for now, as the panel addition will come in a later commit. Signed-off-by: Bo-Chen Chen <[email protected]> Reviewed-by: AngeloGioacchino Del Regno <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Matthias Brugger <[email protected]>
2022-11-21arm64: dts: mediatek: cherry: Add dp-intf portsBo-Chen Chen1-0/+18
Dp-intfs provide the pixel data to edptx and dptx. To support edptx and dptx, we need to add dp-intf0 and dp-intf1 ports. Signed-off-by: Bo-Chen Chen <[email protected]> Reviewed-by: AngeloGioacchino Del Regno <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Matthias Brugger <[email protected]>
2022-11-21arm64: dts: mt8195: Add edptx and dptx nodesBo-Chen Chen1-0/+25
In MT8195, we use edptx as the internal display interface and use dptx as the external display interface. Therefore, we need to add these nodes to support the internal display and the external display. - Add dp calibration data in the efuse node. - Add edptx and dptx nodes for MT8195. Signed-off-by: Bo-Chen Chen <[email protected]> Reviewed-by: AngeloGioacchino Del Regno <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Matthias Brugger <[email protected]>
2022-11-21arm64: dts: mt8195: Add dp-intf nodesBo-Chen Chen1-0/+23
Dp-intfs provide the pixel data to edptx and dptx. To support edptx and dptx, we need to add dp-intf0 and dp-intf1 nodes. Dp-intf0 is for edptx and dp-intf1 is for dptx. Signed-off-by: Bo-Chen Chen <[email protected]> Reviewed-by: AngeloGioacchino Del Regno <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Matthias Brugger <[email protected]>
2022-11-21arm64: dts: mediatek: mt6797: Fix 26M oscillator unit nameAngeloGioacchino Del Regno1-1/+1
Update its unit name to oscillator-26m and remove the unneeded unit address to fix a unit_address_vs_reg warning. Fixes: 464c510f60c6 ("arm64: dts: mediatek: add mt6797 support") Signed-off-by: AngeloGioacchino Del Regno <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Matthias Brugger <[email protected]>
2022-11-21arm64: dts: mediatek: pumpkin-common: Fix devicetree warningsAngeloGioacchino Del Regno1-3/+3
Fix the pinctrl submodes and optee node to remove unneeded unit address, fixing all unit_address_vs_reg warnings. Fixes: 9983822c8cf9 ("arm64: dts: mediatek: add pumpkin board dts") Signed-off-by: AngeloGioacchino Del Regno <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Matthias Brugger <[email protected]>
2022-11-21arm64: dts: mt2712-evb: Fix usb vbus regulators unit namesAngeloGioacchino Del Regno1-4/+4
Update the names to regulator-usb-p{0-3}-vbus to fix unit_address_vs_reg warnings for those. Fixes: 1724f4cc5133 ("arm64: dts: Add USB3 related nodes for MT2712") Signed-off-by: AngeloGioacchino Del Regno <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Matthias Brugger <[email protected]>
2022-11-21arm64: dts: mt2712-evb: Fix vproc fixed regulators unit namesAngeloGioacchino Del Regno1-2/+2
Update the names to regulator-vproc-buck{0,1} to fix unit_addres_vs_reg warnings for those. Fixes: f75dd8bdd344 ("arm64: dts: mediatek: add mt2712 cpufreq related device nodes") Signed-off-by: AngeloGioacchino Del Regno <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Matthias Brugger <[email protected]>
2022-11-21arm64: dts: mt2712e: Fix unit address for pinctrl nodeAngeloGioacchino Del Regno1-1/+1
The unit address for the pinctrl node is (0x)1000b000 and not (0x)10005000, which is the syscfg_pctl_a address instead. This fixes the following warning: arch/arm64/boot/dts/mediatek/mt2712e.dtsi:264.40-267.4: Warning (unique_unit_address): /syscfg_pctl_a@10005000: duplicate unit-address (also used in node /pinctrl@10005000) Fixes: f0c64340b748 ("arm64: dts: mt2712: add pintcrl device node.") Signed-off-by: AngeloGioacchino Del Regno <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Matthias Brugger <[email protected]>
2022-11-21arm64: dts: mt2712e: Fix unit_address_vs_reg warning for oscillatorsAngeloGioacchino Del Regno1-10/+10
Rename the fixed-clock oscillators to remove the unit address. This solves unit_address_vs_reg warnings. Fixes: 5d4839709c8e ("arm64: dts: mt2712: Add clock controller device nodes") Signed-off-by: AngeloGioacchino Del Regno <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Matthias Brugger <[email protected]>
2022-11-21arm64: dts: mt6779: Fix devicetree build warningsAngeloGioacchino Del Regno1-4/+4
Rename fixed-clock oscillators to oscillator-26m and oscillator-32k and remove the unit address to fix the unit_address_vs_reg warning; fix the unit address for interrupt and intpol controllers by removing a leading zero in their unit address. This commit fixes the following warnings: (unit_address_vs_reg): /oscillator@0: node has a unit name, but no reg or ranges property (unit_address_vs_reg): /oscillator@1: node has a unit name, but no reg or ranges property (simple_bus_reg): /soc/interrupt-controller@0c000000: simple-bus unit address format error, expected "c000000" (simple_bus_reg): /soc/intpol-controller@0c53a650: simple-bus unit address format error, expected "c53a650" Fixes: 4c7a6260775d ("arm64: dts: add dts nodes for MT6779") Signed-off-by: AngeloGioacchino Del Regno <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Matthias Brugger <[email protected]>
2022-11-21arm64: dts: mt7896a: Fix unit_address_vs_reg warning for oscillatorAngeloGioacchino Del Regno1-1/+1
Rename the oscillator fixed-clock to oscillator-40m and remove the unit address to fix warnings. arch/arm64/boot/dts/mediatek/mt7986a.dtsi:17.23-22.4: Warning (unit_address_vs_reg): /oscillator@0: node has a unit name, but no reg or ranges property Fixes: 1f9986b258c2 ("arm64: dts: mediatek: add clock support for mt7986a") Signed-off-by: AngeloGioacchino Del Regno <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Matthias Brugger <[email protected]>
2022-11-21arm64: dts: mediatek: mt8195: Fix CPUs capacity-dmips-mhzAngeloGioacchino Del Regno1-4/+4
The capacity-dmips-mhz parameter was miscalculated: this SoC runs the first (Cortex-A55) cluster at a maximum of 2000MHz and the second (Cortex-A78) cluster at a maximum of 3000MHz. In order to calculate the right capacity-dmips-mhz, the following test was performed: 1. CPUFREQ governor was set to 'performance' on both clusters 2. Ran dhrystone with 500000000 iterations for 10 times on each cluster 3. Calculate the mean result for each cluster 4. Calculate DMIPS/MHz: dmips_mhz = dmips_per_second / cpu_mhz 5. Scale results to 1024: result_c0 = (dmips_mhz_c0 - min_dmips_mhz(c0, c1)) / (max_dmips_mhz(c0, c1) - min_dmips_mhz(c0, c1)) * 1024 The mean results for this SoC are: Cluster 0 (LITTLE): 11990400 Dhry/s Cluster 1 (BIG): 59809036 Dhry/s The calculated scaled results are: Cluster 0: 307,934312801831 (rounded to 308) Cluster 1: 1024 Fixes: 37f2582883be ("arm64: dts: Add mediatek SoC mt8195 and evaluation board") Signed-off-by: AngeloGioacchino Del Regno <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Matthias Brugger <[email protected]>
2022-11-21Merge tag 'imx-fixes-6.1-3' of ↵Arnd Bergmann1-3/+3
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes i.MX fixes for 6.1, part 3: - Fix a small memory leak in mach-mxs code. - Correct PCIe pad configuration for imx8mp-evk board. - Fix ref/tcxo clock frequency property for imx6q-prti6q board. * tag 'imx-fixes-6.1-3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: dts: imx6q-prti6q: Fix ref/tcxo-clock-frequency properties arm64: dts: imx8mp-evk: correct pcie pad settings ARM: mxs: fix memory leak in mxs_machine_init() Link: https://lore.kernel.org/r/20221119073812.GQ16229@T480 Signed-off-by: Arnd Bergmann <[email protected]>
2022-11-21Merge tag 'sunxi-fixes-for-6.1-1' of ↵Arnd Bergmann1-0/+1
https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/fixes - RSB bus communication fixes - missing IOMMU reference property to H6 Hantro G2 * tag 'sunxi-fixes-for-6.1-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: arm64: dts: allwinner: h6: Add IOMMU reference to Hantro G2 media: dt-bindings: allwinner: h6-vpu-g2: Add IOMMU reference property bus: sunxi-rsb: Support atomic transfers bus: sunxi-rsb: Remove the shutdown callback Link: https://lore.kernel.org/r/Y3ftpBFk5+fndA4B@jernej-laptop Signed-off-by: Arnd Bergmann <[email protected]>
2022-11-21arm64: dts: amlogic: add initial Odroid Go Ultra DTSNeil Armstrong2-0/+723
This adds initial support for the Hardkernel Odroid Go Ultra. The Odroid Go Ultra is a portable gaming device with the following characteristics: - Amlogic S922X SoC - RK817 & RK818 PMICs - 2GiB LPDDR4 - On board 16GiB eMMC - Micro SD Card slot - 5inch 854×480 MIPI-DSI TFT LCD - Earphone stereo jack, 0.5Watt 8Ω Mono speaker - Li-Polymer 3.7V/4000mAh Battery - USB-A 2.0 Host Connector - x16 GPIO Input Buttons - 2x ADC Analog Joysticks - USB-C Port for USB2 Device and Charging The following are not yet handled: - Battery RK818 Gauge and Charging - Earphone stereo jack detect - 5inch 854×480 MIPI-DSI TFT LCD Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Neil Armstrong <[email protected]>
2022-11-21Merge tag 'sunxi-dt-for-6.2-1' of ↵Arnd Bergmann5-10/+240
https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into soc/dt - Added H616 USB node - Enabled bluetooth on Pinebook A64 - Added f1c100s PWM, I2C, CIR and LRADC nodes - Added USB HCI0 PHYs property to H3/H5 * tag 'sunxi-dt-for-6.2-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: ARM: dts: sunxi: H3/H5: Add phys property to USB HCI0 ARM: dts: suniv: f1c100s: add LRADC node ARM: dts: suniv: f1c100s: add CIR DT node dt-bindings: media: IR: Add F1C100s IR compatible string ARM: dts: suniv: f1c100s: add I2C DT nodes ARM: dts: suniv: f1c100s: add PWM node dt-bindings: pwm: allwinner,sun4i-a10: Add F1C100s compatible arm64: dts: allwinner: a64: enable Bluetooth on Pinebook arm64: dts: allwinner: h616: X96 Mate: Add USB nodes arm64: dts: allwinner: h616: OrangePi Zero 2: Add USB nodes arm64: dts: allwinner: h616: Add USB nodes dt-bindings: usb: Add H616 compatible string ARM: dts: axp22x/axp809: Add GPIO controller nodes ARM: dts: axp803/axp81x: Drop GPIO LDO pinctrl nodes Link: https://lore.kernel.org/r/Y3fuAosinWbrj+Dy@jernej-laptop Signed-off-by: Arnd Bergmann <[email protected]>
2022-11-21Merge tag 'samsung-dt64-6.2' of ↵Arnd Bergmann2-20/+20
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt Samsung DTS ARM64 changes for v6.2 Correct pin drive strength macros (names) and values used on Tesla FSD SoC. * tag 'samsung-dt64-6.2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: arm64: dts: fsd: fix drive strength values as per FSD HW UM arm64: dts: fsd: fix drive strength macros as per FSD HW UM Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnd Bergmann <[email protected]>
2022-11-21Merge tag 'imx-defconfig-6.2' of ↵Arnd Bergmann1-0/+3
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/defconfig i.MX defconfig change for 6.2: - Enable Renesas 9-series PCIe clock generator, SNVS LPGRP and i.MX8MP interconnect driver support in arm64 defconfig. - Enable Silergy SY7636A EPD PMIC, CYTTSP5 touchscreen and USB GPIO extcon support in imx_v6_v7_defconfig. * tag 'imx-defconfig-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: arm64: defconfig: Add Renesas 9-series PCIe clock generator ARM: imx_v6_v7_defconfig: Enable the cyttsp5 touchscreen ARM: imx_v6_v7_defconfig: Enable silergy,sy7636a ARM: imx_v6_v7_defconfig: Enable USB GPIO extcon support arm64: defconfig: enable i.mx 8m plus specific interconnect support arm64: defconfig: enable snvs lpgpr support Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnd Bergmann <[email protected]>
2022-11-21Merge tag 'tegra-for-6.2-arm64-defconfig' of ↵Arnd Bergmann1-0/+7
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/defconfig arm64: tegra: Default configuration updates for v6.2-rc1 This enables several audio-related options, as well as the Tegra186 timer and hardware timestamping engine drivers. * tag 'tegra-for-6.2-arm64-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: arm64: defconfig: Enable HTE config arm64: defconfig: Enable Tegra186 timer support arm64: defconfig: Enable SND_ALOOP arm64: defconfig: Enable couple of audio codecs Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnd Bergmann <[email protected]>
2022-11-21Merge tag 'renesas-arm-defconfig-for-v6.2-tag1' of ↵Arnd Bergmann1-1/+3
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/defconfig Renesas ARM defconfig updates for v6.2 - Enable support for Renesas R-Car S4-8 Spider Ethernet devices in the arm64 defconfig. * tag 'renesas-arm-defconfig-for-v6.2-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: arm64: defconfig: Enable Renesas R-Car S4-8 Spider Ethernet devices Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnd Bergmann <[email protected]>
2022-11-21arm64: dts: renesas: Rename DTB overlay source files from .dts to .dtsoAndrew Davis2-0/+0
DTB Overlays (.dtbo) can now be built from source files with the extension (.dtso). This makes it clear what is the content of the files and differentiates them from base DTB source files. Convert the DTB overlay source files in the arm64/renesas directory. Signed-off-by: Andrew Davis <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Geert Uytterhoeven <[email protected]>
2022-11-19KVM: arm64: PMU: Make kvm_pmc the main data structureMarc Zyngier1-87/+87
The PMU code has historically been torn between referencing a counter as a pair vcpu+index or as the PMC pointer. Given that it is pretty easy to go from one representation to the other, standardise on the latter which, IMHO, makes the code slightly more readable. YMMV. Signed-off-by: Marc Zyngier <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-11-19KVM: arm64: PMU: Simplify vcpu computation on perf overflow notificationMarc Zyngier1-4/+1
The way we compute the target vcpu on getting an overflow is a bit odd, as we use the PMC array as an anchor for kvm_pmc_to_vcpu, while we could directly compute the correct address. Get rid of the intermediate step and directly compute the target vcpu. Signed-off-by: Marc Zyngier <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-11-19KVM: arm64: PMU: Allow PMUv3p5 to be exposed to the guestMarc Zyngier1-1/+1
Now that the infrastructure is in place, bump the PMU support up to PMUv3p5. Signed-off-by: Marc Zyngier <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-11-19KVM: arm64: PMU: Implement PMUv3p5 long counter supportMarc Zyngier2-3/+9
PMUv3p5 (which is mandatory with ARMv8.5) comes with some extra features: - All counters are 64bit - The overflow point is controlled by the PMCR_EL0.LP bit Add the required checks in the helpers that control counter width and overflow, as well as the sysreg handling for the LP bit. A new kvm_pmu_is_3p5() helper makes it easy to spot the PMUv3p5 specific handling. Signed-off-by: Marc Zyngier <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-11-19KVM: arm64: PMU: Allow ID_DFR0_EL1.PerfMon to be set from userspaceMarc Zyngier1-1/+56
Allow userspace to write ID_DFR0_EL1, on the condition that only the PerfMon field can be altered and be something that is compatible with what was computed for the AArch64 view of the guest. Reviewed-by: Reiji Watanabe <[email protected]> Signed-off-by: Marc Zyngier <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-11-19KVM: arm64: PMU: Allow ID_AA64DFR0_EL1.PMUver to be set from userspaceMarc Zyngier1-1/+41
Allow userspace to write ID_AA64DFR0_EL1, on the condition that only the PMUver field can be altered and be at most the one that was initially computed for the guest. Reviewed-by: Reiji Watanabe <[email protected]> Signed-off-by: Marc Zyngier <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-11-19KVM: arm64: PMU: Move the ID_AA64DFR0_EL1.PMUver limit to VM creationMarc Zyngier4-8/+49
As further patches will enable the selection of a PMU revision from userspace, sample the supported PMU revision at VM creation time, rather than building each time the ID_AA64DFR0_EL1 register is accessed. This shouldn't result in any change in behaviour. Reviewed-by: Reiji Watanabe <[email protected]> Signed-off-by: Marc Zyngier <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-11-19KVM: arm64: PMU: Do not let AArch32 change the counters' top 32 bitsMarc Zyngier1-8/+27
Even when using PMUv3p5 (which implies 64bit counters), there is no way for AArch32 to write to the top 32 bits of the counters. The only way to influence these bits (other than by counting events) is by writing PMCR.P==1. Make sure we obey the architecture and preserve the top 32 bits on a counter update. Signed-off-by: Marc Zyngier <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-11-19arm64: dts: freescale: Rename DTB overlay source files from .dts to .dtsoAndrew Davis14-0/+0
DTB Overlays (.dtbo) can now be built from source files with the extension (.dtso). This makes it clear what is the content of the files and differentiates them from base DTB source files. Convert the DTB overlay source files in the arm64/freescale directory. Signed-off-by: Andrew Davis <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Tested-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2022-11-19arm64: dts: imx8mm-evk: add vcc supply for pca6416Adrian Alonso1-0/+1
pca6146 requires vcc-supply to work on i.MX8MM-EVK board. Reviewed-by: Shengjiu Wang <[email protected]> Signed-off-by: Adrian Alonso <[email protected]> Signed-off-by: Peng Fan <[email protected]> Reviewed-by: Marco Felsch <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2022-11-19arm64: dts: imx8m[m,q]-evk: change to use off-on-delay-us in regulatorHaibo Chen2-0/+2
Some SD Card controller and power circuitry has increased capacitance, so the usual toggling of regulator to power the card off and on is insufficient. According to SD spec, for sd card power reset operation, the sd card supply voltage needs to be lower than 0.5v and keep over 1ms, otherwise, next time power back the sd card supply voltage to 3.3v, sd card can't support SD3.0 mode again. This patch add the off-on-delay-us, make sure the sd power reset behavior is align with the specification. Without this patch, when do quick system suspend/resume test, some sd card can't work at SD3.0 mode after system resume back. Signed-off-by: Haibo Chen <[email protected]> Signed-off-by: Peng Fan <[email protected]> Reviewed-by: Marco Felsch <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2022-11-19arm64: dts: imx8mn-evk: enable uart1Peng Fan1-0/+18
Enable uart1 for BT usage Configure the clock to source from IMX8MN_SYS_PLL1_80M, because the uart could only support max 1.5M buadrate if using OSC_24M as clock source. Signed-off-by: Peng Fan <[email protected]> Reviewed-by: Marco Felsch <[email protected]> Signed-off-by: Shawn Guo <[email protected]>