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2020-09-26Merge tag 'ti-k3-dt-fixes-for-v5.9' of ↵Olof Johansson37-196/+357
git://git.kernel.org/pub/scm/linux/kernel/git/nmenon/linux into arm/fixes Tag fix up for TI serdes mux definition introduced in 5.9 * tag 'ti-k3-dt-fixes-for-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/nmenon/linux: (637 commits) arm64: dts: ti: k3-j721e: Rename mux header and update macro names Linux 5.9-rc3 genirq/matrix: Deal with the sillyness of for_each_cpu() on UP fsldma: fix very broken 32-bit ppc ioread64 functionality kernel.h: Silence sparse warning in lower_32_bits cifs: fix check of tcon dfs in smb1 KVM: arm64: Set HCR_EL2.PTW to prevent AT taking synchronous exception KVM: arm64: Survive synchronous exceptions caused by AT instructions KVM: arm64: Add kvm_extable for vaxorcism code arm64: vdso32: make vdso32 install conditional arm64: use a common .arch preamble for inline assembly mfd: mfd-core: Ensure disabled devices are ignored without error usb: storage: Add unusual_uas entry for Sony PSZ drives md/raid5: make sure stripe_size as power of two powerpc/32s: Disable VMAP stack which CONFIG_ADB_PMU io_uring: don't bounce block based -EAGAIN retry off task_work io_uring: fix IOPOLL -EAGAIN retries arm64/cpuinfo: Remove unnecessary fallthrough annotation media: dib0700: Fix identation issue in dib8096_set_param_override() hwmon: (gsc-hwmon) Scale temperature to millidegrees ... Link: https://lore.kernel.org/r/20200921125402.mtwypblhb45a6ssh@akan Signed-off-by: Olof Johansson <[email protected]>
2020-09-26Merge tag 'samsung-dt64-5.10-2' of ↵Olof Johansson1-5/+1
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt Samsung DTS ARM64 changes for v5.10, part two Minor cleanups: removal of undocumented I2S properties, alignment of OPP table node name with dtschema. * tag 'samsung-dt64-5.10-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: arm64: dts: exynos: Align OPP table name with dt-schema arm64: dts: exynos: Remove undocumented i2s properties in Exynos5433 Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Olof Johansson <[email protected]>
2020-09-26Merge tag 'tegra-for-5.10-arm64-dt' of ↵Olof Johansson15-12/+927
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt arm64: tegra: Changes for v5.10-rc1 This set of changes fixes some minor issues in existing device trees and adds ID EEPROMs on the Jetson Xavier NX. All ID EEPROMs are now labelled to allow them to be detected by software. It also adds support for the Tegra234 VDK board, which is a pre-silicon platform for the upcoming Orin SoC. * tag 'tegra-for-5.10-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: arm64: tegra: Initial Tegra234 VDK support arm64: tegra: Populate EEPROMs for Jetson Xavier NX arm64: tegra: Add label properties for EEPROMs arm64: tegra: Add DT binding for AHUB components arm64: tegra: Enable ACONNECT, ADMA and AGIC on Jetson Nano arm64: tegra: Properly size register regions for GPU on Tegra194 arm64: tegra: Use valid PWM period for VDD_GPU on Tegra210 arm64: tegra: Describe display controller outputs for Tegra210 arm64: tegra: Disable SD card write-protection on Jetson Nano arm64: tegra: Add VBUS supply for micro USB port on Jetson Nano arm64: tegra: Wire up pinctrl states for all DPAUX controllers arm64: tegra: Add ID EEPROMs on Jetson AGX Xavier Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Olof Johansson <[email protected]>
2020-09-26Merge tag 'renesas-arm-dt-for-v5.10-tag2' of ↵Olof Johansson20-28/+573
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt Renesas ARM DT updates for v5.10 (take two) - PCIe endpoint support for the RZ/G2H SoC, - SATA support for the HopeRun HiHope RZ/G2H board, - Increase support (CAN, LED, SPI NOR, VIN, VSP) for the RZ/G1H SoC on the iWave Qseven board (G21D), and its camera add-on board, - Initial support for the R-Car V3U SoC on the Falcon CPU and BreakOut boards, - HDMI display and sound support for the R-Car M3-W+ SoC on the Salvator-XS board, - Digital Radio Interface (DRIF) support for the R-Car E3 SoC, - Minor fixes and cleanups. * tag 'renesas-arm-dt-for-v5.10-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (24 commits) arm64: dts: renesas: r8a774c0: Fix MSIOF1 DMA channels arm64: dts: renesas: r8a77990: Fix MSIOF1 DMA channels arm64: dts: renesas: r8a77990: Add DRIF support ARM: dts: r8a7742-iwg21d-q7-dbcm-ca: Add can0 support to camera DB ARM: dts: r8a7742: Add VSP support arm64: dts: renesas: Drop superfluous pin configuration containers arm64: dts: renesas: r8a77961: salvator-xs: Add HDMI Sound support arm64: dts: renesas: r8a77961: salvator-xs: Add HDMI Display support arm64: dts: renesas: r8a77961: Add HDMI device nodes arm64: dts: renesas: r8a77961: Add DU device nodes arm64: dts: renesas: r8a77961: Add VSP device nodes arm64: dts: renesas: r8a77961: Add FCP device nodes arm64: dts: renesas: Fix pin controller node names ARM: dts: renesas: Fix pin controller node names arm64: dts: renesas: Add Renesas Falcon boards support arm64: dts: renesas: Add Renesas R8A779A0 SoC support ARM: dts: r8a7742-iwg21d-q7: Enable SD2 LED indication ARM: dts: r8a7742-iwg21d-q7: Add can1 support to carrier board ARM: dts: r8a7742-iwg21d-q7: Add SPI NOR support ARM: dts: r8a7742: Add VIN DT nodes ... Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Olof Johansson <[email protected]>
2020-09-26arm64: dts: apm: add required gpio-cells to DW APB GPIO controller portKrzysztof Kozlowski2-0/+2
The Synopsys DesignWare APB GPIO controller port must have gpio-cells property, as pointed by dtschema: arch/arm64/boot/dts/apm/apm-mustang.dt.yaml: gpio@1c024000: gpio-controller@0: '#gpio-cells' is a required property Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Olof Johansson <[email protected]>
2020-09-26arm64: dts: apm: drop unused reg-io-width from DW APB GPIO controllerKrzysztof Kozlowski2-2/+0
The Synopsys DesignWare APB GPIO controller driver does not parse reg-io-width and dtschema does not allow it so drop it to fix dtschema warnings like: arch/arm64/boot/dts/apm/apm-mustang.dt.yaml: gpio@1c024000: 'reg-io-width' does not match any of the regexes: '^gpio-(port|controller)@[0-9a-f]+$', 'pinctrl-[0-9]+' Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Olof Johansson <[email protected]>
2020-09-26Merge tag 'socfpga_dts_update_for_v5.10' of ↵Olof Johansson2-13/+13
git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/dt SoCFPGA DTS updates for v5.10 - Increase shared-dma-pool size to 32MB - Add ptp_ref clock properties to the ethernet nodes on Stratix10 and Agilex * tag 'socfpga_dts_update_for_v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: arm64: dts: stratix10/agilex: add the ptp_ref clock arm64: dts: agilex: increase shared memory size to 32Mb Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Olof Johansson <[email protected]>
2020-09-26Merge tag 'sparx5-dt-5.10' of ↵Olof Johansson9-0/+277
https://github.com/microchip-ung/linux-upstream into arm/dt Sparx5 DT updates for Linux 5.10 - Add public repo to MAINTAINERS - Add SPI controller and devices - Add eMMC controller and devices - Add temperature sensor * tag 'sparx5-dt-5.10' of https://github.com/microchip-ung/linux-upstream: arm64: dts: sparx5: Add spi-nand devices arm64: dts: sparx5: Add spi-nor support arm64: dts: sparx5: Add SPI controller and associated mmio-mux MAINTAINERS: Add git tree for Sparx5 arm64: dts: sparx5: Add hwmon temperature sensor arm64: dts: sparx5: Add Sparx5 eMMC support Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Olof Johansson <[email protected]>
2020-09-26Merge tag 'hisi-arm64-dt-for-5.10' of git://github.com/hisilicon/linux-hisi ↵Olof Johansson8-42/+45
into arm/dt ARM64: DT: Hisilicon ARM64 SoCs DT updates for 5.10 - Change the status properties from "ok" to "okay" for all the hisilicon SoCs - Update the SP805 nodes to have the correct clocks and clock names for the hi3660 and hi6220 SoCs * tag 'hisi-arm64-dt-for-5.10' of git://github.com/hisilicon/linux-hisi: arm64: dts: hisilicon: Fix SP805 clocks arm64: dts: hisilicon: replace status value "ok" by "okay" Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Olof Johansson <[email protected]>
2020-09-25arm64: dts: ti: k3-j721e-common-proc-board: align GPIO hog names with dtschemaKrzysztof Kozlowski1-2/+2
The convention for node names is to use hyphens, not underscores. dtschema for pca95xx expects GPIO hogs to end with 'hog' prefix. Signed-off-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Nishanth Menon <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-09-25Merge branch 'master' of ↵Christoph Hellwig23-89/+164
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into dma-mapping-for-next Pull in the latest 5.9 tree for the commit to revert the V4L2_FLAG_MEMORY_NON_CONSISTENT uapi addition.
2020-09-25kbuild: remove cc-option test of -Werror=date-timeMasahiro Yamada1-1/+1
The minimal compiler versions, GCC 4.9 and Clang 10 support this flag. Here is the godbolt: https://godbolt.org/z/xvjcMa Signed-off-by: Masahiro Yamada <[email protected]> Reviewed-by: Nathan Chancellor <[email protected]> Acked-by: Will Deacon <[email protected]>
2020-09-25kbuild: remove cc-option test of -fno-strict-overflowMasahiro Yamada1-1/+1
The minimal compiler versions, GCC 4.9 and Clang 10 support this flag. Here is the godbolt: https://godbolt.org/z/odq8h9 Signed-off-by: Masahiro Yamada <[email protected]> Reviewed-by: Nathan Chancellor <[email protected]> Acked-by: Will Deacon <[email protected]>
2020-09-25kbuild: preprocess module linker scriptMasahiro Yamada2-4/+2
There was a request to preprocess the module linker script like we do for the vmlinux one. (https://lkml.org/lkml/2020/8/21/512) The difference between vmlinux.lds and module.lds is that the latter is needed for external module builds, thus must be cleaned up by 'make mrproper' instead of 'make clean'. Also, it must be created by 'make modules_prepare'. You cannot put it in arch/$(SRCARCH)/kernel/, which is cleaned up by 'make clean'. I moved arch/$(SRCARCH)/kernel/module.lds to arch/$(SRCARCH)/include/asm/module.lds.h, which is included from scripts/module.lds.S. scripts/module.lds is fine because 'make clean' keeps all the build artifacts under scripts/. You can add arch-specific sections in <asm/module.lds.h>. Signed-off-by: Masahiro Yamada <[email protected]> Tested-by: Jessica Yu <[email protected]> Acked-by: Will Deacon <[email protected]> Acked-by: Geert Uytterhoeven <[email protected]> Acked-by: Palmer Dabbelt <[email protected]> Reviewed-by: Kees Cook <[email protected]> Acked-by: Jessica Yu <[email protected]>
2020-09-24arm64: dts: ti: k3-j7200-common-proc-board: Add support for eMMC and SD cardFaiz Abbas1-0/+28
Add support for the eMMC and SD card connected on the common processor board sdhci0 is connected to an eMMC while sdhci1 is connected to the micro SD slot. Signed-off-by: Faiz Abbas <[email protected]> Signed-off-by: Nishanth Menon <[email protected]> Tested-by: Vignesh Raghavendra <[email protected]> Reviewed-by: Sekhar Nori <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-09-24arm64: dts: ti: k3-j7200-main: Add support for MMC/SD controller nodesFaiz Abbas1-0/+37
Add support for MMC/SD controller nodes present on TI's j7200 SoCs. There are two nodes: 1. sdhci0 (8 bit bus width, 200 MHz, HS200, 200 MBps) 2. sdhci1 (4 bit bus width, 50 MHz, HS, 25 MBps) Signed-off-by: Faiz Abbas <[email protected]> Signed-off-by: Nishanth Menon <[email protected]> Tested-by: Vignesh Raghavendra <[email protected]> Reviewed-by: Sekhar Nori <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-09-24arm64: dts: ti: k3-j7200-som-p0: Add HyperFlash nodeVignesh Raghavendra1-0/+36
J7200 SoM has a HyperFlash connected to HyperBus memory controller. But HyperBus is muxed with OSPI, therefore keep HyperBus node disabled. Bootloader will detect the mux and enable the node as required. Signed-off-by: Vignesh Raghavendra <[email protected]> Signed-off-by: Nishanth Menon <[email protected]> Reviewed-by: Sekhar Nori <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-09-24arm64: dts: ti: k3-j7200-mcu-wakeup: Add HyperBus nodeVignesh Raghavendra1-0/+27
J7200 has a Flash SubSystem that has one OSPI and one HyperBus.. Add DT nodes for HyperBus controller for now. Signed-off-by: Vignesh Raghavendra <[email protected]> Signed-off-by: Nishanth Menon <[email protected]> Reviewed-by: Sekhar Nori <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-09-24arm64: dts: ti: k3-j7200-common-proc-board: Add I2C IO expandersVignesh Raghavendra1-0/+49
Add DT nodes for I2C GPIO expanders on main_i2c0 and main_i2c1 and also add the pinmux corresponding to these I2C instances. Signed-off-by: Vignesh Raghavendra <[email protected]> Signed-off-by: Nishanth Menon <[email protected]> Reviewed-by: Sekhar Nori <[email protected]> Reviewed-by: Faiz Abbas <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-09-24arm64: dts: ti: k3-j7200: Add I2C nodesVignesh Raghavendra2-0/+110
J7200 has 7 I2Cs in main domain, 2 I2Cs in MCU and 1 in wakeup domain. Add DT nodes for the same. Signed-off-by: Vignesh Raghavendra <[email protected]> Signed-off-by: Nishanth Menon <[email protected]> Reviewed-by: Sekhar Nori <[email protected]> Reviewed-by: Faiz Abbas <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-09-24arm64: dts: ti: k3-j7200-common-proc-board: add mcu cpsw nuss pinmux and phy ↵Grygorii Strashko1-0/+45
defs The TI J7200 EVM base board has TI DP83867 PHY connected to external CPSW NUSS Port 1 in rgmii-rxid mode. Hence, add pinmux and Ethernet PHY configuration for TI J7200 SoC MCU Gigabit Ethernet two ports Switch subsystem (CPSW NUSS). Signed-off-by: Grygorii Strashko <[email protected]> Signed-off-by: Nishanth Menon <[email protected]> Reviewed-by: Suman Anna <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-09-24arm64: dts: ti: k3-j7200-mcu: add mcu cpsw nuss nodeGrygorii Strashko1-0/+74
Add DT node for The TI J7200 MCU SoC Gigabit Ethernet two ports Switch subsystem (MCU CPSW NUSS). Signed-off-by: Grygorii Strashko <[email protected]> Signed-off-by: Nishanth Menon <[email protected]> Reviewed-by: Suman Anna <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-09-24arm64: dts: ti: k3-j7200-main: add main navss cpts nodeGrygorii Strashko1-0/+12
Add DT node for Main NAVSS CPTS module. Signed-off-by: Grygorii Strashko <[email protected]> Signed-off-by: Nishanth Menon <[email protected]> Reviewed-by: Suman Anna <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-09-24arm64: dts: ti: k3-j7200: add DMA supportPeter Ujfalusi2-0/+80
Add the ringacc and udmap nodes for Main and MCU NAVSS. Signed-off-by: Peter Ujfalusi <[email protected]> Signed-off-by: Grygorii Strashko <[email protected]> Signed-off-by: Nishanth Menon <[email protected]> Reviewed-by: Suman Anna <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-09-24arm64: dts: marvell: espressobin: Add ethernet switch aliasesPali Rohár3-8/+24
Espressobin boards have 3 ethernet ports and some of them got assigned more then one MAC address. MAC addresses are stored in U-Boot environment. Since commit a2c7023f7075c ("net: dsa: read mac address from DT for slave device") kernel can use MAC addresses from DT for particular DSA port. Currently Espressobin DTS file contains alias just for ethernet0. This patch defines additional ethernet aliases in Espressobin DTS files, so bootloader can fill correct MAC address for DSA switch ports if more MAC addresses were specified. DT alias ethernet1 is used for wan port, DT aliases ethernet2 and ethernet3 are used for lan ports for both Espressobin revisions (V5 and V7). Fixes: 5253cb8c00a6f ("arm64: dts: marvell: espressobin: add ethernet alias") Cc: <[email protected]> # a2c7023f7075c: dsa: read mac address Signed-off-by: Pali Rohár <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Reviewed-by: Andre Heider <[email protected]> Signed-off-by: Gregory CLEMENT <[email protected]>
2020-09-24arm64: dts: qcom: sm8250: Add thermal zones and throttling supportAmit Kucheria1-0/+766
sm8250 has 24 thermal sensors split across two tsens controllers. Add the thermal zones to expose them and wireup the cpus to throttle on crossing passive temperature thresholds. Signed-off-by: Amit Kucheria <[email protected]> Link: https://lore.kernel.org/r/89b83b3caa4e32db08fe402cfa510feb25232aa0.1599732068.git.amitk@kernel.org Signed-off-by: Bjorn Andersson <[email protected]>
2020-09-24arm64: defconfig: enable Qualcomm ASoC modulesDmitry Baryshkov1-0/+3
Enable CONFIG_SND_SOC_QCOM and several platform drivers to be built as modules. Signed-off-by: Dmitry Baryshkov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2020-09-24arm64: defconfig: qcom: enable GPU clock controller for SM8[12]50Dmitry Baryshkov1-0/+2
Enable GPU Clock Controller for SM8150 and SM8250 to allow using Adreon GPU on these SoCs. Signed-off-by: Dmitry Baryshkov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2020-09-24arm64: defconfig: enable INTERCONNECT for Qualcomm chipsetsDmitry Baryshkov1-0/+6
Enable CONFIG_INTERCONNECT and interconnect drivers for several Qualcomm chipsets to enable bus bandwidth control on these SoCs. Signed-off-by: Dmitry Baryshkov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2020-09-23arm64: dts: ti: Add support for J7200 Common Processor BoardLokesh Vutla3-0/+96
Add support for J7200 Common Processor Board. The EVM architecture is very similar to J721E as follows: +------------------------------------------------------+ | +-------------------------------------------+ | | | | | | | Add-on Card 1 Options | | | | | | | +-------------------------------------------+ | | | | | | +-------------------+ | | | | | | | SOM | | | +--------------+ | | | | | | | | | | | Add-on | +-------------------+ | | | Card 2 | | Power Supply | | Options | | | | | | | | | +--------------+ | <--- +------------------------------------------------------+ Common Processor Board Common Processor board is the baseboard that has most of the actual connectors, power supply etc. A SOM (System on Module) is plugged on to the common processor board and this contains the SoC, PMIC, DDR and basic high speed components necessary for functionality. Note: * The minimum configuration required to boot up the board is System On Module(SOM) + Common Processor Board. * Since there is just a single SOM and Common Processor Board, we are maintaining common processor board as the base dts and SOM as the dtsi that we include. In the future as more SOM's appear, we should move common processor board as a dtsi and include configurations as dts. * All daughter cards beyond the basic boards shall be maintained as overlays. Signed-off-by: Lokesh Vutla <[email protected]> Signed-off-by: Peter Ujfalusi <[email protected]> Signed-off-by: Nishanth Menon <[email protected]> Reviewed-by: Grygorii Strashko <[email protected]> Reviewed-by: Suman Anna <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-09-23arm64: dts: ti: Add support for J7200 SoCLokesh Vutla3-0/+503
The J7200 SoC is a part of the K3 Multicore SoC architecture platform. It is targeted for automotive gateway, vehicle compute systems, Vehicle-to-Vehicle (V2V) and Vehicle-to-Everything (V2X) applications. The SoC aims to meet the complex processing needs of modern embedded products. Some highlights of this SoC are: * Dual Cortex-A72s in a single cluster, two clusters of lockstep capable dual Cortex-R5F MCUs and a Centralized Device Management and Security Controller (DMSC). * Configurable L3 Cache and IO-coherent architecture with high data throughput capable distributed DMA architecture under NAVSS. * Integrated Ethernet switch supporting up to a total of 4 external ports in addition to legacy Ethernet switch of up to 2 ports. * Upto 1 PCIe-GEN3 controller, 1 USB3.0 Dual-role device subsystems, 20 MCANs, 3 McASP, eMMC and SD, OSPI/HyperBus memory controller, I3C and I2C, eCAP/eQEP, eHRPWM among other peripherals. * One hardware accelerator block containing AES/DES/SHA/MD5 called SA2UL management. See J7200 Technical Reference Manual (SPRUIU1, June 2020) for further details: https://www.ti.com/lit/pdf/spruiu1 Signed-off-by: Lokesh Vutla <[email protected]> Signed-off-by: Nishanth Menon <[email protected]> Reviewed-by: Grygorii Strashko <[email protected]> Reviewed-by: Suman Anna <[email protected]> Reviewed-by: Vignesh Raghavendra <[email protected]> Reviewed-by: Kishon Vijay Abraham I <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-09-23arm64: dts: ti: Makefile: Use ARCH_K3 for building dtbsLokesh Vutla1-3/+3
To allow lesser dependency and better maintainability use CONFIG_ARCH_K3 for building dtbs for all K3 based devices. This is as per the discussion in [0]. [0] https://lore.kernel.org/linux-arm-kernel/20200908112534.t5bgrjf7y3a6l2ss@akan/ Signed-off-by: Lokesh Vutla <[email protected]> Signed-off-by: Nishanth Menon <[email protected]> Reviewed-by: Suman Anna <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-09-23arm64: dts: rockchip: add ir-receiver node to rk3399-khadas-edgeArtem Lapkin1-0/+14
add missed ir-receiver and ir_rx pinctl nodes to rk3399-khadas-edge Khadas Edge board uses gpio-ir-receiver on RK_PB6 gpio Signed-off-by: Artem Lapkin <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Heiko Stuebner <[email protected]>
2020-09-23arm64: dts: rockchip: add spiflash node to rk3399-khadas-edgeArtem Lapkin1-0/+10
The Khadas Edge Boards uses winbond - w25q128 spi flash with 104Mhz Signed-off-by: Artem Lapkin <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Heiko Stuebner <[email protected]>
2020-09-23arm64: defconfig: Enable configs for Toshiba ViscontiNobuhiro Iwamatsu1-0/+1
Enable support for the Toshiba Visconti SoCs. Signed-off-by: Nobuhiro Iwamatsu <[email protected]> Reviewed-by: Punit Agrawal <[email protected]>
2020-09-23arm64: dts: visconti: Add device tree for TMPV7708 RM main boardNobuhiro Iwamatsu5-0/+529
Add basic support for the Visconti TMPV7708 SoC peripherals - - CPU - CA53 x 4 and 2 cluster. - not support PSCI, currently only spin-table is supported. - Interrupt controller (ARM Generic Interrupt Controller) - Timer (ARM architected timer) - UART (ARM PL011 UART controller) - SPI (ARM PL022 SPI controller) - I2C (Synopsys DesignWare APB I2C Controller) - Pin control (Visconti specific) Signed-off-by: Nobuhiro Iwamatsu <[email protected]> Reviewed-by: Punit Agrawal <[email protected]>
2020-09-23arm64: visconti: Add initial support for Toshiba Visconti platformNobuhiro Iwamatsu1-0/+7
Add the initial device tree files for Toshiba Visconti platform. For starters, the only SoC supported will be Visconti5 TMPV7708. https://toshiba.semicon-storage.com/ap-en/semiconductor/product/image-recognition-processors-visconti.html Signed-off-by: Nobuhiro Iwamatsu <[email protected]> Reviewed-by: Punit Agrawal <[email protected]>
2020-09-22fs: remove compat_sys_mountChristoph Hellwig1-1/+1
compat_sys_mount is identical to the regular sys_mount now, so remove it and use the native version everywhere. Signed-off-by: Christoph Hellwig <[email protected]> Signed-off-by: Al Viro <[email protected]>
2020-09-22Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netDavid S. Miller17-64/+128
Two minor conflicts: 1) net/ipv4/route.c, adding a new local variable while moving another local variable and removing it's initial assignment. 2) drivers/net/dsa/microchip/ksz9477.c, overlapping changes. One pretty prints the port mode differently, whilst another changes the driver to try and obtain the port mode from the port node rather than the switch node. Signed-off-by: David S. Miller <[email protected]>
2020-09-22arm64: dts: rockchip: Add support for FriendlyARM NanoPi R2SDavid Bauer2-0/+369
This adds support for the NanoPi R2S from FriendlyARM. Rockchip RK3328 SoC 1GB DDR4 RAM Gigabit Ethernet (WAN) Gigabit Ethernet (USB3) (LAN) USB 2.0 Host Port MicroSD slot Reset button WAN - LAN - SYS LED Signed-off-by: David Bauer <[email protected]> Link: https://lore.kernel.org/r/[email protected] [adapted from sdmmc0m1_gpio to renamed sdmmc0m1_pin] Reported-by: kernel test robot <[email protected]> Signed-off-by: Heiko Stuebner <[email protected]>
2020-09-22arm64: dts: ti: k3-j721e-common-proc-board: Configure the PCIe instancesKishon Vijay Abraham I1-0/+80
J721E Common Processor Board has PCIe connectors for the 1st three PCIe instances. Configure the three PCIe instances in RC mode and disable the 4th PCIe instance. Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Nishanth Menon <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-09-22arm64: dts: ti: k3-j721e-main: Add PCIe device tree nodesKishon Vijay Abraham I2-2/+235
Add PCIe device tree nodes (both RC and EP) for the four PCIe instances here. Also add the missing translations required in the "ranges" DT property of cbass_main to access all the four PCIe instances. Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Nishanth Menon <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-09-22Merge branch 'x86-seves-for-paolo' of ↵Paolo Bonzini41-204/+365
https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip into HEAD
2020-09-22arm64: dts: imx8mq-librem5: correct GPIO hog propertyKrzysztof Kozlowski1-1/+1
Correct the name of property for GPIO specifier in GPIO hog. Signed-off-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2020-09-22arm64: dts: imx8mm-var-som-symphony: Drop wake-up source from RTCKrzysztof Kozlowski1-1/+0
The RTC on Symphony board does not have its interrupt pin connected to the SoC, therefore it is not capable of waking up. Signed-off-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2020-09-22arm64: dts: imx8mq: correct interrupt flagsKrzysztof Kozlowski4-5/+9
GPIO_ACTIVE_x flags are not correct in the context of interrupt flags. These are simple defines so they could be used in DTS but they will not have the same meaning: 1. GPIO_ACTIVE_HIGH = 0 = IRQ_TYPE_NONE 2. GPIO_ACTIVE_LOW = 1 = IRQ_TYPE_EDGE_RISING Correct the interrupt flags, assuming the author of the code wanted same logical behavior behind the name "ACTIVE_xxx", this is: ACTIVE_LOW => IRQ_TYPE_LEVEL_LOW Signed-off-by: Krzysztof Kozlowski <[email protected]> Acked-By: Tim Harvey <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2020-09-22arm64: dts: imx8mn: correct interrupt flagsKrzysztof Kozlowski3-3/+4
GPIO_ACTIVE_x flags are not correct in the context of interrupt flags. These are simple defines so they could be used in DTS but they will not have the same meaning: 1. GPIO_ACTIVE_HIGH = 0 = IRQ_TYPE_NONE 2. GPIO_ACTIVE_LOW = 1 = IRQ_TYPE_EDGE_RISING Correct the interrupt flags, assuming the author of the code wanted same logical behavior behind the name "ACTIVE_xxx", this is: ACTIVE_LOW => IRQ_TYPE_LEVEL_LOW For level low interrupts, enable also internal pull up. It is required at least on imx8mm-evk, according to schematics. Signed-off-by: Krzysztof Kozlowski <[email protected]> Acked-By: Tim Harvey <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2020-09-22arm64: dts: imx8mm: correct interrupt flagsKrzysztof Kozlowski4-6/+10
GPIO_ACTIVE_x flags are not correct in the context of interrupt flags. These are simple defines so they could be used in DTS but they will not have the same meaning: 1. GPIO_ACTIVE_HIGH = 0 = IRQ_TYPE_NONE 2. GPIO_ACTIVE_LOW = 1 = IRQ_TYPE_EDGE_RISING Correct the interrupt flags, assuming the author of the code wanted same logical behavior behind the name "ACTIVE_xxx", this is: ACTIVE_LOW => IRQ_TYPE_LEVEL_LOW ACTIVE_HIGH => IRQ_TYPE_LEVEL_HIGH In case of level low interrupts, enable also internal pull up. It is required at least on imx8mm-evk, according to schematics. The schematics for Variscite imx8mm-var-som are not available and I was unable to get proper configuration from Variscite. Signed-off-by: Krzysztof Kozlowski <[email protected]> Acked-By: Tim Harvey <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2020-09-22arm64: dts: imx8mm-var-som-symphony: fix ptn5150 interruptsKrzysztof Kozlowski1-1/+2
Conversion of int-gpios into interrupts property requires also interrupt-parent and uses different flags. Signed-off-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2020-09-22arm64: dts: layerscape: correct watchdog clocks for LS1088AZhao Qiang1-8/+8
On LS1088A, watchdog clk are divided by 16, correct it in dts. Signed-off-by: Zhao Qiang <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
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