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2020-11-30arm64: defconfig: Enable ROCKCHIP_LVDSJagan Teki1-0/+1
Now, some of the rockchip hardware platforms do enable lvds in mainline tree. So, enable Rockchip LVDS driver via default defconfig. Signed-off-by: Jagan Teki <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Heiko Stuebner <[email protected]>
2020-11-30arm64: dts: rockchip: Add BT support on px30-engicamSuniel Mahesh3-0/+32
Engicam PX30 carrier boards like EDIMM2.2 and C.TOUCH2.0 have an onboard Sterling-LWD Wifi/BT chip based on BCM43430 connected on the UART bus. UART bus on the design routed via USB to UART CP20x bridge. This bridge powered from 3V3 regualtor gpio. This patch adds BT enablement nodes for these respective boards. Signed-off-by: Michael Trimarchi <[email protected]> Signed-off-by: Suniel Mahesh <[email protected]> Signed-off-by: Jagan Teki <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Heiko Stuebner <[email protected]>
2020-11-30arm64: dts: rockchip: Add WiFi support on px30-engicamSuniel Mahesh3-0/+69
Engicam PX30 carrier boards like EDIMM2.2 and C.TOUCH2.0 have an onboard Sterling-LWD Wifi/BT chip based on BCM43430 connected on the SDIO bus. The SDIO power sequnce is connacted with exteernal 32KHz oscillator and it require 3V3 regulator input. This patch adds WiFi enablement nodes for these respective boards. Signed-off-by: Michael Trimarchi <[email protected]> Signed-off-by: Suniel Mahesh <[email protected]> Signed-off-by: Jagan Teki <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Heiko Stuebner <[email protected]>
2020-11-30arm64: dts: rockchip: Add Engicam PX30.Core C.TOUCH 2.0 10.1" OFJagan Teki2-0/+78
PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam. C.TOUCH 2.0 is a general purpose carrier board with capacitive touch interface support. 10.1" OF is a capacitive touch 10.1" Open Frame panel solutions. PX30.Core needs to mount on top of C.TOUCH 2.0 carrier with pluged 10.1" OF for creating complete PX30.Core C.TOUCH 2.0 10.1" Open Frame. Add support for it. Signed-off-by: Jagan Teki <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Heiko Stuebner <[email protected]>
2020-11-30arm64: dts: rockchip: Enable LVDS panel on px30-engicam-edimm2.2Jagan Teki3-0/+68
Engicam PX30.Core EDIMM2.2 developement Kit has on board 10" LVDS panel from yes-optoelectronics. This patch adds panel enablement nodes on respective dts(i) files. Signed-off-by: Jagan Teki <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Heiko Stuebner <[email protected]>
2020-11-30arm64: dts: rockchip: Enable USB Host, OTG on px30-enagicamJagan Teki1-0/+24
Engicam EDIMM2.2 and C.Touch 2.0 Kits support USB Host and OTG ports. Add support to enable USB on these kits while mounting px30-core SOM. Signed-off-by: Jagan Teki <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Heiko Stuebner <[email protected]>
2020-11-30arm64: dts: rockchip: rename sdhci nodename to mmc on rk3399Johan Jonker1-1/+1
A test with the command below gives for example this error: /arch/arm64/boot/dts/rockchip/rk3399-evb.dt.yaml: sdhci@fe330000: $nodename:0: 'sdhci@fe330000' does not match '^mmc(@.*)?$' Fix it by renaming sdhci to mmc. make ARCH=arm64 dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/ mmc/arasan,sdhci.yaml Signed-off-by: Johan Jonker <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Heiko Stuebner <[email protected]>
2020-11-30arm64: dts: rockchip: Enable analog audio on rk3328-roc-ccChen-Yu Tsai1-0/+12
Now that driver support for the RK3328's audio codec, and the plumbing is defined at the SoC level, we can enable analog audio at the board level. Enable analog audio by enabling the codec and the I2S interface connected and the simple-audio-card that binds them together. Signed-off-by: Chen-Yu Tsai <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Heiko Stuebner <[email protected]>
2020-11-30arm64: dts: rockchip: Enable HDMI audio on rk3328-roc-ccChen-Yu Tsai1-0/+8
The RK3328-ROC-CC already has HDMI display output enabled. Now that audio for the HDMI controller is supported, it can be enabled as well. Enable the simple-audio-card, and the I2S interface the audio is fed from. Signed-off-by: Chen-Yu Tsai <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Heiko Stuebner <[email protected]>
2020-11-30arm64: dts: rockchip: Set dr_mode to "host" for OTG on rk3328-roc-ccChen-Yu Tsai1-0/+1
The board has a standard USB A female port connected to the USB OTG controller's data pins. Set dr_mode in the OTG controller node to indicate this usage, instead of having the implementation guess. Fixes: 2171f4fdac06 ("arm64: dts: rockchip: add roc-rk3328-cc board") Signed-off-by: Chen-Yu Tsai <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Heiko Stuebner <[email protected]>
2020-11-29Merge tag 'locking-urgent-2020-11-29' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull locking fixes from Thomas Gleixner: "Two more places which invoke tracing from RCU disabled regions in the idle path. Similar to the entry path the low level idle functions have to be non-instrumentable" * tag 'locking-urgent-2020-11-29' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: intel_idle: Fix intel_idle() vs tracing sched/idle: Fix arch_cpu_idle() vs tracing
2020-11-29arm64: dts: armada-3720-turris-mox: update ethernet-phy handle nameMarek Behún1-1/+1
Use property name `phy-handle` instead of the deprecated `phy` to connect eth2 to the PHY. Signed-off-by: Marek Behún <[email protected]> Fixes: 7109d817db2e ("arm64: dts: marvell: add DTS for Turris Mox") Cc: Gregory CLEMENT <[email protected]> Cc: Andrew Lunn <[email protected]> Cc: Rob Herring <[email protected]> Cc: [email protected] Reviewed-by: Andrew Lunn <[email protected]> Signed-off-by: Gregory CLEMENT <[email protected]>
2020-11-29arm64: dts: marvell: armada-cp110: Switch to per-port SATA interruptsSven Auhagen1-3/+3
There are two SATA ports per CP110. Each of them has a dedicated interrupt. Describe the real hardware by adding two SATA ports to the CP110 SATA node. Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Sven Auhagen <[email protected]> Signed-off-by: Thomas Petazzoni <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Signed-off-by: Gregory CLEMENT <[email protected]>
2020-11-29arm64: dts: marvell: add DT for ESPRESSObin-UltraVladimir Vid2-0/+166
This adds support for ESPRESSObin-Ultra from Globalscale. Specifications are similar to the base ESPRESSObin board, with main difference being being WAN port with PoE capability and 2 additional ethernet ports. Full specifications: 1x Marvell 64 bit Dual Core ARM A53 Armada 3700 SOC clocked up to 1.2Ghz 1x Topaz 6341 Networking Switch 1GB DDR4 8GB eMMC 1x WAN with 30W POE 4x Gb LAN 1x RTC Clock and battery 1x DC Jack 1x USB 3.0 Type A 1x USB 2.0 Type A 1x SIM NanoSIM card Slot 1x Power Button 4x LED 1x Reset button 1x microUSB for UART 1x M.2 2280 slot for memory 1x 2x2 802.11ac Wi-Fi 1x MiniPCIE slot for Wi-Fi (PCIe interface) Signed-off-by: Vladimir Vid <[email protected]> Signed-off-by: Gregory CLEMENT <[email protected]>
2020-11-29arm64: dts: marvell: espressobin: Add support for LED2Pali Rohár3-0/+21
LED2 is connected to MPP1_2 pin. It is working only on V7 boards. V5 boards have hw bug which cause that LED2 is non-working. So enable LED2 only for Espressobin V7 boards. Note that LED1 is connected to LED_WLAN# pin on miniPCIe card and LED3 to power supply. Therefore on Espressobin board only LED2 can be controlled directly from the host. LED1 is possible to control via WiFi card inserted in miniPCIe slot if driver for particular card supports it. Signed-off-by: Pali Rohár <[email protected]> Tested-by: Gérald Kerma <[email protected]> Signed-off-by: Gregory CLEMENT <[email protected]>
2020-11-29arm64: dts: marvell: Add a device tree for the IEI Puzzle-M801 boardLuka Kovacic2-0/+524
Add initial support for the IEI Puzzle-M801 1U Rackmount Network Appliance board. The board is based on the quad-core Marvell Armada 8040 SoC and supports up to 16 GB of DDR4 2400 MHz ECC RAM. It has a PCIe x16 slot (x2 lanes only) and an M.2 type B slot. Main system hardware: 2x USB 3.0 4x Gigabit Ethernet 2x SFP+ 1x SATA 3.0 1x M.2 type B 1x RJ45 UART 1x SPI flash 1x IEI WT61P803 PUZZLE Microcontroller 1x EPSON RX8010 RTC (used instead of the integrated Marvell RTC controller) 6x SFP+ LED 1x HDD LED All of the hardware listed above is supported and tested in this port. Signed-off-by: Luka Kovacic <[email protected]> Acked-by: Andrew Lunn <[email protected]> Cc: Luka Perkov <[email protected]> Cc: Robert Marko <[email protected]> Signed-off-by: Gregory CLEMENT <[email protected]>
2020-11-29arm64: dts: marvell: espressobin: De-duplicate eMMC definitionsPali Rohár3-36/+24
eMMC definitions in files armada-3720-espressobin-emmc.dts and armada-3720-espressobin-v7-emmc.dts is same. So move it into common armada-3720-espressobin.dtsi file with status "disabled". This change simplifies eMMC variants of DTS files for Espressobin. Signed-off-by: Pali Rohár <[email protected]> Reviewed-by: Andre Heider <[email protected]> Tested-by: Andre Heider <[email protected]> Signed-off-by: Gregory CLEMENT <[email protected]>
2020-11-29arm64: dts: marvell: espressobin: Get rid of duplicate serial aliasesAndre Heider1-2/+0
The included armada-37xx.dtsi already defines these two aliases. Signed-off-by: Andre Heider <[email protected]> Reviewed-by: Pali Rohár <[email protected]> Signed-off-by: Gregory CLEMENT <[email protected]>
2020-11-29arm64: dts: marvell: espressobin: Simplify v7 ethernet port labelingAndre Heider2-26/+10
Now that the switch ports have a label in the .dtsi, simplify the whole "switch0" block for the v7 dts files. Signed-off-by: Andre Heider <[email protected]> Reviewed-by: Pali Rohár <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Signed-off-by: Gregory CLEMENT <[email protected]>
2020-11-28arm64: dts: qcom: qrb5165-rb5: Add support for MCP2518FDManivannan Sadhasivam1-0/+17
Add support for onboard MCP2518FD SPI CAN transceiver attached to SPI0 of RB5. Tested-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Manivannan Sadhasivam <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2020-11-28arm64: dts: ti: k3: squelch warning about lack of #interrupt-cellsSekhar Nori2-0/+2
There are couple of places where INTA interrupt controller lacks #interrupt-cells property. This leads to warnings of the type: arch/arm64/boot/dts/ti/k3-j721e-main.dtsi:147.51-156.5: Warning (interrupt_provider): /bus@100000/main-navss/interrupt-controller@33d00000: Missing #interrupt-cells in interrupt provider when building TI device-tree files with W=2 warning level. Fix these. Signed-off-by: Sekhar Nori <[email protected]> Signed-off-by: Nishanth Menon <[email protected]> Reviewed-by: Grygorii Strashko <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-11-28arm64: Make the Meltdown mitigation state availableMarc Zyngier2-3/+19
Our Meltdown mitigation state isn't exposed outside of cpufeature.c, contrary to the rest of the Spectre mitigation state. As we are going to use it in KVM, expose a arm64_get_meltdown_state() helper which returns the same possible values as arm64_get_spectre_v?_state(). Signed-off-by: Marc Zyngier <[email protected]>
2020-11-27arm64: defconfig: Enable ARM SCMI protocol and driversFlorian Fainelli1-0/+4
Enable the ARM SCMI protocol and the common clock, cpufreq, reset and sensors drivers. Broadcom STB platforms (ARCH_BRCMSTB) implement SCMI to provide support for CPU frequency scaling, clock configuration and temperature and current sensors. Signed-off-by: Florian Fainelli <[email protected]> Acked-by: Sudeep Holla <[email protected]>
2020-11-27Merge tag 'arm-soc-fixes-v5.10-3' of ↵Linus Torvalds11-77/+67
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC fixes from Arnd Bergmann: "Another set of patches for devicetree files and Arm SoC specific drivers: - A fix for OP-TEE shared memory on non-SMP systems - multiple code fixes for the OMAP platform, including one regression for the CPSW network driver and a few runtime warning fixes - Some DT patches for the Rockchip RK3399 platform, in particular fixing the MMC device ordering that recently became nondeterministic with async probe. - Multiple DT fixes for the Tegra platform, including a regression fix for suspend/resume on TX2 - A regression fix for a user-triggered fault in the NXP dpio driver - A regression fix for a bug caused by an earlier bug fix in the xilinx firmware driver - Two more DTC warning fixes - Sylvain Lemieux steps down as maintainer for the NXP LPC32xx platform" * tag 'arm-soc-fixes-v5.10-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (24 commits) arm64: tegra: Fix Tegra234 VDK node names arm64: tegra: Wrong AON HSP reg property size arm64: tegra: Fix USB_VBUS_EN0 regulator on Jetson TX1 arm64: tegra: Correct the UART for Jetson Xavier NX arm64: tegra: Disable the ACONNECT for Jetson TX2 optee: add writeback to valid memory type firmware: xilinx: Use hash-table for api feature check firmware: xilinx: Fix SD DLL node reset issue soc: fsl: dpio: Get the cpumask through cpumask_of(cpu) ARM: dts: dra76x: m_can: fix order of clocks bus: ti-sysc: suppress err msg for timers used as clockevent/source MAINTAINERS: Remove myself as LPC32xx maintainers arm64: dts: qcom: clear the warnings caused by empty dma-ranges arm64: dts: broadcom: clear the warnings caused by empty dma-ranges ARM: dts: am437x-l4: fix compatible for cpsw switch dt node arm64: dts: rockchip: Reorder LED triggers from mmc devices on rk3399-roc-pc. arm64: dts: rockchip: Assign a fixed index to mmc devices on rk3399 boards. arm64: dts: rockchip: Remove system-power-controller from pmic on Odroid Go Advance arm64: dts: rockchip: fix NanoPi R2S GMAC clock name ARM: OMAP2+: Manage MPU state properly for omap_enter_idle_coupled() ...
2020-11-27Merge branch 'kvm-arm64/misc-5.11' into kvmarm-master/nextMarc Zyngier5-59/+37
Signed-off-by: Marc Zyngier <[email protected]>
2020-11-27Merge branch 'kvm-arm64/cache-demux' into kvmarm-master/nextMarc Zyngier1-1/+1
Signed-off-by: Marc Zyngier <[email protected]>
2020-11-27KVM: arm64: CSSELR_EL1 max is 13Andrew Jones1-1/+1
Not counting TnD, which KVM doesn't currently consider, CSSELR_EL1 can have a maximum value of 0b1101 (13), which corresponds to an instruction cache at level 7. With CSSELR_MAX set to 12 we can only select up to cache level 6. Change it to 14. Signed-off-by: Andrew Jones <[email protected]> Signed-off-by: Marc Zyngier <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-11-27arm64: vmlinux.lds.S: Drop redundant *.init.rodata.*Youling Tang1-1/+1
We currently try to emit *.init.rodata.* twice, once in INIT_DATA, and once in the line immediately following it. As the two section definitions are identical, the latter is redundant and can be dropped. This patch drops the redundant *.init.rodata.* section definition. Signed-off-by: Youling Tang <[email protected]> Acked-by: Will Deacon <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Catalin Marinas <[email protected]>
2020-11-27Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds2-2/+25
Pull kvm fixes from Paolo Bonzini: "ARM: - Fix alignment of the new HYP sections - Fix GICR_TYPER access from userspace S390: - do not reset the global diag318 data for per-cpu reset - do not mark memory as protected too early - fix for destroy page ultravisor call x86: - fix for SEV debugging - fix incorrect return code - fix for 'noapic' with PIC in userspace and LAPIC in kernel - fix for 5-level paging" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: kvm: x86/mmu: Fix get_mmio_spte() on CPUs supporting 5-level PT KVM: x86: Fix split-irqchip vs interrupt injection window request KVM: x86: handle !lapic_in_kernel case in kvm_cpu_*_extint MAINTAINERS: Update email address for Sean Christopherson MAINTAINERS: add uv.c also to KVM/s390 s390/uv: handle destroy page legacy interface KVM: arm64: vgic-v3: Drop the reporting of GICR_TYPER.Last for userspace KVM: SVM: fix error return code in svm_create_vcpu() KVM: SVM: Fix offset computation bug in __sev_dbg_decrypt(). KVM: arm64: Correctly align nVHE percpu data KVM: s390: remove diag318 reset code KVM: s390: pv: Mark mm as protected after the set secure parameters and improve cleanup
2020-11-27KVM: arm64: Remove unused __extended_idmap_trampoline() prototypeWill Deacon1-1/+0
__extended_idmap_trampoline() was removed a long time ago by 3421e9d88d7a ("arm64: KVM: Simplify HYP init/teardown") so remove the unused function prototype. Signed-off-by: Will Deacon <[email protected]> Signed-off-by: Marc Zyngier <[email protected]> Cc: Marc Zyngier <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-11-27KVM: arm64: Remove kvm_arch_vm_ioctl_check_extension()Will Deacon4-55/+34
kvm_arch_vm_ioctl_check_extension() is only called from kvm_vm_ioctl_check_extension(), so we can inline it and remove the extra function. Signed-off-by: Will Deacon <[email protected]> Signed-off-by: Marc Zyngier <[email protected]> Cc: Marc Zyngier <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-11-27KVM: arm64: Move 'struct kvm_arch_memory_slot' out of uapi/Will Deacon2-3/+3
'struct kvm_arch_memory_slot' isn't part of the user ABI, so move it out of the uapi/ headers in case we start using it in future and accidentally back ourselves into a corner. Signed-off-by: Will Deacon <[email protected]> Signed-off-by: Marc Zyngier <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-11-27Merge tag 'arm64-fixes' of ↵Linus Torvalds2-16/+20
git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 fixes from Will Deacon: "The main changes are relating to our handling of access/dirty bits, where our low-level page-table helpers could lead to stale young mappings and loss of the dirty bit in some cases (the latter has not been observed in practice, but could happen when clearing "soft-dirty" if we enabled that). These were posted as part of a larger series, but the rest of that is less urgent and needs a v2 which I'll get to shortly. In other news, we've now got a set of fixes to resolve the lockdep/tracing problems that have been plaguing us for a while, but they're still a bit "fresh" and I plan to send them to you next week after we've got some more confidence in them (although initial CI results look good). Summary: - Fix kerneldoc warnings generated by ACPI IORT code - Fix pte_accessible() so that access flag is ignored - Fix missing header #include - Fix loss of software dirty bit across pte_wrprotect() when HW DBM is enabled" * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: arm64: pgtable: Ensure dirty bit is preserved across pte_wrprotect() arm64: pgtable: Fix pte_accessible() ACPI/IORT: Fix doc warnings in iort.c arm64/fpsimd: add <asm/insn.h> to <asm/kprobes.h> to fix fpsimd build
2020-11-27arm64: Extend the kernel command line from the bootloaderTyler Hicks2-2/+30
Provide support for additional kernel command line parameters to be concatenated onto the end of the command line provided by the bootloader. Additional parameters are specified in the CONFIG_CMDLINE option when CONFIG_CMDLINE_EXTEND is selected, matching other architectures and leveraging existing support in the FDT and EFI stub code. Special care must be taken for the arch-specific nokaslr parsing. Search the bootargs FDT property and the CONFIG_CMDLINE when CONFIG_CMDLINE_EXTEND is in use. There are a couple of known use cases for this feature: 1) Switching between stable and development kernel versions, where one of the versions benefits from additional command line parameters, such as debugging options. 2) Specifying additional command line parameters, for additional tuning or debugging, when the bootloader does not offer an interactive mode. Signed-off-by: Tyler Hicks <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Catalin Marinas <[email protected]>
2020-11-27arm64: kaslr: Refactor early init command line parsingTyler Hicks1-8/+11
Don't ask for *the* command line string to search for "nokaslr" in kaslr_early_init(). Instead, tell a helper function to search all the appropriate command line strings for "nokaslr" and return the result. This paves the way for searching multiple command line strings without having to concatenate the strings in early init. Signed-off-by: Tyler Hicks <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Catalin Marinas <[email protected]>
2020-11-27Merge tag 'tegra-for-5.11-arm64-dt' of ↵Arnd Bergmann11-53/+119
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt arm64: tegra: Device tree changes for v5.11-rc1 These changes are mostly minor fixes across the board, but they also enable PMUs on Tegra186 and enable SATA support on Jetson TX2. * tag 'tegra-for-5.11-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: arm64: tegra: Fix Tegra194 HDA {clock,reset}-names ordering arm64: tegra: Enable AHCI on Jetson TX2 arm64: tegra: Change order of SATA resets for Tegra132 and Tegra210 arm64: tegra: Add XUSB pad controller interrupt arm64: tegra: Rename ADMA device nodes for Tegra210 arm64: tegra: Hook up edp interrupt on Tegra132 SOCTHERM arm64: tegra: Add missing hot temperatures to Tegra210 thermal-zones arm64: tegra: Add missing gpu-throt-level to Tegra210 soctherm arm64: tegra: Add missing hot temperatures to Tegra132 thermal-zones arm64: tegra: Fix DT binding for IO High Voltage entry arm64: tegra: Fix GIC400 missing GICH/GICV register regions arm64: tegra: Add missing CPU PMUs on Tegra186 arm64: tegra: Fix Tegra234 VDK node names arm64: tegra: Wrong AON HSP reg property size arm64: tegra: Fix USB_VBUS_EN0 regulator on Jetson TX1 arm64: tegra: Correct the UART for Jetson Xavier NX arm64: tegra: Disable the ACONNECT for Jetson TX2 Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnd Bergmann <[email protected]>
2020-11-27Merge tag 'renesas-arm-dt-for-v5.11-tag2' of ↵Arnd Bergmann1-0/+38
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt Renesas ARM DT updates for v5.11 (take two) - PCIe endpoint support for the R-Car H3 ES2.0+ SoC. * tag 'renesas-arm-dt-for-v5.11-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: arm64: dts: renesas: r8a77951: Add PCIe EP nodes Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnd Bergmann <[email protected]>
2020-11-27Merge tag 'tegra-for-5.11-arm64-defconfig' of ↵Arnd Bergmann1-0/+1
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/defconfig arm64: tegra: Default configuration changes for v5.11-rc1 The Tegra234 VDK support that was introduced in v5.10-rc1 is now enabled by default. * tag 'tegra-for-5.11-arm64-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: arm64: defconfig: Enable Tegra234 support Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnd Bergmann <[email protected]>
2020-11-27dts64: mt7622: disable spi1 and uart2 because pins are used by pwmFrank Wunderlich1-2/+0
MDI_TP_P0 (gpio51) is used by pwm1 and uart2 (uart1 on gpio-header) MDI_RP_P4 (gpio67) is used by pwm4 and spi1 Signed-off-by: Frank Wunderlich <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Matthias Brugger <[email protected]>
2020-11-27dts64: mt7622: enable all pwm for bananapi r64Frank Wunderlich1-3/+8
mt7622 only supports 6 pwm-channels so drop pwm7 third pwm (pwm2) is inverted and connected to fan-socket Signed-off-by: Frank Wunderlich <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Matthias Brugger <[email protected]>
2020-11-27Merge tag 'kvmarm-fixes-5.10-4' of ↵Paolo Bonzini2-2/+25
git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into kvm-master KVM/arm64 fixes for v5.10, take #4 - Fix alignment of the new HYP sections - Fix GICR_TYPER access from userspace
2020-11-27arm64: dts: ti: k3-j7200-common-proc-board: Correct the name of io expander ↵Peter Ujfalusi1-1/+11
on main_i2c1 J7200 main_i2c1 is connected to the i2c bus on the CPB marked as main_i2c3 The i2c1 devices on the CPB are _not_ connected to the SoC, they are not usable with the J7200 SOM. Correct the expander name from exp4 to exp3 and at the same time add the line names as well. Signed-off-by: Peter Ujfalusi <[email protected]> Signed-off-by: Nishanth Menon <[email protected]> Reviewed-by: Vignesh Raghavendra <[email protected]> Reviewed-by: Grygorii Strashko <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-11-27arm64: dts: ti: k3-j7200-som-p0: main_i2c0 have an ioexpander on the SOMPeter Ujfalusi2-11/+26
The J7200 SOM have additional io expander which is used to control several SOM level muxes to make sure that the correct signals are routed to the correct pin on the SOM <-> CPB connectors. Signed-off-by: Peter Ujfalusi <[email protected]> Signed-off-by: Nishanth Menon <[email protected]> Reviewed-by: Vignesh Raghavendra <[email protected]> Reviewed-by: Grygorii Strashko <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-11-27Merge branch 'kvm-arm64/vector-rework' into kvmarm-master/nextMarc Zyngier12-259/+214
Signed-off-by: Marc Zyngier <[email protected]>
2020-11-27Merge branch 'kvm-arm64/pmu-undef' into kvmarm-master/nextMarc Zyngier4-50/+32
Signed-off-by: Marc Zyngier <[email protected]>
2020-11-27KVM: arm64: Get rid of the PMU ready stateMarc Zyngier1-1/+0
The PMU ready state has no user left. Goodbye. Reviewed-by: Alexandru Elisei <[email protected]> Signed-off-by: Marc Zyngier <[email protected]>
2020-11-27KVM: arm64: Gate kvm_pmu_update_state() on the PMU featureMarc Zyngier1-1/+1
We currently gate the update of the PMU state on the PMU being "ready". The "ready" state is only set to true when the first vcpu run is successful, and if it isn't, we never reach the update code. So the "ready" state is never the right thing to check for, and it should instead be the presence of the PMU feature, which makes a bit more sense. Reviewed-by: Alexandru Elisei <[email protected]> Signed-off-by: Marc Zyngier <[email protected]>
2020-11-27KVM: arm64: Remove dead PMU sysreg decoding codeMarc Zyngier1-5/+4
The handling of traps in access_pmu_evcntr() has a couple of omminous "else return false;" statements that don't make any sense: the decoding tree coverse all the registers that trap to this handler, and returning false implies that we change PC, which we don't. Get rid of what is evidently dead code. Reviewed-by: Alexandru Elisei <[email protected]> Signed-off-by: Marc Zyngier <[email protected]>
2020-11-27KVM: arm64: Remove PMU RAZ/WI handlingMarc Zyngier1-30/+0
There is no RAZ/WI handling allowed for the PMU registers in the ARMv8 architecture. Nobody can remember how we cam to the conclusion that we could do this, but the ARMv8 ARM is pretty clear that we cannot. Remove the RAZ/WI handling of the PMU system registers when it is not configured. Reviewed-by: Alexandru Elisei <[email protected]> Signed-off-by: Marc Zyngier <[email protected]>
2020-11-27KVM: arm64: Inject UNDEF on PMU access when no PMU configuredMarc Zyngier1-4/+8
The ARMv8 architecture says that in the absence of FEAT_PMUv3, all the PMU-related register generate an UNDEF. Let's make sure that all our PMU handers catch this case by hooking into check_pmu_access_disabled(), and add checks in a couple of other places. Note that we still cannot deliver an exception into the guest as the offending cases are already caught by the RAZ/WI handling. But this puts us one step away to architectural compliance. Reviewed-by: Alexandru Elisei <[email protected]> Signed-off-by: Marc Zyngier <[email protected]>
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