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Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Jérôme Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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All of these have a Realtek Gbit RGMII PHY.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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next/dt64
Pull "arm64: Xilinx ZynqMP dt patches for v4.9" from Michal Simek:
- Fix gic ranges property
- Use 64bit size cells format
- Add PCIe node
- Correct pmu and watchdog nodes
* tag 'zynqmp-dt-for-4.9' of https://github.com/Xilinx/linux-xlnx:
ARM64: zynqmp: Correct the watchdog timer interrupt number
ARM64: zynqmp: Add missing interrupt-parent to PMU node
ARM64: zynqmp: Add PCIe node
ARM64: zynqmp: Use 64bit size cell format
ARM64: zynqmp: Align gic ranges for 64k in device tree
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git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/late
Pull "Renesas ARM64 Based SoC DT Updates for v4.9" from Simon Horman:
Clean up:
* Remove unnecessary cap-mmc-highspeed property from SDHI nodes on r8a7795 SoC
* Add SoC-specific compatible property to audio-dmac nodes on r8a7795 SoC
New Board:
* Add r8a7794/h3ulcb board
Enablement:
* Add PFC and GPIO to r8a7796 SoC
* Enable DU and USB 2.0 on r8a7795/salvator-x board
* Add VTP, FCPV, FCPF and FDP1 to r8a7795 SoC
* Set maximum frequency for SDHI clocks on r8a7795 SoC
* tag 'renesas-arm64-dt-for-v4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (43 commits)
arm64: dts: r8a7796: Add GPIO device nodes
arm64: dts: r8a7796: salvator-x: add serial console pins
arm64: dts: r8a7796: Add pinctrl device node
arm64: dts: r8a7795: salvator-x: Configure pins for the DU RGB output
arm64: dts: h3ulcb: enable GPIO leds
arm64: dts: h3ulcb: Sound SSI support
arm64: dts: h3ulcb: enable SDHI0
arm64: dts: h3ulcb: enable GPIO keys
arm64: dts: r8a7795: remove unnecessary cap-mmc-highspeed property
arm64: dts: h3ulcb: enable USB2.0 Host channel 1
arm64: dts: h3ulcb: enable USB2 PHY of channel 1
arm64: dts: h3ulcb: enable WDT
arm64: dts: h3ulcb: enable EXTALR clk
arm64: dts: h3ulcb: enable I2C2
arm64: dts: h3ulcb: enable EthernetAVB
arm64: dts: h3ulcb: enable SCIF clk and pins
arm64: dts: h3ulcb: initial device tree
arm64: dts: h3ulcb: add H3ULCB board DT bindings
arm64: dts: r8a7795: Add SoC-specific compatible property to audio-dmac nodes
arm64: dts: r8a7795: renesas: salvator-x: Enable DU
...
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git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/late
Pull "Amlogic 64-bit DT changes for v4.9" from Kevin Hilman:
- add watchdog, reset, IR remote, PWM
- add secure monitor and eFuse
- add always-on (AO) domain clock and reset
* tag 'amlogic-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM64: dts: amlogic: gxbb: Enable NVMEM
documentation: Add nvmem bindings documentation
ARM64: dts: amlogic: gxbb: Enable secure monitor
documentation: Add secure monitor bindings documentation
ARM64: dts: meson-gxbb: Add PWM pinctrl nodes
ARM64: dts: meson-gxbb: Enable the the IR decoder on supported boards
ARM64: dts: meson-gxbb: Add Infrared Remote Controller decoder
dt-bindings: media: meson-ir: Add Meson8b and GXBB compatible strings
ARM64: dts: amlogic: add the input pin for the IR remote
ARM64: dts: meson-gxbb: Add GXBB AO Clock and Reset node
clk: meson: Fix invalid use of sizeof in gxbb_aoclkc_probe()
clk: meson: Add GXBB AO Clock and Reset controller driver
dt-bindings: clock: reset: Add GXBB AO Clock and Reset Bindings
ARM64: DTS: meson-gxbb: switch ethernet to real clock
ARM64: dts: amlogic: meson-gxbb: Add watchdog node
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next/dt64
Pull "ARM: mediatek: dts64 updates for v4.9" from Matthias Brugger:
- add HDMI related nodes to mt8173
- enable the HDMI output on mt8173-evb
* tag 'v4.8-next-dts64' of https://github.com/mbgg/linux-mediatek:
arm64: dts: mt8173-evb: enable HDMI output
arm64: dts: mt8173: Add HDMI related nodes
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git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt64
Pull "i.MX arm64 device tree changes for 4.9" from Shawn Guo:
- Add property dma-coherent for ls2080a PCI device to save software
cache maintenance.
- Update serial aliases and use stdout-path to sepecify console for
ls2080a and ls1043a boards.
- Add DDR memory controller device node for ls2080a and ls1043a SoCs.
* tag 'imx-dt64-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
arm64: dts: ls2080a: Add 'dma-coherent' for ls2080a PCI nodes
arm64: dts: add stdout-path to chosen node for ls2080a/ls1043a boards
arm64: dts: updates serial aliases for ls1043a rdb and qds boards
arm64: dts: Add DDR memory controller for Layerscape SoCs
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git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt64
Pull "arm64: tegra: Device tree changes for v4.9-rc1" from Thierry Reding:
Add a couple of devices (AGIC, ADMA) on Tegra210 and enable them on
Smaug. Also enable DPAUX on Smaug to allow the I2C bus that shares pads
with the DPAUX to be used to access various audio devices. Furthermore,
enable the XUSB controller on Smaug for USB 3.0 support.
Finally, select PM_GENERIC_DOMAINS for 64-bit Tegra devices to make sure
devices are probed only after their power partitions have been enabled.
* tag 'tegra-for-4.9-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Select PM_GENERIC_DOMAINS
arm64: tegra: Enable XUSB controller on Tegra210 Smaug
arm64: tegra: Add the various audio devices for Tegra210 Smaug
arm64: tegra: Enable DPAUX for Tegra210 Smaug
arm64: tegra: Add ACONNECT, ADMA and AGIC nodes Tegra210 Smaug
arm64: tegra: Add SOR power-domain for Tegra210
arm64: tegra: Add ADMA node for Tegra210
arm64: tegra: Add AGIC node for Tegra210
arm64: tegra: Drop clock and reset names for XUSB powergates
arm64: tegra: Simplify Tegra210 GPIO compatible value
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git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt64
Pull "Rockchip dts64 changes for 4.9" from Heiko Stübner:
64bit Rockchip devicetree changes containing support for the recently
added firmware reboot-flag support, one new board the Tronsmart Orion
based on the rk3368 and a large number of newly supported peripherals
for the rk3399 (type-c phy, usb2 phy, pcie controller and pcie phy,
gmac, arm-pmu using ppi partitioning, efuse, saradc) as well as some
smaller housekeeping and non-critical fixes.
* tag 'v4.9-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (22 commits)
arm64: dts: rockchip: add Type-C phy for RK3399
arm64: dts: rockchip: enable the gmac for rk3399 evb board
arm64: dts: rockchip: add the gmac needed node for rk3399
arm64: dts: rockchip: support the pmu node for rk3399
arm64: dts: rockchip: change all interrupts cells to 4 on rk3399 SoCs
arm64: dts: rockchip: add the tcpc for rk3399 power domain
arm64: dts: rockchip: add efuse0 device node for rk3399
arm64: dts: rockchip: configure PCIe support for rk3399-evb
arm64: dts: rockchip: add the PCIe controller support for RK3399
arm64: dts: rockchip: add the PCIe PHY for RK3399
arm64: dts: rockchip: add the gmac power domain on rk3399
arm64: dts: rockchip: Add pinctrl entry for 32k clock on rk3399
arm64: dts: rockchip: set to CCI clock of RK3399 to 600M
arm64: dts: rockchip: fix the address map for WDT0 and WDT1
arm64: dts: rockchip: add the saradc for rk3399
arm64: dts: rockchip: configure usb2-phy support for rk3399-evb
arm64: dts: rockchip: add usb2-phy support for rk3399
arm64: dts: rockchip: add syscon-reboot-mode DT node
soc: rockchip: add reboot-mode header
arm64: dts: rockchip: remove broken-cd from sdio0
...
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http://github.com/Broadcom/stblinux into next/dt64
Pull "Broadcom devicetree-arm64 changes for 4.9" from Florian Fainelli:
This pull request contains Broadcom ARM64-based SoC Device Tree changes for
v4.9, please pull the folllowing:
- Dhanajay adds the PWM Device Tree nodes to the Northstar 2 DTS files
* tag 'arm-soc/for-4.9/devicetree-arm64' of http://github.com/Broadcom/stblinux:
arm64: dts: Add PWM DT node for NS2
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next/dt64
Pull "mvebu dt64 for 4.9 (part 1)" from Gregory CLEMENT:
- add description for the new Armada 8040 dev board
- add the PIC and PMU on Armada 7K/8K
* tag 'mvebu-dt64-4.9-1' of git://git.infradead.org/linux-mvebu:
arm64: dts: marvell: describe the PIC and PMU on Armada 7K/8K
arm64: dts: marvell: add description for the Armada 8040 dev board
arm64: dts: marvell: add description for the slave CP110 in Armada 8K
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git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt64
Pull "Qualcomm ARM64 Updates for v4.9" from Andy Gross:
* Updates for MSM8916 including TSCR, SMSM/SMP2P, and MBA reserve
* Update SCM node to denote being a reset-controller
* Fix broken interrupt settings
* Add TSENS nodes for MSM8916/MSM8996
* Add DB820c support
* Add MSM8916/APQ8016 display support
* tag 'qcom-arm64-for-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
arm64: dts: apq8016-sbc: Add HDMI display support
arm64: dts: msm8916: Add display support
arm64: dts: db820c: add support to external sd card.
arm64: dts: db820c: add support to SPI on HS
arm64: dts: db820c: add support to LS-SPI0
arm64: dts: db820c: add support to I2C on HS
arm64: dts: db820c: add support to LS-I2C1
arm64: dts: db820c: add support to LS-I2C0
arm64: dts: db820c: add support to LS-UART0
arm64: dts: db820c: add basic board support
arm64: dts: msm8996: Add thermal zones, tsens and qfprom nodes
arm64: dts: msm8916: Add thermal zones, tsens and qfprom nodes
arm64: dts: qcom: Fix broken interrupt trigger settings
arm64: dts: qcom: msm8916: Add tcsr syscon
arm64: dts: qcom: msm8916: Make scm a reset-controller
arm64: dts: qcom: msm8916: Add mba memory reserve
arm64: dts: qcom: msm8916: Add smsm and smp2p nodes
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into next/dt64
Pull "ARM64: DT: Hisilicon SoC DT updates for 4.9" from Wei Xu:
- Set UART1 clock frequency to 150MHz for higher baud rates on hikey
- Add display subsystem, HDMI and cma nodes on hikey to support display
- Add syscon-reboot-mode support on hikey
- Add pstore support on hikey
- Add resets and sd-uhs-sdr property dwmmc ndoe on hikey
- Remove hip05_hns.dtsi since it can not be built without mbigenv1
- Update system controller bingding document for hip05 and hip06
- Add xge and sas support on hip06
* tag 'hisi-soc-dt-for-4.9' of git://github.com/hisilicon/linux-hisi:
arm64: dts: hi6220: add sd-uhs- properties into dwmmc_1
arm64: dts: hi6220: add resets property into dwmmc nodes
arm64: dts: hikey: extend default cma size to 128MB
arm64: dts: hip06: Append sas node
arm64: dts: hip06: Append hns node
dt-bindings: hisilicon: Add Hip05 and Hip06 system controller support
arm64: dts: hip05: kill hip05_hns.dtsi
arm64: dts: hikey: Add pstore support for HiKey
arm64: dts: hikey: Add hikey support for syscon-reboot-mode
arm64: dts: Add HDMI node for hi6220-hikey
arm64: dts: Add display subsystem DT nodes for hi6220-hikey
arm64: dts: set UART1 clock frequency to 150MHz
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git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt64
Pull "Samsung DeviceTree ARM64 update for v4.9" from Krzysztof Kozlowski:
1. Use human-friendly symbols for interrupt flags.
* tag 'samsung-dt64-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: Use human-friendly symbols for timer interrupt flags
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git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into next/dt64
Merge "UniPhier ARM64 SoC DT updates for v4.9" from Masahiro Yamada:
* Match DT names other projects and documents
* Use clock/reset drivers
* Add new SoC/board support
* Misc
* tag 'uniphier-dt64-v4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier:
arm64: dts: uniphier: add LD11 SoC/Board support
arm64: dts: uniphier: add specific compatible to SoC-Glue node
arm64: dts: uniphier: use clock/reset controllers
arm64: dts: uniphier: add pinctrl property to System Bus node
arm64: dts: uniphier: match DT names to other projects and documents
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This commit adds a reference to the appropriate MSI controller in the
description of the PCIe controllers on Marvel Armada 7K and 8K
platforms.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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Conflicts:
drivers/net/ethernet/mediatek/mtk_eth_soc.c
drivers/net/ethernet/qlogic/qed/qed_dcbx.c
drivers/net/phy/Kconfig
All conflicts were cases of overlapping commits.
Signed-off-by: David S. Miller <davem@davemloft.net>
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The ../../../arm... style cross-references added by commit 9d56c22a7861
("ARM: bcm2835: Add devicetree for the Raspberry Pi 3.") do not work in the
context of the split device-tree repository[0] (where the directory
structure differs). As with commit 8ee57b8182c4 ("ARM64: dts: vexpress: Use
a symlink to vexpress-v2m-rs1.dtsi from arch=arm") use symlinks instead.
[0] https://git.kernel.org/cgit/linux/kernel/git/devicetree/devicetree-rebasing.git/
Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Frank Rowand <frowand.list@gmail.com>
Cc: Eric Anholt <eric@anholt.net>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Lee Jones <lee@kernel.org>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-rpi-kernel@lists.infradead.org
Cc: arm@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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The 'dma-coherent' indicates that the hardware IP block can ensure
the coherency of the data transferred from/to the IP block. This
can avoid the software cache flush/invalid actions, and improve
the performance significantly.
The PCI IP block of ls2080a has this capability, so adding this
feature to improve the PCI performance.
Signed-off-by: Liu Gang <Gang.Liu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add GPIO device nodes to the DT of the r8a7796 SoC.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
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Adds pin control for SCIF2.
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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This patch adds pinctrl device node for R8A7796 SoC.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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This supports GPIO leds on H3ULCB board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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This supports SSI sound for H3ULCB board.
SSI DMA mode used. CS2000 used as AUDIO_CLK_B.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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This supports SDHI0 on H3ULCB board SD card slot
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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This supports GPIO keys on H3ULCB board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Remove cap-mmc-highspeed property from SDHI2 and SDHI3.
This property is unnecessary as the driver automatically sets
the highspeed capability. Furthermore its use is inconsistent with SDHI0
and SDHI1 which are also highspeed capable but do not have this property
present.
Found by inspection.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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This supports USB2.0 Host channel 1 on H3ULCB board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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There are 2 Type-C phy on RK3399, they are almost same, except the
address of register. They support USB3.0 Type-C and DisplayPort1.3
Alt Mode on USB Type-C. Register a phy, supply it to USB3 controller
and DP controller.
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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We add the required and optional properties for evb board.
See the [0] to get the detail information.
[0]:
Documentation/devicetree/bindings/net/rockchip-dwmac.txt
Signed-off-by: Roger Chen <roger.chen@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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The RK3399 GMAC Ethernet Controller provides a complete Ethernet interface
from processor to a Reduced Media Independent Interface (RMII) and Reduced
Gigabit Media Independent Interface (RGMII) compliant Ethernet PHY.
This patch adds the related needed device information.
e.g.: interrupts, grf, clocks, pinctrl and so on.
The full details are in [0].
[0]:
Documentation/devicetree/bindings/net/rockchip-dwmac.txt
Signed-off-by: Roger Chen <roger.chen@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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This supports USB2 PHY channel #1 on H3ULCB board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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This supports watchdog timer for H3ULCB board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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This enables EXTALR clock that can be used for the watchdog.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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This supports I2C2 bus on H3ULCB board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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This supports Ethernet AVB on H3ULCB board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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This enables the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Add the initial device tree for the R8A7795 SoC based H3ULCB low cost
board.
This commit supports the following peripherals:
- SCIF (console)
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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The audio-dmac nodes used the generic compatible property only.
Add the SoC-specific one, to make it future proof.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Only the VGA output is supported for now.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Add the DU device to r8a7795.dtsi in a disabled state.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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The r8a7795 has 9 VSP instances.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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The FCPs handle the interface between various IP cores and memory. Add
the instances related to the VSP2s.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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We have to set SW15 to pin 2-3 side on the board before we use CN9
as USB host or peripheral.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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This patch also adds a regulator node for USB2.0 to handle VBUS on/off
by the phy-rcar-gen3-usb2 driver.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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