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path: root/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
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2017-05-22arm64: dts: renesas: Extract common ULCB board supportGeert Uytterhoeven1-198/+3
The Renesas ULCB development board can be equipped with either an R-Car H3 or M3-W SiP, which are pin-compatible. Both boards use different DTBs. Reduce duplication by extracting common ULCB board support into its own .dtsi file. References to SoC-specific clocks are handled through cpp definitions. Sort device nodes while at it. For H3ULCB, there are no functional changes. For M3ULCB, the following new devices are now described in DT: - External audio, CAN, and PCIe clocks, - CS2000 clock generator, - AK4613 Audio Codec. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-05-22arm64: dts: m3ulcb: Fix EthernetAVB PHY timingSimon Horman1-12/+1
Set PHY rxc-skew-ps to 1500 and all other values to their default values. This is intended to to address failures in the case of 1Gbps communication using the salvator-x board with the KSZ9031RNX phy. This has been reported to occur with both the r8a7795 (H3) and r8a7796 (M3-W) SoCs. Based in a similar patch for the r8a7796 salvator-x by Kazuya Mizuguchi. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-05-22arm64: dts: m3ulcb: enable HS200 for eMMCVladimir Barinov1-0/+1
This supports HS200 mode for eMMC on M3ULCB board Signed-off-by: Vladimir Barinov <vladimir.barinov+renesas@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-05-22arm64: dts: m3ulcb: enable EthernetAVBVladimir Barinov1-0/+32
This supports Ethernet AVB on M3ULCB board Signed-off-by: Vladimir Barinov <vladimir.barinov+renesas@cogentembedded.com> Tested-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-05-22arm64: dts: m3ulcb: Update memory node to 2 GiB mapVladimir Barinov1-0/+5
This patch updates memory region: - After changes, the new map of the m3ulcb board on R8A7796 SoC Bank0: 1GiB RAM : 0x000048000000 -> 0x0007fffffff Bank1: 1GiB RAM : 0x000600000000 -> 0x0063fffffff - Before changes, the old map looked like this: Bank0: 1GiB RAM : 0x000048000000 -> 0x0007fffffff Signed-off-by: Vladimir Barinov <vladimir.barinov+renesas@cogentembedded.com> Tested-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-05-22arm64: dts: m3ulcb: enable I2CVladimir Barinov1-0/+12
This supports I2C2 bus on M3ULCB board Signed-off-by: Vladimir Barinov <vladimir.barinov+renesas@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-03-13arm64: dts: m3ulcb: Drop superfluous status update for frequency overrideGeert Uytterhoeven1-1/+0
The scif_clk device node is already enabled in r8a7796.dtsi, so there is no need to update its status again. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-21arm64: dts: m3ulcb: enable SDHI2Vladimir Barinov1-0/+43
This supports SDHI2 for M3ULCB onboard eMMC Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-21arm64: dts: m3ulcb: enable SDHI0Vladimir Barinov1-0/+49
This supports SDHI0 on M3ULCB board SD card slot Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-21arm64: dts: m3ulcb: enable WDTVladimir Barinov1-0/+5
This supports watchdog timer for M3ULCB board Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-21arm64: dts: m3ulcb: enable EXTALR clkVladimir Barinov1-0/+4
This enables EXTALR clock that can be used for the watchdog. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-21arm64: dts: m3ulcb: enable GPIO keysVladimir Barinov1-0/+13
This supports GPIO keys on M3ULCB board Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-21arm64: dts: m3ulcb: enable GPIO ledsVladimir Barinov1-0/+11
This supports GPIO leds on M3ULCB board Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-21arm64: dts: m3ulcb: enable SCIF clk and pinsVladimir Barinov1-0/+13
This enables the external crystal for the SCIF_CLK and its pinctrl, to be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-21arm64: dts: m3ulcb: initial device treeVladimir Barinov1-0/+51
Add the initial device tree for the R8A7796 SoC based M3ULCB low cost board (R-Car Starter Kit Pro) This commit supports the following peripherals: - SCIF (console) Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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