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2018-06-14Merge branch 'i2c/for-4.18' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux Pull i2c updates from Wolfram Sang: - mainly feature additions to drivers (stm32f7, qup, xlp9xx, mlxcpld, ...) - conversion to use the i2c_8bit_addr_from_msg macro consistently - move includes to platform_data - core updates to allow the (still in review) I3C subsystem to connect - and the regular share of smaller driver updates * 'i2c/for-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (68 commits) i2c: qup: fix building without CONFIG_ACPI i2c: tegra: Remove suspend-resume i2c: imx-lpi2c: Switch to SPDX identifier i2c: mxs: Switch to SPDX identifier i2c: busses: make use of i2c_8bit_addr_from_msg i2c: algos: make use of i2c_8bit_addr_from_msg i2c: rcar: document R8A77980 bindings i2c: qup: Add command-line parameter to override SCL frequency i2c: qup: Correct duty cycle for FM and FM+ i2c: qup: Add support for Fast Mode Plus i2c: qup: add probe path for Centriq ACPI devices i2c: robotfuzz-osif: drop pointless test i2c: robotfuzz-osif: remove pointless local variable i2c: rk3x: Don't print visible virtual mapping MMIO address i2c: opal: don't check number of messages in the driver i2c: ibm_iic: don't check number of messages in the driver i2c: imx: Switch to SPDX identifier i2c: mux: pca954x: merge calls to of_match_device and of_device_get_match_data i2c: mux: demux-pinctrl: use proper parent device for demux adapter i2c: mux: improve error message for failed symlink ...
2018-05-17i2c: omap: move header to platform_dataWolfram Sang1-1/+1
This header only contains platform_data. Move it to the proper directory. Signed-off-by: Wolfram Sang <[email protected]> Acked-by: Tony Lindgren <[email protected]>
2018-04-30ARM: OMAP2+: Use signed value for sysc register offsetsTony Lindgren1-0/+6
We currently don't know if a revision register exists or not. Zero is often a valid offset for the revision register. As we are still checking device tree data against platform data, we will get bogus warnings with correct device tree data because of incomplete platform data. Let's fix the issue by using signed offsets and tag the revision registers that don't exist with -ENODEV, and init the missing ones with the correct revision register offset. Cc: Paul Walmsley <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2018-02-14ARM: OMAP2+: Cleanup omap_mcbsp_dev_attr and other legacy dataSuman Anna1-1/+0
The omap_mcbsp_dev_attr data was used to supply instance-specific data for legacy non-DT devices. The legacy McBSP device support including the usage of the hwmod class revision data has been dropped in commit 48f6693790aa ("ARM: OMAP2+: Remove unused legacy code for McBSP") and this data is therefore no longer needed. So, cleanup the structure and all the associated data in various hwmod data files. Cc: Peter Ujfalusi <[email protected]> Signed-off-by: Suman Anna <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2018-02-14ARM: OMAP2+: Cleanup omap2_spi_dev_attr and other legacy dataSuman Anna1-26/+0
The omap2_spi_dev_attr data was used to supply instance-specific data for legacy non-DT devices. The SPI legacy device support including the usage of the hwmod class revision data has been dropped in commit 6f3ab009a178 ("ARM: OMAP2+: Remove unused legacy code for device init") and this data is therefore no longer needed. So, cleanup the structure and all the associated data in various hwmod data files. Signed-off-by: Suman Anna <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2018-02-14ARM: OMAP2+: Cleanup omap_timer_capability_dev_attr usageSuman Anna1-1/+0
The omap_timer_capability_dev_attr data was used to supply instance specific capabilities (like always-on, PWM functionality or ability to interrupt DSP cores) for legacy non-DT devices. These capabilities are now provided through device-tree properties. The legacy device support has been cleaned up in commit 8d39ff3d1696 ("ARM: OMAP2+: Remove unused legacy code for timer") and this data is therefore no longer needed. So, cleanup the structure and all the associated data in various hwmod data files. While at this, remove the stale header in hwmod data files that already do not have any timer capability data. Cc: Keerthy <[email protected]> Signed-off-by: Suman Anna <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2018-02-14ARM: OMAP2+: Cleanup omap_i2c_dev_attr usageSuman Anna1-10/+0
The omap_i2c_dev_attr data was used to supply instance-specific data for legacy non-DT devices. The I2C legacy device support has been cleaned up in commit 65fa3e719f36 ("ARM: OMAP2+: Remove legacy i2c.c platform init code") and this data is therefore no longer needed. So, cleanup the structure and all the associated data in various hwmod data files. The i2c-omap.h header is still needed because of the need for various OMAP_I2C_IP_VERSION_x macros. Signed-off-by: Suman Anna <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2018-02-14ARM: OMAP2+: Cleanup omap_gpio_dev_attr usageSuman Anna1-15/+0
The omap_gpio_dev_attr data was used to supply instance-specific data for legacy non-DT devices. The GPIO legacy device support has been cleaned up in commit 14944934f8ac ("ARM: OMAP2+: Remove legacy gpio code") a while ago and this data is therefore no longer needed. So, cleanup the structure and all the associated data in various hwmod data files. Signed-off-by: Suman Anna <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2018-02-01Merge tag 'armsoc-drivers' of ↵Linus Torvalds1-6/+1
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver updates from Arnd Bergmann: "A number of new drivers get added this time, along with many low-priority bugfixes. The most interesting changes by subsystem are: bus drivers: - Updates to the Broadcom bus interface driver to support newer SoC types - The TI OMAP sysc driver now supports updated DT bindings memory controllers: - A new driver for Tegra186 gets added - A new driver for the ti-emif sram, to allow relocating suspend/resume handlers there SoC specific: - A new driver for Qualcomm QMI, the interface to the modem on MSM SoCs - A new driver for power domains on the actions S700 SoC - A driver for the Xilinx Zynq VCU logicoreIP reset controllers: - A new driver for Amlogic Meson-AGX - various bug fixes tee subsystem: - A new user interface got added to enable asynchronous communication with the TEE supplicant. - A new method of using user space memory for communication with the TEE is added" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (84 commits) of: platform: fix OF node refcount leak soc: fsl: guts: Add a NULL check for devm_kasprintf() bus: ti-sysc: Fix smartreflex sysc mask psci: add CPU_IDLE dependency soc: xilinx: Fix Kconfig alignment soc: xilinx: xlnx_vcu: Use bitwise & rather than logical && on clkoutdiv soc: xilinx: xlnx_vcu: Depends on HAS_IOMEM for xlnx_vcu soc: bcm: brcmstb: Be multi-platform compatible soc: brcmstb: biuctrl: exit without warning on non brcmstb platforms Revert "soc: brcmstb: Only register SoC device on STB platforms" bus: omap: add MODULE_LICENSE tags soc: brcmstb: Only register SoC device on STB platforms tee: shm: Potential NULL dereference calling tee_shm_register() soc: xilinx: xlnx_vcu: Add Xilinx ZYNQMP VCU logicoreIP init driver dt-bindings: soc: xilinx: Add DT bindings to xlnx_vcu driver soc: xilinx: Create folder structure for soc specific drivers of: platform: populate /firmware/ node from of_platform_default_populate_init() soc: samsung: Add SPDX license identifiers soc: qcom: smp2p: Use common error handling code in qcom_smp2p_probe() tee: shm: don't put_page on null shm->pages ...
2017-12-21ARM: OMAP2+: Move all omap_hwmod_sysc_fields to omap_hwmod_common_data.cTony Lindgren1-6/+1
We want to be able to eventually allocate these dynamically with the data for omap_hwmod_class_sysconfig coming from dts. Note that omap_hwmod_sysc_type_smartreflex is the same as the older omap36xx_sr_sysc_fields, so let's use the earlier omap36xx_sr_sysc_fields instead. Signed-off-by: Tony Lindgren <[email protected]>
2017-12-21ARM: OMAP2+: dra762: Register package specific hwmodLokesh Vutla1-8/+19
Register dra762 abz package specific hwmod. Also move registering rtc hwmod into respective SoC conditional statements instead of doing it separately. Signed-off-by: Lokesh Vutla <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2017-10-20Merge tag 'omap-for-v4.15/ti-sysc-signed' of ↵Arnd Bergmann1-57/+0
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc Pull "more soc changes for omaps for v4.15 merge window" from Tony Lindgren: Drop omap legacy platform data for IRQ, DMA and IO resources. With the dts files fixed up to contain the necessary data for basic resources, we can drop the related platform data. Note that this branch depends on the "omap-for-v4.15/fixes-dt-signed" branch and the patches with dependencies are based on a merge with that branch. These patches first ensure things keep working for the legacy "ti,hwmods" property when we start making it optional, then adds a minimal TI sysc interconnect target device driver to handle the new generic "ti,sysc" compatible property. And then we can finally drop the legacy platform data for IRQ, DMA and IO resources as seen in the diffstats. * tag 'omap-for-v4.15/ti-sysc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (25 commits) bus: ti-sysc: Fix unbalanced pm_runtime_enable by adding remove bus: ti-sysc: mark PM functions as __maybe_unused ARM: OMAP2+: omap_device: fix error return code in omap_device_copy_resources() ARM: OMAP2+: Drop legacy struct omap_hwmod_addr_space ARM: OMAP2+: Drop omap_hwmod_dma_info ARM: OMAP2+: Drop omap_hwmod_irq_info ARM: OMAP4: Remove legacy IRQ for PRM ARM: OMAP3: Remove legacy IRQ for PRM bus: ti-sysc: Add minimal TI sysc interconnect target driver ARM: OMAP2+: Populate legacy resources for dma and smartreflex ARM: OMAP2+: Parse module IO range from dts for legacy "ti,hwmods" support ARM: dts: Configure SmartReflex only to idle the interconnect target module ARM: dts: Add nodes for missing omap4 interconnect target modules dt-bindings: bus: Minimal TI sysc interconnect target module binding ARM: dts: Add missing hwmod related properties for dra7 ARM: dts: Add missing hwmod related nodes for am33xx ARM: dts: Add missing dma hwmod property for omap5 ARM: dts: Add missing wdt3 node for omap4 ARM: dts: Add missing hsi node for omap4 ARM: dts: Add missing onewire node for omap4 ...
2017-10-10ARM: OMAP2+: Drop legacy struct omap_hwmod_addr_spaceTony Lindgren1-51/+0
With all of mach-omap2 booting now in device tree only mode, we can get the module IO range from device tree and just drop the legacy hwmod struct omap_hwmod_addr_space. Cc: Lokesh Vutla <[email protected]> Cc: Paul Walmsley <[email protected]> Cc: Tero Kristo <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2017-10-10ARM: OMAP2+: Drop omap_hwmod_dma_infoTony Lindgren1-6/+0
We have all of mach-omap2 booting in device tree only mode now, and this data is populated from device tree. Note that once we have removed support for the omap legacy DMA, we can also drop struct omap_dma_dev_attr. Cc: Lokesh Vutla <[email protected]> Cc: Paul Walmsley <[email protected]> Cc: Tero Kristo <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2017-09-19ARM: OMAP2+: dra7xx: Set OPT_CLKS_IN_RESET flag for gpio1Keerthy1-0/+1
gpio1 soft reset fails in the kexec path as the optional clock is not enabled hence enable the HWMOD_CONTROL_OPT_CLKS_IN_RESET flag for gpio1 hwmod. Signed-off-by: Keerthy <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2017-08-14ARM: dra7: hwmod: Register dra76x specific hwmodLokesh Vutla1-2/+9
Certain IPs are available on dra76 which are not present either in dra74 or dra72. So add provision to register dra76 specific IPs separately. Signed-off-by: Lokesh Vutla <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2017-03-28ARM: DRA7: hwmod_data: Prevent wait_target_disable error for usb_otg_ssRoger Quadros1-0/+2
It seems that if L3_INIT clkdomain is kept in HW_AUTO while usb_otg_ss is in use then there are random chances that the usb_otg_ss module will fail to completely idle. i.e. IDLEST = 0x2 instead of 0x3. Preventing L3_INIT from HW_AUTO while usb_otg_ss module is in use fixes this issue. We don't know yet if usb_otg_ss instances 3 and 4 are affected by this issue or not so don't add this flag for those instances. Cc: Tero Kristo <[email protected]> Signed-off-by: Roger Quadros <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2017-03-28ARM: DRA7: hwmod: Fix DCAN1 stuck in transitionRoger Quadros1-0/+2
Add HWMOD_CLKDM_NOAUTO flag to DCAN1 module. Without this DCAN1 module remains stuck in transition after the CAN interface is brought down. This is also suggested in Errata i893 "DCAN Initialization Sequence". Add the HWMOD_CLKDM_NOAUTO to DCAN2 module as well as it is mentioned in Errata i893. Signed-off-by: Roger Quadros <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2017-03-14ARM: OMAP2+: Remove unused CLOCKACT_TEST_ICLKTony Lindgren1-1/+0
This is not used so let's remove it. Signed-off-by: Tony Lindgren <[email protected]>
2016-11-09ARM: DRA7: hwmod: Do not register RTC on DRA71Nishanth Menon1-1/+9
RTC is not available on DRA71x, so accessing any of the RTC register or clkctrl register will lead to a crash. So, do not register RTC hwmod for DRA71x. Signed-off-by: Nishanth Menon <[email protected]> Signed-off-by: Lokesh Vutla <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2016-11-09ARM: DRA7: hwmod: Add data for RNG IPJoel Fernandes1-0/+36
DRA7 SoC contains hardware random number generator. Add hwmod data for this IP so that it can be utilized. Signed-off-by: Joel Fernandes <[email protected]> Signed-off-by: Lokesh Vutla <[email protected]> [[email protected]: squashed the RNG hwmod IP flag fixes from Lokesh, squashed the HS chip fix from Daniel Allred] Signed-off-by: Tero Kristo <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2016-11-09ARM: DRA7: hwmod: Add data for SHA IPLokesh Vutla1-0/+37
DRA7 SoC contains SHA crypto hardware accelerator. Add hwmod data for this IP so that it can be utilized by crypto frameworks. Signed-off-by: Lokesh Vutla <[email protected]> Signed-off-by: Tero Kristo <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2016-11-09ARM: DRA7: hwmod: Add data for AES IPJoel Fernandes1-0/+62
DRA7 SoC contains AES crypto hardware accelerator. Add hwmod data for this IP so that it can be utilized by crypto frameworks. Signed-off-by: Joel Fernandes <[email protected]> Signed-off-by: Lokesh Vutla <[email protected]> [[email protected]: squash in support for both AES1 and AES2 cores] Signed-off-by: Tero Kristo <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2016-11-09ARM: DRA7: hwmod: Add data for DES IPJoel Fernandes1-0/+37
DRA7 SoC contains DES crypto hardware accelerator. Add hwmod data for this IP so that it can be utilized by crypto frameworks. Signed-off-by: Joel Fernandes <[email protected]> Signed-off-by: Lokesh Vutla <[email protected]> Signed-off-by: Tero Kristo <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2016-06-10ARM: DRA7: hwmod: remove DSS addresses from hwmodTomi Valkeinen1-31/+0
The addresses for DSS are provided in the DT data, so they can be removed from the hwmod. Signed-off-by: Tomi Valkeinen <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2016-06-10ARM: DRA7: hwmod: Remove QSPI address space entry from hwmodVignesh R1-10/+0
QSPI address space information is passed from device tree. Therefore remove legacy way of passing address space via hwmod data. Signed-off-by: Vignesh R <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2016-04-10ARM: DRA7: hwmod: Add data for GPTimer 12Suman Anna1-2/+34
Add the hwmod data for GPTimer 12. GPTimer 12 is present in WKUPAON power domain and is clocked from a secure 32K clock. GPTimer 12 serves as a secure timer on HS devices, but is available for kernel on regular GP devices. The hwmod link is registered only on GP devices. The hwmod data also reused the existing timer class instead of reintroducing the identical dra7xx_timer_secure_sysc class which was dropped in commit edec17863362 ("ARM: DRA7: hwmod: Fix the hwmod class for GPTimer4"). Cc: Paul Walmsley <[email protected]> Signed-off-by: Suman Anna <[email protected]> Signed-off-by: Paul Walmsley <[email protected]>
2016-04-10ARM: DRA7: RTC: Add lock and unlock functionsLokesh Vutla1-0/+2
Hook omap_hwmod_rtc_unlock/lock functions into RTC hwmod, so that SYSCONFIG register is updated properly Signed-off-by: Lokesh Vutla <[email protected]> Signed-off-by: Paul Walmsley <[email protected]>
2016-04-10ARM: OMAP2+: DRA7: Add hwmod entries for PWMSSVignesh R1-0/+89
Add hwmod entries for the PWMSS on DRA7. Set l4_root_clk_div as the main_clk of PWMSS. It is fixed-factored clock equal to L4PER2_L3_GICLK/2(l3_iclk_div/2). Signed-off-by: Vignesh R <[email protected]> [[email protected]: Do not add eQEP, ePWM and eCAP hwmod entries] Signed-off-by: Franklin S Cooper Jr <[email protected]> [[email protected]: fixed sparse warnings; added missing comments] Signed-off-by: Paul Walmsley <[email protected]>
2016-04-10ARM: DRA7: hwmod: Add data for McASP1/2/4/5/6/7/8Peter Ujfalusi1-0/+237
Add missing data for all McASP ports for the dra7 family Signed-off-by: Peter Ujfalusi <[email protected]> Signed-off-by: Paul Walmsley <[email protected]>
2016-03-01ARM: DRA7: hwmod: Add data for eDMA tpcc, tptc0, tptc1Peter Ujfalusi1-0/+88
Add hwmod data for the eDMA blocks: - TPCC: Third-party channel controller - TPTC0: Third-party transfer controller 0 - TPTC1: Third-party transfer controller 1 The TPCC's clock gating status follows the status of its clock and power domain. This means that the hwmod code can not directly control the TPCC enable/disable status. Signed-off-by: Peter Ujfalusi <[email protected]> [[email protected]: rephrased last two sentences of the patch description] Signed-off-by: Paul Walmsley <[email protected]>
2016-02-25ARM: DRA7: hwmod: Add custom reset handler for PCIeSSSekhar Nori1-0/+23
Add a custom reset handler for DRA7x PCIeSS. This handler is required to deassert PCIe hardreset lines after they have been asserted. This enables the PCIe driver to access registers after PCIeSS has been runtime enabled without having to deassert hardreset lines itself. With this patch applied, used lspci to make sure connected PCIe device enumerates on DRA74x and DRA72x EVMs. Signed-off-by: Sekhar Nori <[email protected]> Reported-by: Richard Cochran <[email protected]> Tested-by: Kishon Vijay Abraham I <[email protected]> Cc: Suman Anna <[email protected]> Cc: Dave Gerlach <[email protected]> Cc: Tony Lindgren <[email protected]> Cc: Bjorn Helgaas <[email protected]> Cc: Russell King <[email protected]> Signed-off-by: Paul Walmsley <[email protected]>
2016-02-09ARM: DRA7: hwmod: Add reset data for PCIeKishon Vijay Abraham I1-0/+15
Add PCIe reset data to PCIe hwmods on DRA7x. Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Sekhar Nori <[email protected]> Reviewed-by: Suman Anna <[email protected]> Signed-off-by: Paul Walmsley <[email protected]>
2016-02-09ARM: DRA7: hwmod: Fix OCP2SCP sysconfigKishon Vijay Abraham I1-2/+1
OCP2SCP doesn't support smart idle wakeup according to Table 26-22. OCP2SCP_SYSCONFIG in AM572x TRM [1] and Table 26-22. OCP2SCP_SYSCONFIG in AM571x TRM [2]. Remove SIDLE_SMART_WKUP from the list of supported SIDLE modes in hwmod data. [1] -> http://www.ti.com/lit/ug/spruhz6e/spruhz6e.pdf [2] -> http://www.ti.com/lit/ug/spruhz7a/spruhz7a.pdf Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Paul Walmsley <[email protected]>
2015-12-22Merge tag 'omap-for-v4.5/soc-initcall' of ↵Olof Johansson1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc SoC changes for omaps for v4.5 merge window. The main change here is to change the omap initcall levels a bit to initialize things later to allow early device drivers at core_initcall level. This makes things easier for us as most clocks can be made into regular device drivers except for a few early clocks needed to initialize system timers. I wanted to have these changes sit in Linux next for a few weeks before sending out a pull request, and so far now issues have showed up. The other changes in this series are timer changes for making use of the new PWM driver, and timer changes to support more high security SoCs. Also few minor improvments for module autoidle settings for ti81xx spinbox and dra7 debug on uart4 in hwmod code. The rest is pretty much just removal of platform data for SoCs that are all device tree only nowadays. * tag 'omap-for-v4.5/soc-initcall' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP2+: Remove device creation for omap-pcm-audio ARM: OMAP1: Remove device creation for omap-pcm-audio ARM: OMAP2+: Change core_initcall levels to postcore_initcall ARM: DRA7: hwmod: Enable DEBUG_LL for UART4 ARM: OMAP: RX-51: fix a typo in log writing ARM: omap4: hwmod: Remove elm address space from hwmod data ARM: OMAP2+: timer: Remove secure timer for DRA7xx HS devices ARM: OMAP: dmtimer: check for fixed timers during config ARM: OMAP2+: Remove omap_mmu_dev_attr structure ARM: OMAP4: hwmod data: Remove legacy IOMMU attr and addrs ARM: OMAP3: hwmod data: Remove legacy IOMMU data ARM: OMAP2+: Remove legacy device instantiation of IOMMUs ARM: OMAP2+: Add hwmod spinbox support for dm816x ARM: OMAP: add DT support for ti,dm816-timer ARM: OMAP: dmtimer: Add clock source from DT Signed-off-by: Olof Johansson <[email protected]>
2015-11-30ARM: DRA7: hwmod: Enable DEBUG_LL for UART4J.D. Schroeder1-1/+1
UART4 low level debug support. This helps in debugging with UART4 serial console output on DRA7 based platforms. Extending the following fix for UART4. commit 1c7e36bfc3e2 ("ARM: DRA7: hwmod: Fix boot crash with DEBUG_LL enabled on UART3") For using DEBUG_LL, enable CONFIG_DEBUG_OMAP4UART4 in menuconfig. On DRA7, UART4 hwmod doesn't have this flag enabled, failure observed when UART4 is used for low level debugging. Hence, Enable DEBUG_OMAP4UART4_FLAGS for UART4 hwmod. Signed-off-by: J.D. Schroeder <[email protected]> Signed-off-by: Praneeth Bajjuri <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2015-11-12ARM: OMAP: DRA7: hwmod: Add data for McASP3Peter Ujfalusi1-0/+56
McASP3 is used by default on DRA7x based boards for audio. Signed-off-by: Peter Ujfalusi <[email protected]> Acked-by: Paul Walmsley <[email protected]> Tested-by: Felipe Balbi <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2015-10-23ARM: DRA7: hwmod data: Remove spinlock hwmod addrsSuman Anna1-10/+0
The legacy-style device creation logic for hwspinlock has been removed after the DT-support was added to the driver. The hwmod addr space for spinlock is therefore no longer needed, so remove it. Signed-off-by: Suman Anna <[email protected]> Signed-off-by: Paul Walmsley <[email protected]>
2015-10-23ARM: DRA7/AM335x/AM437x: hwmod: Remove gpmc address space from hwmod dataFranklin S Cooper Jr1-10/+0
GPMC address information is provided by device tree. No longer need to include this information within hwmod. Signed-off-by: Franklin S Cooper Jr <[email protected]> Acked-by: Roger Quadros <[email protected]> [[email protected]: fixed chip names in subject line] Signed-off-by: Paul Walmsley <[email protected]>
2015-10-20ARM: DRA7/AM335x/AM437x: hwmod: Remove elm address space from hwmod dataFranklin S Cooper Jr1-10/+0
ELM address information is provided by device tree. No longer need to include this information within hwmod. Signed-off-by: Franklin S Cooper Jr <[email protected]> Acked-by: Roger Quadros <[email protected]> [[email protected]: fixed chip names in subject line; dropped the OMAP4 section since the OMAP4 SoC DTS file doesn't have the ELM address space documented yet] Signed-off-by: Paul Walmsley <[email protected]>
2015-07-15ARM: DRA7: hwmod: fix gpmc hwmodRoger Quadros1-3/+2
GPMC smart idle is not really broken but it does not support smart idle with wakeup. Fixes: 556708fe8718 ("ARM: OMAP: DRA7: hwmod: Make gpmc software supervised as the smart idle is broken") Signed-off-by: Roger Quadros <[email protected]> Reviewed-by: Paul Walmsley <[email protected]> Signed-off-by: Paul Walmsley <[email protected]>
2015-06-26Merge tag 'armsoc-soc' of ↵Linus Torvalds1-2/+2
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform support updates from Kevin Hilman: "Our SoC branch usually contains expanded support for new SoCs and other core platform code. Some highlights from this round: - sunxi: SMP support for A23 SoC - socpga: big-endian support - pxa: conversion to common clock framework - bcm: SMP support for BCM63138 - imx: support new I.MX7D SoC - zte: basic support for ZX296702 SoC" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (134 commits) ARM: zx: Add basic defconfig support for ZX296702 ARM: dts: zx: add an initial zx296702 dts and doc clk: zx: add clock support to zx296702 dt-bindings: Add #defines for ZTE ZX296702 clocks ARM: socfpga: fix build error due to secondary_startup MAINTAINERS: ARM64: EXYNOS: Extend entry for ARM64 DTS ARM: ep93xx: simone: support for SPI-based MMC/SD cards MAINTAINERS: update Shawn's email to use kernel.org one ARM: socfpga: support suspend to ram ARM: socfpga: add CPU_METHOD_OF_DECLARE for Arria 10 ARM: socfpga: use CPU_METHOD_OF_DECLARE for socfpga_cyclone5 ARM: EXYNOS: register power domain driver from core_initcall ARM: EXYNOS: use PS_HOLD based poweroff for all supported SoCs ARM: SAMSUNG: Constify platform_device_id ARM: EXYNOS: Constify irq_domain_ops ARM: EXYNOS: add coupled cpuidle support for Exynos3250 ARM: EXYNOS: add exynos_get_boot_addr() helper ARM: EXYNOS: add exynos_set_boot_addr() helper ARM: EXYNOS: make exynos_core_restart() less verbose ARM: EXYNOS: fix exynos_boot_secondary() return value on timeout ...
2015-06-04ARM: DRA7: hwmod: set DSS submodule parent hwmodsTomi Valkeinen1-0/+2
Set DSS core hwmod as the parent for all the DSS submodules. This ensures that the parent hwmods are enabled before any DSS submodules are accessed. Signed-off-by: Tomi Valkeinen <[email protected]> Acked-by: Paul Walmsley <[email protected]>
2015-06-04ARM: DRA7: hwmod: add DMM hwmod descriptionTomi Valkeinen1-0/+30
Add DMM hwmod entries for DRA7. This is identical to DMM on OMAP5. Signed-off-by: Tomi Valkeinen <[email protected]> Acked-by: Paul Walmsley <[email protected]>
2015-06-03arm: dra7: add DESHDCP clockTomi Valkeinen1-0/+1
Add a new Linux clock for DRA7 based SoCs to control DESHDCP clock. Signed-off-by: Tomi Valkeinen <[email protected]> Acked-by: Tero Kristo <[email protected]>
2015-06-01memory: omap-gpmc: Add Kconfig option for debugTony Lindgren1-2/+2
We support decoding the bootloader values if DEBUG is defined. But we also need to change the struct omap_hwmod flags to have HWMOD_INIT_NO_RESET to avoid the GPMC being reset during the boot. Otherwise just the default timings will be displayed instead of the bootloader configured timings. This also allows us to clean up the various GPMC related hwmod flags. For debugging, we only need HWMOD_INIT_NO_RESET, and HWMOD_INIT_NO_IDLE is not needed. Cc: Brian Hutchinson <[email protected]> Cc: Paul Walmsley <[email protected]> Cc: Roger Quadros <[email protected]> Signed-off-by: Tony Lindgren <[email protected]> Signed-off-by: Paul Walmsley <[email protected]>
2015-04-22Merge tag 'armsoc-soc' of ↵Linus Torvalds1-16/+97
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform updates from Olof Johansson: "Our SoC branch usually contains expanded support for new SoCs and other core platform code. In this case, that includes: - support for the new Annapurna Labs "Alpine" platform - a rework greatly simplifying adding new platform support to the MCPM subsystem (Multi-cluster power management) - cpuidle and PM improvements for Exynos3250 - misc updates for Renesas, OMAP, Meson, i.MX. Some of these could have gone in other branches but ended up here for various reasons" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (53 commits) ARM: alpine: add support for generic pci ARM: Exynos: migrate DCSCB to the new MCPM backend abstraction ARM: vexpress: migrate DCSCB to the new MCPM backend abstraction ARM: vexpress: DCSCB: tighten CPU validity assertion ARM: vexpress: migrate TC2 to the new MCPM backend abstraction ARM: MCPM: move the algorithmic complexity to the core code ARM: EXYNOS: allow cpuidle driver usage on Exynos3250 SoC ARM: EXYNOS: add AFTR mode support for Exynos3250 ARM: EXYNOS: add code for setting/clearing boot flag ARM: EXYNOS: fix CPU1 hotplug on Exynos3250 ARM: S3C64XX: Use fixed IRQ bases to avoid conflicts on Cragganmore ARM: cygnus: fix const declaration bcm_cygnus_dt_compat ARM: DRA7: hwmod: Fix the hwmod class for GPTimer4 ARM: DRA7: hwmod: Add data for GPTimers 13 through 16 ARM: EXYNOS: Remove left over 'extra_save' ARM: EXYNOS: Constify exynos_pm_data array ARM: EXYNOS: use static in suspend.c ARM: EXYNOS: Use platform device name as power domain name ARM: EXYNOS: add support for async-bridge clocks for pm_domains ARM: omap-device: add missed callback for suspend-to-disk ...
2015-03-24ARM: DRA7: hwmod: Fix the hwmod class for GPTimer4Suman Anna1-16/+1
GPTimer 4 is a regular timer and not a secure timer, so fix the hwmod to use the correct hwmod class (even though there are no differences in the class definition itself). Signed-off-by: Suman Anna <[email protected]> [[email protected]: dropped dra7xx_timer_secure_hwmod_class and dra7xx_timer_secure_sysc to avoid compiler warnings] Signed-off-by: Paul Walmsley <[email protected]>
2015-03-24ARM: DRA7: hwmod: Add data for GPTimers 13 through 16Suman Anna1-0/+96
Add the hwmod data for GPTimers 13, 14, 15 and 16. All these timers are present in the L4PER3 clock domain. The corresponding DT nodes are already present but disabled. Signed-off-by: Suman Anna <[email protected]> Signed-off-by: Paul Walmsley <[email protected]>
2015-02-26ARM: DRA7: hwmod_data: Fix hwmod data for pcieKishon Vijay Abraham I1-79/+24
Fixed hwmod data for pcie by having the correct module mode offset. Previously this module mode offset was part of pcie PHY which was wrong. Now this module mode offset was moved to pcie hwmod and removed the hwmod data for pcie phy. While at that renamed pcie_hwmod to pciess_hwmod in order to match with the name given in TRM. This helps to get rid of the following warning "omap_hwmod: pcie1: _wait_target_disable failed" [[email protected]: Found the issue that actually caused "omap_hwmod: pcie1: _wait_target_disable failed"] Signed-off-by: Grygorii Strashko <[email protected]> Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Paul Walmsley <[email protected]>