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2015-01-20ARM: DRA7: hwmod: Fix boot crash with DEBUG_LL enabled on UART3Lokesh Vutla1-1/+1
With commit '7dedd34: ARM: OMAP2+: hwmod: Fix a crash in _setup_reset() with DEBUG_LL' we moved from parsing cmdline to identify uart used for earlycon to using the requsite hwmod CONFIG_DEBUG_OMAPxUARTy FLAGS. On DRA7 UART3 hwmod doesn't have this flag enabled, and atleast on BeagleBoard-X15, where we use UART3 for console, boot fails with DEBUG_LL enabled. Enable DEBUG_OMAP4UART3_FLAGS for UART3 hwmod. For using DEBUG_LL, enable CONFIG_DEBUG_OMAP4UART3 in menuconfig. Fixes: 90020c7b2c5e ("ARM: OMAP: DRA7: hwmod: Create initial DRA7XX SoC data") Cc: <[email protected]> # v3.12+ Reviewed-by: Felipe Balbi <[email protected]> Acked-by: Felipe Balbi <[email protected]> Signed-off-by: Lokesh Vutla <[email protected]> Signed-off-by: Paul Walmsley <[email protected]>
2015-01-20ARM: OMAP: DRA7: hwmod: Make gpmc software supervised as the smart idle is ↵Keerthy1-1/+2
broken This patch fixes: 'omap_hwmod: gpmc: _wait_target_disable failed' error during suspend. This is because smart idle is broken. Tested in dra7-evm D1 board. Signed-off-by: Keerthy <[email protected]> Signed-off-by: Paul Walmsley <[email protected]>
2014-12-09Merge tag 'soc-for-linus' of ↵Linus Torvalds1-0/+100
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform changes from Arnd Bergmann: "New and updated SoC support, notable changes include: - bcm: brcmstb SMP support initial iproc/cygnus support - exynos: Exynos4415 SoC support PMU and suspend support for Exynos5420 PMU support for Exynos3250 pm related maintenance - imx: new LS1021A SoC support vybrid 610 global timer support - integrator: convert to using multiplatform configuration - mediatek: earlyprintk support for mt8127/mt8135 - meson: meson8 soc and l2 cache controller support - mvebu: Armada 38x CPU hotplug support drop support for prerelease Armada 375 Z1 stepping extended suspend support, now works on Armada 370/XP - omap: hwmod related maintenance prcm cleanup - pxa: initial pxa27x DT handling - rockchip: SMP support for rk3288 add cpu frequency scaling support - shmobile: r8a7740 power domain support various small restart, timer, pci apmu changes - sunxi: Allwinner A80 (sun9i) earlyprintk support - ux500: power domain support Overall, a significant chunk of changes, coming mostly from the usual suspects: omap, shmobile, samsung and mvebu, all of which already contain a lot of platform specific code in arch/arm" * tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (187 commits) ARM: mvebu: use the cpufreq-dt platform_data for independent clocks soc: integrator: Add terminating entry for integrator_cm_match ARM: mvebu: add SDRAM controller description for Armada XP ARM: mvebu: adjust mbus controller description on Armada 370/XP ARM: mvebu: add suspend/resume DT information for Armada XP GP ARM: mvebu: synchronize secondary CPU clocks on resume ARM: mvebu: make sure MMU is disabled in armada_370_xp_cpu_resume ARM: mvebu: Armada XP GP specific suspend/resume code ARM: mvebu: reserve the first 10 KB of each memory bank for suspend/resume ARM: mvebu: implement suspend/resume support for Armada XP clk: mvebu: add suspend/resume for gatable clocks bus: mvebu-mbus: provide a mechanism to save SDRAM window configuration bus: mvebu-mbus: suspend/resume support clocksource: time-armada-370-xp: add suspend/resume support irqchip: armada-370-xp: Add suspend/resume support ARM: add lolevel debug support for asm9260 ARM: add mach-asm9260 ARM: EXYNOS: use u8 for val[] in struct exynos_pmu_conf power: reset: imx-snvs-poweroff: add power off driver for i.mx6 ARM: imx: temporarily remove CONFIG_SOC_FSL from LS1021A ...
2014-11-26ARM: OMAP1/2+: MMC: separate platform data for mmc and mmc hs driverAndreas Fenkart1-2/+2
- omap mmc driver supports multiplexing, omap_mmc_hs doesn't this leads to one of the major confusions in the omap_hsmmc driver - platform data should be read-only for the driver most callbacks are not set by the omap3 platform init code while still required. So they are set from the driver probe function, which is against the paradigm that platform-data should not be modified by the driver typical examples are card_detect, read_only callbacks un-bundling by searching for driver name \"omap_hsmmc in the arch/arm folder. omap_hsmmc_platform_data is not initialized directly, but from omap2_hsmmc_info, which is defined in a separate header file not touched by this patch hwmod includes platform headers to declare features of the platform. All the declared features are prefixed OMAP_HSMMC. There is no need to include platform header from hwmod other except for feature defines Acked-by: Tony Lindgren <[email protected]> Signed-off-by: Andreas Fenkart <[email protected]> Signed-off-by: Ulf Hansson <[email protected]>
2014-11-26ARM: OMAP2: MMC: include mmc-omap platform header directlyAndreas Fenkart1-1/+1
Only a few files really need that platform header. When later splitting omap_mmc_platform_data into omap_mmc and omap_mmc_hs, those files declaring an hs mmc platform data will have to change the platform include, which is a good sanity check. Also removing omap242x_init_mmc, which is not used anywhere, checked with grep. Signed-off-by: Andreas Fenkart <[email protected]> Signed-off-by: Ulf Hansson <[email protected]>
2014-11-20ARM: DRA7: hwmod data: Add missing UART hwmod dataAmbresh K1-0/+100
We had constrainted hwmod entries to entries in dts which were present only for default mapped interrupts, the ones such as UARTs > 6 which needed IRQ crossbar configured were never added to hwmod database. Add them now that IRQ crossbar is functional Without this, enabling UARTs7 to 10 in dts results in the following crash: [ 1.893829] omap_uart 48420000.serial: _od_fail_runtime_resume: FIXME: missing hwmod/omap_dev info [ 1.903381] Unhandled fault: imprecise external abort (0x1406) at 0x00000000 [ 1.903381] ------------[ cut here ]------------ [ 1.903381] WARNING: CPU: 0 PID: 0 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x2ac/0x32c() [ 1.903411] 44000000.ocp:L3 Custom Error: MASTER MPU TARGET L4_PER2_P3 (Read): Data Access in User mode during Functional access [ 1.903411] Modules linked in: [ 1.903411] CPU: 0 PID: 0 Comm: swapper/0 Tainted: G W 3.18.0-rc1-dirty #3 [ 1.903442] [<c0015270>] (unwind_backtrace) from [<c00119b4>] (show_stack+0x10/0x14) [ 1.903442] [<c00119b4>] (show_stack) from [<c05e4afc>] (dump_stack+0x78/0x94) [ 1.903472] [<c05e4afc>] (dump_stack) from [<c003fed0>] (warn_slowpath_common+0x6c/0x8c) [ 1.903472] [<c003fed0>] (warn_slowpath_common) from [<c003ff84>] (warn_slowpath_fmt+0x30/0x40) [ 1.903472] [<c003ff84>] (warn_slowpath_fmt) from [<c0333bfc>] (l3_interrupt_handler+0x2ac/0x32c) [ 1.903503] [<c0333bfc>] (l3_interrupt_handler) from [<c008d6f8>] (handle_irq_event_percpu+0x60/0x230) [ 1.903503] [<c008d6f8>] (handle_irq_event_percpu) from [<c008d904>] (handle_irq_event+0x3c/0x5c) [ 1.903503] [<c008d904>] (handle_irq_event) from [<c00903b0>] (handle_fasteoi_irq+0xc4/0x190) [ 1.903503] [<c00903b0>] (handle_fasteoi_irq) from [<c008d01c>] (generic_handle_irq+0x20/0x30) [ 1.903533] [<c008d01c>] (generic_handle_irq) from [<c008d114>] (__handle_domain_irq+0x64/0xb8) [ 1.903533] [<c008d114>] (__handle_domain_irq) from [<c00086e4>] (gic_handle_irq+0x20/0x60) [ 1.903533] [<c00086e4>] (gic_handle_irq) from [<c05eb124>] (__irq_svc+0x44/0x5c) [ 1.903533] Exception stack(0xc08d1f60 to 0xc08d1fa8) [ 1.903564] 1f60: 00000001 00000001 00000000 c08dc930 c08d0000 00000000 00000000 00000000 [ 1.903564] 1f80: ffffffed c0978028 c08d89dc c08d8978 00000000 c08d1fa8 c0083fc0 c000f160 [ 1.903564] 1fa0: 20000013 ffffffff [ 1.903564] [<c05eb124>] (__irq_svc) from [<c000f160>] (arch_cpu_idle+0x20/0x3c) [ 1.903594] [<c000f160>] (arch_cpu_idle) from [<c0077c54>] (cpu_startup_entry+0x198/0x338) [ 1.903594] [<c0077c54>] (cpu_startup_entry) from [<c0869be0>] (start_kernel+0x358/0x3c4) [ 1.903594] [<c0869be0>] (start_kernel) from [<80008074>] (0x80008074) [ 1.903594] ---[ end trace 293fc95d463cff71 ]--- [ 2.117553] Internal error: : 1406 [#1] SMP ARM [ 2.122314] Modules linked in: [ 2.125518] CPU: 1 PID: 1 Comm: swapper/0 Tainted: G W 3.18.0-rc1-dirty #3 [ 2.133850] task: ed868b80 ti: ed86a000 task.ti: ed86a000 [ 2.139526] PC is at serial_omap_probe+0x2fc/0x514 [ 2.144561] LR is at trace_hardirqs_on_caller+0xec/0x1c4 [ 2.150146] pc : [<c038f0f0>] lr : [<c0083fc0>] psr: 40000013 [ 2.150146] sp : ed86be18 ip : ed9bb57c fp : f005e000 [ 2.162231] r10: 0000012a r9 : ed9b4f80 r8 : edc5bdcd [ 2.167724] r7 : edc58810 r6 : ed9bb400 r5 : ed9bb410 r4 : edc5bc10 [ 2.174560] r3 : 00000000 r2 : 00000000 r1 : 00000014 r0 : ffffffed [ 2.181427] Flags: nZcv IRQs on FIQs on Mode SVC_32 ISA ARM Segment kernel [ 2.189117] Control: 10c5387d Table: 8000406a DAC: 00000015 [ 2.195159] Process swapper/0 (pid: 1, stack limit = 0xed86a248) [ 2.201477] Stack: (0xed86be18 to 0xed86c000) [ 2.206054] be00: ed9ba2d0 00000000 [ 2.214660] be20: edc50150 00000001 c08cba58 00000000 00000000 ed9bb410 ffffffed c09481d8 [ 2.223236] be40: 00000000 c09481d8 c08cba58 00000000 00000000 c039bcfc c1170958 ed9bb410 [ 2.231842] be60: ed9bb444 c039a6f4 00000000 ed9bb410 c09481d8 ed9bb444 00000000 c08dc698 [ 2.240447] be80: edc4a100 c039a8b0 c09481d8 c039a81c 00000000 c0399060 ed8afaa8 ed92c110 [ 2.249053] bea0: c09481d8 edc482c0 c0949308 c0399ee0 c077f80c c09481d8 ed86a000 c09481d8 [ 2.257659] bec0: ed86a000 c08dc698 00000000 c039b088 00000000 00000000 ed86a000 c08a1924 [ 2.266235] bee0: c08a1904 c00089c4 00000000 00000000 00000000 00000000 60000093 00000000 [ 2.274841] bf00: 00000004 00000000 ed868b80 00000004 00000000 60000053 00000000 00000001 [ 2.283447] bf20: 00000000 c0083ea8 00000001 ed86a000 c08334bc ef7fc307 000000b2 c0059358 [ 2.292053] bf40: c07e176c c083299c 00000006 00000006 c08cb588 c08b69cc 00000006 c08b69ac [ 2.300659] bf60: c097a280 000000b2 c08cba58 c0869588 00000000 c0869e04 00000006 00000006 [ 2.309234] bf80: c0869588 00000000 00000000 c05dfd7c 00000000 00000000 00000000 00000000 [ 2.317840] bfa0: 00000000 c05dfd84 00000000 c000e668 00000000 00000000 00000000 00000000 [ 2.326446] bfc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 [ 2.335052] bfe0: 00000000 00000000 00000000 00000000 00000013 00000000 020405d0 00090c40 [ 2.343658] [<c038f0f0>] (serial_omap_probe) from [<c039bcfc>] (platform_drv_probe+0x48/0x98) [ 2.352630] [<c039bcfc>] (platform_drv_probe) from [<c039a6f4>] (driver_probe_device+0x10c/0x234) [ 2.361968] [<c039a6f4>] (driver_probe_device) from [<c039a8b0>] (__driver_attach+0x94/0x98) [ 2.370819] [<c039a8b0>] (__driver_attach) from [<c0399060>] (bus_for_each_dev+0x54/0x88) [ 2.379425] [<c0399060>] (bus_for_each_dev) from [<c0399ee0>] (bus_add_driver+0xdc/0x1d4) [ 2.388031] [<c0399ee0>] (bus_add_driver) from [<c039b088>] (driver_register+0x78/0xf4) [ 2.396453] [<c039b088>] (driver_register) from [<c08a1924>] (serial_omap_init+0x20/0x40) [ 2.405059] [<c08a1924>] (serial_omap_init) from [<c00089c4>] (do_one_initcall+0x80/0x1cc) [ 2.413757] [<c00089c4>] (do_one_initcall) from [<c0869e04>] (kernel_init_freeable+0x1b8/0x28c) [ 2.422912] [<c0869e04>] (kernel_init_freeable) from [<c05dfd84>] (kernel_init+0x8/0xe4) [ 2.431396] [<c05dfd84>] (kernel_init) from [<c000e668>] (ret_from_fork+0x14/0x2c) [ 2.439361] Code: e1b02f23 020320f0 0203300f 01a02222 (0a000021) [ 2.445770] ---[ end trace 293fc95d463cff72 ]--- [ 2.450683] Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b [ 2.450683] [ 2.460296] CPU0: stopping [ 2.463134] CPU: 0 PID: 0 Comm: swapper/0 Tainted: G D W 3.18.0-rc1-dirty #3 [ 2.471405] [<c0015270>] (unwind_backtrace) from [<c00119b4>] (show_stack+0x10/0x14) [ 2.479522] [<c00119b4>] (show_stack) from [<c05e4afc>] (dump_stack+0x78/0x94) [ 2.487060] [<c05e4afc>] (dump_stack) from [<c001394c>] (handle_IPI+0x190/0x264) [ 2.494781] [<c001394c>] (handle_IPI) from [<c000871c>] (gic_handle_irq+0x58/0x60) [ 2.502716] [<c000871c>] (gic_handle_irq) from [<c05eb124>] (__irq_svc+0x44/0x5c) [ 2.510528] Exception stack(0xc08d1f60 to 0xc08d1fa8) [ 2.515808] 1f60: c000f15c 00000000 00000000 00000000 c08d0000 00000000 00000000 00000000 [ 2.524353] 1f80: ffffffed c0978028 c08d89dc c08d8978 00000000 c08d1fa8 c000f15c c000f160 [ 2.532897] 1fa0: 60000013 ffffffff [ 2.536529] [<c05eb124>] (__irq_svc) from [<c000f160>] (arch_cpu_idle+0x20/0x3c) [ 2.544281] [<c000f160>] (arch_cpu_idle) from [<c0077c54>] (cpu_startup_entry+0x198/0x338) [ 2.552917] [<c0077c54>] (cpu_startup_entry) from [<c0869be0>] (start_kernel+0x358/0x3c4) [ 2.561462] [<c0869be0>] (start_kernel) from [<80008074>] (0x80008074) [ 2.568298] ---[ end Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b [ Reported-by: Franklin Cooper Jr. <[email protected]> Signed-off-by: Nishanth Menon <[email protected]> Signed-off-by: Ambresh K <[email protected]> Signed-off-by: Paul Walmsley <[email protected]>
2014-08-27ARM: DRA7: hwmod: Add dra74x and dra72x specific ocp interface listsRajendra Nayak1-2/+20
To deal with IPs which are specific to dra74x and dra72x, maintain seperate ocp interface lists, while keeping the common list for all common IPs. Move USB OTG SS4 to dra74x only list since its unavailable in dra72x and is giving an abort during boot. The dra72x only list is empty for now and a placeholder for future hwmod additions which are specific to dra72x. Fixes: d904b38df0db13 ("ARM: DRA7: hwmod: Add SYSCONFIG for usb_otg_ss") Reported-by: Keerthy <[email protected]> Signed-off-by: Rajendra Nayak <[email protected]> Signed-off-by: Lokesh Vutla <[email protected]> Tested-by: Nishanth Menon <[email protected]> [[email protected]: fixed comment style to conform with CodingStyle] Signed-off-by: Paul Walmsley <[email protected]>
2014-07-26Merge tag 'omap-for-v3.17/soc-new' of ↵Arnd Bergmann1-9/+565
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc Merge "SoC related changes for omaps for v3.17 merge window" from Tony Lindgren: - Add device tree and hwmod data for various devices for new SoCs - Remove legacy mailbox hwmod data that's no longer needed for SoCs that are DT only. Note that this may cause a minor merge conflict in mach-omap2/devices.c with omap_init_mbox() and omap_init_hdmi_audio(), both are legacy code that is getting removed * tag 'omap-for-v3.17/soc-new' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: DRA7: hwmod: Add data for RTC arm: dra7xx: Add hwmod data for MDIO and CPSW arm: dra7xx: Add hwmod data for pcie1 and pcie2 subsystems arm: dra7xx: Add hwmod data for pcie1 phy and pcie2 phy ARM: DRA7: hwmod: Add OCP2SCP3 module ARM: DRA7: hwmod: remove interrupts for DMA ARM: OMAP2+: DMA: remove requirement of irq for platform-dma driver ARM: AM33xx: hwmod_data: Remove legacy mailbox addrs ARM: OMAP4: hwmod_data: Remove legacy mailbox addrs ARM: OMAP2: hwmod_data: Remove legacy mailbox data and addrs ARM: OMAP2+: Avoid mailbox legacy device creation for DT-boot ARM: DRA7: hwmod_data: Add mailbox hwmod data ARM: dts: DRA7: Add mailbox nodes ARM: dts: AM4372: Correct mailbox node data ARM: dts: AM33xx: Add mailbox node ARM: dts: OMAP4: Add mailbox node ARM: dts: OMAP2+: Add mailbox fifo and user information ARM: AM43xx: hwmod: add DSS hwmod data Signed-off-by: Arnd Bergmann <[email protected]>
2014-07-23Merge branch 'omap-for-v3.17/mailbox' into omap-for-v3.17/socTony Lindgren1-0/+305
2014-07-23Merge tag 'for-v3.17/omap-hwmod-a' of ↵Tony Lindgren1-0/+260
git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v3.17/soc OMAP hwmod data additions for v3.17. Most of these are DRA7xx-related, although one patch adds DSS hwmods for AM43xx. Basic build, boot, and PM test results are available here: http://www.pwsan.com/omap/testlogs/hwmod-a-v3.17/20140722143514/
2014-07-22ARM: DRA7: hwmod: Add data for RTCLokesh Vutla1-0/+41
Add hwmod data for RTC Signed-off-by: Lokesh Vutla <[email protected]> Signed-off-by: Sekhar Nori <[email protected]> Reviewed-by: Rajendra Nayak <[email protected]> [[email protected]: updated to apply] Signed-off-by: Paul Walmsley <[email protected]>
2014-07-22arm: dra7xx: Add hwmod data for MDIO and CPSWMugunthan V N1-0/+65
Adding hwmod data for CPSW and MDIO which is present in DRA7xx SoC Cc: Rajendra Nayak <[email protected]> Cc: Tony Lindgren <[email protected]> Cc: Russell King <[email protected]> Cc: Paul Walmsley <[email protected]> Signed-off-by: Mugunthan V N <[email protected]> Tested-by: Sebastian Andrzej Siewior <[email protected]> Acked-by: Tony Lindgren <[email protected]> Signed-off-by: Paul Walmsley <[email protected]>
2014-07-22arm: dra7xx: Add hwmod data for pcie1 and pcie2 subsystemsKishon Vijay Abraham I1-0/+73
Added hwmod data for pcie1 and pcie2 subsystem present in DRA7xx SOC. Cc: Tony Lindgren <[email protected]> Cc: Russell King <[email protected]> Cc: Paul Walmsley <[email protected]> Signed-off-by: Kishon Vijay Abraham I <[email protected]> Tested-by: Kishon Vijay Abraham I <[email protected]> Reviewed-by: Rajendra Nayak <[email protected]> Signed-off-by: Paul Walmsley <[email protected]>
2014-07-22arm: dra7xx: Add hwmod data for pcie1 phy and pcie2 phyKishon Vijay Abraham I1-0/+57
Added hwmod data for pcie1 and pcie2 phy present in DRA7xx SOC. Also added the missing CLKCTRL OFFSET macro and CONTEXT OFFSET macro for pcie1 phy and pcie2 phy. Cc: Tony Lindgren <[email protected]> Cc: Russell King <[email protected]> Cc: Paul Walmsley <[email protected]> Signed-off-by: Kishon Vijay Abraham I <[email protected]> Tested-by: Kishon Vijay Abraham I <[email protected]> Reviewed-by: Rajendra Nayak <[email protected]> Signed-off-by: Paul Walmsley <[email protected]>
2014-07-22ARM: DRA7: hwmod: Add OCP2SCP3 moduleRoger Quadros1-0/+24
This module is needed for the SATA and PCIe PHYs. Signed-off-by: Roger Quadros <[email protected]> Reviewed-by: Rajendra Nayak <[email protected]> Tested-by: Sekhar Nori <[email protected]> Signed-off-by: Paul Walmsley <[email protected]>
2014-07-21ARM: DRA7: hwmod: remove interrupts for DMANishanth Menon1-9/+0
DMA interrupts are now available in of, and the definitions are duplicates in hwmod. This prevents us from dynamically allocating interrupt resources for dma from devicetree. Signed-off-by: Nishanth Menon <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2014-07-15ARM: DRA7: hwmod_data: Add mailbox hwmod dataSuman Anna1-0/+305
Add the hwmod data for the 13 instances of the system mailbox IP in DRA7 SoC. The patch is needed for performing a soft-reset while configuring the respective mailbox instance, otherwise is a non-essential change for functionality. The modules are smart idled on reset, and the IP module mode is hardware controlled. Cc: Rajendra Nayak <[email protected]> Cc: Paul Walmsley <[email protected]> Signed-off-by: Suman Anna <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2014-07-06ARM: DRA7: hwmod: Add SYSCONFIG for usb_otg_ssRoger Quadros1-0/+12
Add the sysconfig class bits for the Super Speed USB controllers Signed-off-by: Roger Quadros <[email protected]> Reviewed-by: Rajendra Nayak <[email protected]> Tested-by: Sekhar Nori <[email protected]> Signed-off-by: Paul Walmsley <[email protected]>
2014-07-06ARM: DRA7: hwmod: Fixup SATA hwmodRoger Quadros1-5/+1
Get rid of optional clock as that is now managed by the AHCI platform driver. Correct .mpu_rt_idx to 1 as the module register space (SYSCONFIG..) is passed as the second memory resource in the device tree. Signed-off-by: Roger Quadros <[email protected]> Reviewed-by: Rajendra Nayak <[email protected]> Tested-by: Sekhar Nori <[email protected]> Signed-off-by: Paul Walmsley <[email protected]>
2014-05-14ARM: dts: dra7: Add USB related nodesRoger Quadros1-10/+0
Add nodes for the Super Speed USB controllers, omap-control-usb, USB2 PHY and USB3 PHY devices. Remove ocp2scp1 address space from hwmod data as it is now provided via device tree. CC: Benoît Cousson <[email protected]> Reviewed-by: Felipe Balbi <[email protected]> Signed-off-by: Roger Quadros <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2014-02-19ARM: DRA7: hwmod data: correct the sysc data for spinlockSuman Anna1-5/+4
The spinlock module's SYSCONFIG register on DRA7xx does not support smart wakeup, and also does not have the CLKACTIVITY field. The sysc data for spinlock module has been appropriately fixed up to reflect the same. Cc: Ambresh K <[email protected]> Signed-off-by: Suman Anna <[email protected]> Signed-off-by: Paul Walmsley <[email protected]>
2013-12-25ARM: DRA7: hwmod: Fix boot crash with DEBUG_LLRajendra Nayak1-1/+1
With commit '7dedd34: ARM: OMAP2+: hwmod: Fix a crash in _setup_reset() with DEBUG_LL' we moved from parsing cmdline to identify uart used for earlycon to using the requsite hwmod CONFIG_DEBUG_OMAPxUARTy FLAGS. On DRA7 though, we seem to be missing this flag, and atleast on the DRA7 EVM where we use uart1 for console, boot fails with DEBUG_LL enabled. Reported-by: Lokesh Vutla <[email protected]> Tested-by: Lokesh Vutla <[email protected]> # on a different base Signed-off-by: Rajendra Nayak <[email protected]> Fixes: 7dedd346941d ("ARM: OMAP2+: hwmod: Fix a crash in _setup_reset() with DEBUG_LL") Signed-off-by: Paul Walmsley <[email protected]>
2013-08-23ARM: OMAP: DRA7: hwmod: Create initial DRA7XX SoC dataAmbresh K1-0/+2724
Adding the hwmod data for DRA7XX platforms. Signed-off-by: Ambresh K <[email protected]> Signed-off-by: Tero Kristo <[email protected]> Signed-off-by: Rajendra Nayak <[email protected]> Signed-off-by: Paul Walmsley <[email protected]>
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