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Avoid adding nasty genirq-specific code to local timers to enable PPI
interrupts. Instead, provide a gic function to do this.
Signed-off-by: Russell King <[email protected]>
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Provide a standard get_irqnr_preamble assembler macro for platforms
to use, which retrieves the base address of the GIC CPU interface
from gic_cpu_base_addr. Allow platforms to override this by defining
HAVE_GET_IRQNR_PREAMBLE.
Reviewed-by: Catalin Marinas <[email protected]>
Tested-by: Abhijeet Dharmapurikar <[email protected]>
Signed-off-by: Russell King <[email protected]>
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Every architecture using the GIC has a gic_cpu_base_addr pointer for
GIC 0 for their entry assembly code to use to decode the cause of the
current interrupt. Move this into the common GIC code.
Reviewed-by: Catalin Marinas <[email protected]>
Tested-by: Abhijeet Dharmapurikar <[email protected]>
Signed-off-by: Russell King <[email protected]>
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We don't need to re-pass the base address for the CPU interfaces to the
GIC for secondary CPUs, as it will never be different from the boot CPU
- and even if it was, we'd overwrite the boot CPU's base address.
Get rid of this argument, and rename to gic_secondary_init().
Reviewed-by: Catalin Marinas <[email protected]>
Tested-by: Abhijeet Dharmapurikar <[email protected]>
Signed-off-by: Russell King <[email protected]>
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Provide gic_init() which initializes the GIC distributor and current
CPU's GIC interface for the boot (or single) CPU.
Reviewed-by: Catalin Marinas <[email protected]>
Tested-by: Abhijeet Dharmapurikar <[email protected]>
Signed-off-by: Russell King <[email protected]>
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This patch is the identical GIC demux implementation
merge V3. Instead of implementing same code over and
over simply share it in entry-macro-gic.S. The shared
code is based on the realview implementation.
Each GIC demux instance still has to setup the base address
of the controller using the get_irqnr_preamble macro. The
rest of the GIC specific code can be shared.
Signed-off-by: Magnus Damm <[email protected]>
Acked-by: Srinidhi Kasagar <[email protected]>
Signed-off-by: Russell King <[email protected]>
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From: Rob Herring <[email protected]>
The timer-sp h/w used on versatile platforms can also be used for other
platforms, so move it to a common location.
Signed-off-by: Rob Herring <[email protected]>
Signed-off-by: Russell King <[email protected]>
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Signed-off-by: Eric Miao <[email protected]>
Cc: Haojian Zhuang <[email protected]>
Cc: Mike Rapoport <[email protected]>
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git://dev.omapzoom.org/pub/scm/santosh/kernel-omap4-base into devel-stable
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git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into devel-stable
Conflicts:
arch/arm/mach-s3c64xx/dev-audio.c
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The cache size is needed for to optimise range based
maintainance operations
Signed-off-by: Santosh Shilimkar <[email protected]>
Acked-by: Catalin Marinas <[email protected]>
Acked-by: Linus Walleij <[email protected]>
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Replace tab with space after #define to be consisten with other
define in the file. Also move the bit mask below the register offsets.
Signed-off-by: Santosh Shilimkar <[email protected]>
Acked-by: Catalin Marinas <[email protected]>
Acked-by: Linus Walleij <[email protected]>
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This patch adds L2X0 Prefetch and Power control register.
Signed-off-by: Kyungmin Park <[email protected]>
Acked-by: Catalin Marinas <[email protected]>
Signed-off-by: Kukjin Kim <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial
* 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (39 commits)
Update broken web addresses in arch directory.
Update broken web addresses in the kernel.
Revert "drivers/usb: Remove unnecessary return's from void functions" for musb gadget
Revert "Fix typo: configuation => configuration" partially
ida: document IDA_BITMAP_LONGS calculation
ext2: fix a typo on comment in ext2/inode.c
drivers/scsi: Remove unnecessary casts of private_data
drivers/s390: Remove unnecessary casts of private_data
net/sunrpc/rpc_pipe.c: Remove unnecessary casts of private_data
drivers/infiniband: Remove unnecessary casts of private_data
drivers/gpu/drm: Remove unnecessary casts of private_data
kernel/pm_qos_params.c: Remove unnecessary casts of private_data
fs/ecryptfs: Remove unnecessary casts of private_data
fs/seq_file.c: Remove unnecessary casts of private_data
arm: uengine.c: remove C99 comments
arm: scoop.c: remove C99 comments
Fix typo configue => configure in comments
Fix typo: configuation => configuration
Fix typo interrest[ing|ed] => interest[ing|ed]
Fix various typos of valid in comments
...
Fix up trivial conflicts in:
drivers/char/ipmi/ipmi_si_intf.c
drivers/usb/gadget/rndis.c
net/irda/irnet/irnet_ppp.c
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The patch below updates broken web addresses in the arch directory.
Signed-off-by: Justin P. Mattock <[email protected]>
Signed-off-by: Maciej W. Rozycki <[email protected]>
Cc: Finn Thain <[email protected]>
Cc: Randy Dunlap <[email protected]>
Reviewed-by: Finn Thain <[email protected]>
Signed-off-by: Jiri Kosina <[email protected]>
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Use BIT() macro whenever it is sensible to do so.
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Alexander Shishkin <[email protected]>
Signed-off-by: Russell King <[email protected]>
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This is done so as to be able to make use of the coresight components'
registers in assembler code (like omap sleep code). Also, there shouldn't
be any users of this structure outside the etm driver.
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Alexander Shishkin <[email protected]>
Signed-off-by: Russell King <[email protected]>
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* 'for-linus/samsung-2635' of git://git.fluff.org/bjdooks/linux:
DMAENGINE: correct PL080 register header file
ARM: SAMSUNG: Fix on build warning about dependency in Kconfig
ARM: SMDK6410: Make virtual screen twice depth of real
ARM: S3C64XX: Update consistent DMA size to 8MiB
ARM: S3C64XX: Add audio support to SmartQ
ARM: S3C64XX: Framebuffer fix for SmartQ5
ARM: S3C64XX: Set wifi and iNAND as permanently connected SD devices on SmartQ boards
ARM: S3C64XX: Move SmartQ LCD control platform definition to shared file
ARM: mach-real6410: add sdhc device support
ARM: mach-real6410: add dm9000 ethernet support for mach-real6410
ARM: S3C64XX: Support for Real6410
Fix up trivial conflicts in arch/arm/mach-s3c64xx/mach-smartq5.c
("remove pixclock" vs "Framebuffer fix for SmartQ5")
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This PL008 among all other variables named PL080 doesn't seem
right. Fix it. Also add some missing defined that I use in the
new PL08x driver.
Acked-by: Ben Dooks <[email protected]>
Signed-off-by: Linus Walleij <[email protected]>
Signed-off-by: Ben Dooks <[email protected]>
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Conflicts:
arch/arm/Kconfig
arch/arm/mm/Kconfig
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Add notion of ETM OS lock, save and restore registers.
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Alexander Shishkin <[email protected]>
Signed-off-by: Russell King <[email protected]>
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Add bit definitions of the CPR register of the SCOOP chip into scoop.h. Also,
cleanup the GPCR definitions to match coding style.
Signed-off-by: Marek Vasut <[email protected]>
Signed-off-by: Eric Miao <[email protected]>
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'omap', 'pxa', 'spear' and 'versatile' into devel
Conflicts:
arch/arm/Makefile
arch/arm/common/Makefile
arch/arm/mm/Kconfig
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PL330 is a configurable DMA controller PrimeCell device.
The register map of the device is well defined.
The configuration of a particular implementation can be
read from the six configuration registers CR0-4,Dn.
This patch implements a driver for the specification:-
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0424a/DDI0424A_dmac_pl330_r0p0_trm.pdf
The exported interface should be sufficient to implement
a driver for any DMA API.
Signed-off-by: Jassi Brar <[email protected]>
Signed-off-by: Russell King <[email protected]>
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The L310 cache controller's interface is almost identical
to the L210. One major difference is that the PL310 can
have up to 16 ways.
This change uses the cache's part ID and the Associativity
bits in the AUX_CTRL register to determine the number of ways.
Also, this version prints out the CACHE_ID and AUX_CTRL registers.
Acked-by: Will Deacon <[email protected]>
Acked-by: Acked-by: Catalin Marinas <[email protected]>
Signed-off-by: Jason S. McMullan <[email protected]>
Signed-off-by: Russell King <[email protected]>
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The only difference between ICST307 and ICST525 are the two arrays
for calculating the S parameter; the code is now identical. Merge
the two files and kill the duplicated code.
Signed-off-by: Russell King <[email protected]>
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Signed-off-by: Russell King <[email protected]>
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Signed-off-by: Russell King <[email protected]>
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This makes the ICST support fit more nicely with the clk API,
eliminating the need to *1000 and /1000 in places.
Signed-off-by: Russell King <[email protected]>
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Signed-off-by: Russell King <[email protected]>
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These functions were originally implemented for the CLCD driver before
we had clk API support. Since the CLCD driver does not use these
anymore, we can remove them.
Signed-off-by: Russell King <[email protected]>
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The structures for the ICST307 and ICST525 VCO devices are
identical, so merge them together.
Signed-off-by: Russell King <[email protected]>
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Signed-off-by: Russell King <[email protected]>
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Reviewed-by: Linus Walleij <[email protected]>
Signed-off-by: Viresh Kumar <[email protected]>
Signed-off-by: Russell King <[email protected]>
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Conflicts:
arch/arm/mach-mx2/devices.c
arch/arm/mach-mx2/devices.h
sound/soc/pxa/pxa-ssp.c
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Signed-off-by: Eric Miao <[email protected]>
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Signed-off-by: Eric Miao <[email protected]>
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Signed-off-by: Eric Miao <[email protected]>
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When we reach the loop, len is at least 1, we only stay in the loop when
len is at least MAX_BYTE_COUNT + 1, MAX_BYTE_COUNT is subtracted in each
iteration. So when we leave the loop, or didn't take it, len is at least 1.
Testing whether len is non-zero appears redundant.
Signed-off-by: Roel Kluin <[email protected]>
Signed-off-by: Dan Williams <[email protected]>
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This driver implements support for on-chip Embedded Tracing Macrocell and
Embedded Trace Buffer. It allows to trigger tracing of kernel execution flow
and exporting trace output to userspace via character device and a sysrq
combo.
Trace output can then be decoded by a fairly simple open source tool [1]
which is already sufficient to get the idea of what the kernel is doing.
[1]: http://github.com/virtuoso/etm2human
Signed-off-by: Alexander Shishkin <[email protected]>
Signed-off-by: Russell King <[email protected]>
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Support for the Tauros2 L2 cache controller as used with the PJ1
and PJ4 CPUs.
Signed-off-by: Lennert Buytenhek <[email protected]>
Signed-off-by: Saeed Bishara <[email protected]>
Signed-off-by: Nicolas Pitre <[email protected]>
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This updates the IOP platform to use the kernel's generic time
framework. With clockevent support in place, this reduces to
selecting GENERIC_TIME and removing the platform's private timer
->offset() operation (iop_gettimeoffset).
Tested on n2100, compile-tested for all plat-iop machines.
Signed-off-by: Mikael Pettersson <[email protected]>
Signed-off-by: Dan Williams <[email protected]>
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This updates the IOP platform to expose the interrupting
timer 0 as a clockevent object. The timer interrupt handler
is changed to call the clockevent ->event_handler() instead
of timer_tick(), and ->set_next_event() and ->set_mode()
operations are added to allow the mode of the timer to be
updated (required for ONESHOT/NOHZ mode).
Timer 0 must now be properly initialised, which requires
a new write_tcr0() function from the mach-specific code.
The mode of timer 0 must be read at the start of ->set_mode(),
which requires a new read_tmr0() function from the mach-
specific code.
Initial setup of timer 0 is also rewritten to be more robust.
Tested on n2100, compile-tested for all plat-iop machines.
Signed-off-by: Mikael Pettersson <[email protected]>
Signed-off-by: Dan Williams <[email protected]>
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This updates the IOP platform to expose the free-running
timer 1 as a clocksource object. This timer is now also
properly initialised, which requires a new write_tcr1()
function from the mach-specific code. Apart from the
explicit initialisation, there is no functional change
in how timer 1 is programmed.
Tested on n2100, compile-tested for all plat-iop machines.
Signed-off-by: Mikael Pettersson <[email protected]>
Signed-off-by: Dan Williams <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/djbw/xscaleiop
Conflicts:
MAINTAINERS
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Conflicts:
crypto/async_tx/async_xor.c
drivers/dma/ioat/dma_v2.h
drivers/dma/ioat/pci.c
drivers/md/raid5.c
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Drop iop-adma's use of tx_list from struct dma_async_tx_descriptor in
preparation for removal of this field.
Signed-off-by: Dan Williams <[email protected]>
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