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Per sram.yaml, address-cells, size-cells and ranges are mandatory.
Pass them to fix the following schema warnings:
sram@78000000: '#address-cells' is a required property
from schema $id: http://devicetree.org/schemas/sram/sram.yaml#
sram@78000000: '#size-cells' is a required property
from schema $id: http://devicetree.org/schemas/sram/sram.yaml#
sram@78000000: 'ranges' is a required property
from schema $id: http://devicetree.org/schemas/sram/sram.yaml#
Signed-off-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Per imxdi-rtc.yaml, there is only one valid compatible entry and
clock-names is not a valid property.
Change it to fix the following schema warnings:
dryice@53ffc000: compatible: ['fsl,imx25-dryice', 'fsl,imx25-rtc'] is too long
from schema $id: http://devicetree.org/schemas/rtc/imxdi-rtc.yaml#
dryice@53ffc000: 'clock-names' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/rtc/imxdi-rtc.yaml#
Signed-off-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add device-tree props to allow boot firmware to populate MAC addresses.
Signed-off-by: Tim Harvey <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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There is no need to split dmas in two lines.
Make it more readable by writing it in a single line.
Signed-off-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The "reset" key on a few IXP4xx routers were sending KEY_ESC
but what we want to send is KEY_RESTART which will make
OpenWrt and similar userspace do a controlled reboot.
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Linus Walleij <[email protected]>
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To upgrade the firmware and similar, the flash needs write
access.
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Linus Walleij <[email protected]>
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This is a USRobotics NAS/Firewall/router that has been supported
by OpenWrt in the past. It had dedicated users so let's get it
properly supported.
Some debugging and fixing was provided by Howard Harte.
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Linus Walleij <[email protected]>
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The Gemtek users can just use the Linksys device tree,
triplet compatible is overdoing it.
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Linus Walleij <[email protected]>
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Node names should be generic, so use 'eeprom' to fix the
following schema warnings:
at24@52: $nodename:0: 'at24@52' does not match '^eeprom@[0-9a-f]{1,2}$'
from schema $id: http://devicetree.org/schemas/eeprom/at24.yaml#
Signed-off-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Per fsl-imx-sahara.yaml, there should not be a 'fsl,imx51-sahara'
compatible.
Remove it to fix the following schema warning:
imx51-apf51.dtb: crypto@83ff8000: compatible: ['fsl,imx53-sahara', 'fsl,imx51-sahara'] is too long
from schema $id: http://devicetree.org/schemas/crypto/fsl-imx-sahara.yaml#
Signed-off-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Use the new analog mode SDIO pin definitions on the STM32F7 boards.
Signed-off-by: Ben Wolsieffer <[email protected]>
Signed-off-by: Alexandre Torgue <[email protected]>
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Add SDIO sleep pin definitions that place the pins in analog mode to
save power.
Signed-off-by: Ben Wolsieffer <[email protected]>
Signed-off-by: Alexandre Torgue <[email protected]>
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The RNG on STM32MP13 offers upgrades like customization of its
configuration and the conditional reset.
The hardware RNG should be managed in the secure world for but it
is supported on Linux. Therefore, is it not default enabled.
Signed-off-by: Gatien Chevallier <[email protected]>
Signed-off-by: Alexandre Torgue <[email protected]>
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Looks like one pinctrl single binding warning sneaked in while we were
implementing the yaml binding. Let's fix the 'pinmux-wl12xx-gpio' does not
match any of the regexes warning by adding -pins suffix.
Signed-off-by: Tony Lindgren <[email protected]>
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The sleep pins never got added earlier probably because the driver was not
behaving correctly with the sleep pins. We need the sleep pins to prevent
the modem from waking up on it's own if the reset pin glitches in deeper
SoC idle states.
Cc: Ivaylo Dimitrov <[email protected]>
Cc: Merlijn Wajer <[email protected]>
Cc: Pavel Machek <[email protected]>
Reviewed-by: Sebastian Reichel <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
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The AM3517 has one ethernet controller called davinci_emac.
Configuring the alias allows the MAC address to be passed
from the bootloader to Linux.
Signed-off-by: Adam Ford <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
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The Ethernet PHY interrupt pin is routed to GPIO_58. Create a
PHY node to configure this GPIO for the interrupt to avoid polling.
Signed-off-by: Adam Ford <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
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The pinmux for LED3 and LED4 are incorrectly attached to the
omap3_pmx_core when they should be connected to the omap3_pmx_wkup
pin mux. This was likely masked by the fact that the bootloader
used to do all the pinmuxing.
Fixes: 0dbf99542caf ("ARM: dts: am3517-evm: Add User LEDs and Pushbutton")
Signed-off-by: Adam Ford <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
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Drop omap36xx compatible as done in other omap3630 devices.
This has apparently fallen through the lattice.
Signed-off-by: Andreas Kemnade <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
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Add also the level-shifter flag to avoid probe failure in magnetometer
probe.
Signed-off-by: Andreas Kemnade <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
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Add a device node for the Spansion S29GL512P NOR FLASH on the Bock-W
development board. This FLASH resides in the external address space of
the Local Bus State Controller.
Signed-off-by: Geert Uytterhoeven <[email protected]>
Link: https://lore.kernel.org/r/45e6343ae07ef1add8bba5e8281ef9e6a977c573.1694768311.git.geert+renesas@glider.be
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This will allow frequency-scaling for the cpu-cores.
Operating frequencies and voltages have been taken from Rockchip's
downstream kernel.
Signed-off-by: Alex Bee <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Stuebner <[email protected]>
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For bring-up of the non-boot cpu cores the enable-method for RK3036 can be
re-used.
This adds a (small) chunk of SRAM for execution of the SMP trampoline code
and the respective enable-method property to the cpus.
Signed-off-by: Alex Bee <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Stuebner <[email protected]>
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In order to support bring-up of the non-boot cores, this patch adds the
reset controls for the cpu cores.
They are required/will be used by the Rockchip platsmp driver.
Signed-off-by: Alex Bee <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Stuebner <[email protected]>
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RK3128 SoCs have 8KB of SRAM.
Add the respective device tree node for it.
Signed-off-by: Alex Bee <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Stuebner <[email protected]>
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Edgeble Neu2 IO board Fan connected to PWM11.
Enable the pwm fan for it.
Signed-off-by: Jagan Teki <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Stuebner <[email protected]>
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Add pwm11 node for Rockchip RV1126.
Signed-off-by: Jagan Teki <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Stuebner <[email protected]>
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Add pwm11m0 pins for Rockchip RV1126 PWM11.
Signed-off-by: Jagan Teki <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Stuebner <[email protected]>
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Add PWM2 node for Rockchip RV1126.
Signed-off-by: Jagan Teki <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Stuebner <[email protected]>
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Add pwm2m0 pins for Rockchip RV1126 PWM2.
Signed-off-by: Jagan Teki <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Stuebner <[email protected]>
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Currently the Rockchip timer source clocks are set to xin24 for no obvious
reason and the actual timer clocks (SCLK_TIMER*) will get disabled during
boot process as they have no user. That will make the SoC stuck as no timer
source exists.
Fixes: a0201bff6259 ("ARM: dts: rockchip: add rk3128 soc dtsi")
Signed-off-by: Alex Bee <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Stuebner <[email protected]>
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Like most other Rockchip ARM SoCs, the PL330 needs the
arm,pl330-periph-burst quirk in order to work as expected.
Add it.
Fixes: a0201bff6259 ("ARM: dts: rockchip: add rk3128 soc dtsi")
Signed-off-by: Alex Bee <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Stuebner <[email protected]>
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The Cortex-A7 timer has 4 interrupts.
Add the missing one.
Fixes: a0201bff6259 ("ARM: dts: rockchip: add rk3128 soc dtsi")
Signed-off-by: Alex Bee <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Stuebner <[email protected]>
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The register address for i2c0 is missing a 0x to mark it as hex.
Fixes: a0201bff6259 ("ARM: dts: rockchip: add rk3128 soc dtsi")
Signed-off-by: Alex Bee <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Stuebner <[email protected]>
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atmel,rtt-rtc-time-reg is a mandatory property and encodes the GPBR
register used to store the time base when the RTT is used as an RTC.
Align the RTT with what's currently done for sam9x60ek and sama7g5ek,
and enable it by default even if RTC is also enabled.
Signed-off-by: Tudor Ambarus <[email protected]>
[[email protected]: adapt to newer kernel]
Signed-off-by: Nicolas Ferre <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Claudiu Beznea <[email protected]>
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The Anbernic RG-Nano is a small portable game device based on the
Allwinner V3s SoC. It has GPIO buttons on the face and side for
input, a single mono speaker, a 240x240 SPI controlled display, a USB-C
OTG port, an SD card slot for booting, and 64MB of RAM included in the
SoC. There does not appear to be a crystal feeding the internal RTC so
it does not keep proper time (for me it ran 8 hours slow in a 24 hour
period). External RTC works just fine.
Working/Tested:
- SDMMC
- UART (for debugging)
- Buttons
- Charging/battery/PMIC
- Speaker
- RTC (external RTC)
- USB
- Display
Signed-off-by: Chris Morgan <[email protected]>
Reviewed-by: Andre Przywara <[email protected]>
Acked-by: Jernej Skrabec <[email protected]>
Reviewed-by: Samuel Holland <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Jernej Skrabec <[email protected]>
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Add the EHCI and OHCI controller to the Allwinner v3s to support using
USB in host mode.
Signed-off-by: Chris Morgan <[email protected]>
Reviewed-by: Andre Przywara <[email protected]>
Acked-by: Jernej Skrabec <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Jernej Skrabec <[email protected]>
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Add pinctrl nodes for pwm0 and pwm1.
Signed-off-by: Chris Morgan <[email protected]>
Reviewed-by: Andre Przywara <[email protected]>
Acked-by: Jernej Skrabec <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Jernej Skrabec <[email protected]>
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stm32mp15-pinctrl.dtsi contains nearly all pinctrl groups collected from
all boards. Most of them end up unused by a board and only waste binary
space. Add /omit-if-no-ref/ to the groups to scrub the unused groups
from the dtbs.
Signed-off-by: Sascha Hauer <[email protected]>
Reviewed-by: Ahmad Fatoum <[email protected]>
Signed-off-by: Alexandre Torgue <[email protected]>
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The patch fixes the following warning:
arch/arm/dts/stm32f7-pinctrl.dtsi:380: check: Please don't use multiple blank lines
Fixes: ba287d1a0137 ("ARM: dts: stm32: add pin map for LTDC on stm32f7")
Signed-off-by: Dario Binacchi <[email protected]>
Reviewed-by: Raphaël Gallais-Pou <[email protected]>
Signed-off-by: Alexandre Torgue <[email protected]>
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Add the HASH support on stm32mp131.
Signed-off-by: Lionel Debieve <[email protected]>
Signed-off-by: Thomas Bourgoin <[email protected]>
Signed-off-by: Alexandre Torgue <[email protected]>
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Add initial device tree file for sama5d29_curiosity board.
Signed-off-by: Mihai Sain <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Claudiu Beznea <[email protected]>
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GPIO keys and LEDs are not part of the SoC, so move them to top-level to
fix dtbs_check warnings like:
qcom-ipq8064-rb3011.dtb: soc: gpio-keys: {'compatible': ['gpio-keys'], ... should not be valid under {'type': 'object'}
from schema $id: http://devicetree.org/schemas/simple-bus.yaml#
Reviewed-by: Konrad Dybcio <[email protected]>
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Dmitry Baryshkov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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Fixed regulator put under "regulators" node will not be populated,
unless simple-bus or something similar is used. Drop the "regulators"
wrapper node to fix this.
Fixes: 2c5e596524e7 ("ARM: dts: Add MDM9615 dtsi")
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Dmitry Baryshkov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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regulator-fixed does not have a "regulator-type" property:
qcom-apq8060-dragonboard.dtb: regulator-fixed: Unevaluated properties are not allowed ('regulator-type' was unexpected)
Reviewed-by: Konrad Dybcio <[email protected]>
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Dmitry Baryshkov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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regulator-fixed does not have a "regulator-type" property:
qcom-apq8064-ifc6410.dtb: regulator-ext-3p3v: Unevaluated properties are not allowed ('regulator-type' was unexpected)
Reviewed-by: Konrad Dybcio <[email protected]>
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Dmitry Baryshkov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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Bindings expect clocks to be in different order:
qcom-sdx65-mtp.dtb: mmc@8804000: clock-names:0: 'iface' was expected
qcom-sdx65-mtp.dtb: mmc@8804000: clock-names:1: 'core' was expected
Reviewed-by: Konrad Dybcio <[email protected]>
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Dmitry Baryshkov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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DSI node does not accept nor use "label" property:
qcom-apq8064-asus-nexus7-flo.dtb: dsi@4700000: Unevaluated properties are not allowed ('label' was unexpected)
Reviewed-by: Konrad Dybcio <[email protected]>
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Dmitry Baryshkov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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Add rpm-master-stats node for MSM8974 and the required RPM MSG RAM
slices for memory access.
Signed-off-by: Matti Lehtimäki <[email protected]>
Reviewed-by: Luca Weiss <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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Add rpm-master-stats node for MSM8226 and the required RPM MSG RAM
slices for memory access.
Signed-off-by: Matti Lehtimäki <[email protected]>
Reviewed-by: Luca Weiss <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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