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Replace hard-coded flags with defines for readability. No functional
change.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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Replace hard-coded flags with defines for readability. No functional
change.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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The S3C RTC requires 32768 Hz clock as input which is provided by PMIC.
However the PMIC is not described in DTS at all so at least add
a workaround to model its clock with a fixed-clock.
This fixes dtbs_check warnings:
rtc@e2800000: clocks: [[2, 145]] is too short
rtc@e2800000: clock-names: ['rtc'] is too short
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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The S3C RTC requires 32768 Hz clock as input which is provided by PMIC.
However the PMIC is not described in DTS at all so at least add
a workaround to model its clock with a fixed-clock.
This fixes dtbs_check warnings:
rtc@e2800000: clocks: [[2, 145]] is too short
rtc@e2800000: clock-names: ['rtc'] is too short
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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The S3C RTC requires 32768 Hz clock as input which is provided by PMIC.
However the PMIC is not described in DTS at all so at least add
a workaround to model its clock with a fixed-clock.
This fixes dtbs_check warnings:
rtc@e2800000: clocks: [[2, 145]] is too short
rtc@e2800000: clock-names: ['rtc'] is too short
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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The S3C RTC requires 32768 Hz clock as input which is provided by PMIC.
However there is no such clock provider but rather a regulator driver
which registers the clock as a regulator. This is an old driver which
will not be updated so add a workaround - a fixed-clock to fill missing
clock phandle reference in S3C RTC.
This fixes dtbs_check warnings:
rtc@e2800000: clocks: [[2, 145]] is too short
rtc@e2800000: clock-names: ['rtc'] is too short
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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The S3C RTC requires 32768 Hz clock as input which is provided by PMIC.
However there is no such clock provider but rather a regulator driver
which registers the clock as a regulator. This is an old driver which
will not be updated so add a workaround - a fixed-clock to fill missing
clock phandle reference in S3C RTC.
This fixes dtbs_check warnings:
rtc@e2800000: clocks: [[2, 145]] is too short
rtc@e2800000: clock-names: ['rtc'] is too short
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Tested-by: Jonathan Bakker <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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The S3C RTC requires 32768 Hz clock as input which is provided by PMIC.
However there is no such clock provider but rather a regulator driver
which registers the clock as a regulator. This is an old driver which
will not be updated so add a workaround - a fixed-clock to fill missing
clock phandle reference in S3C RTC.
This fixes dtbs_check warnings:
rtc@e2800000: clocks: [[2, 145]] is too short
rtc@e2800000: clock-names: ['rtc'] is too short
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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The 'audio-subsystem' node is an artificial creation, not representing
real hardware. The hardware is described by its nodes - AUDSS clock
controller and I2S0.
Remove the 'audio-subsystem' node along with its undocumented compatible
to fix dtbs_check warnings like:
audio-subsystem: $nodename:0: 'audio-subsystem' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Tested-by: Jonathan Bakker <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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The Power Management Unit (PMU) is a separate device which has little
common with clock controller. Moving it to one level up (from clock
controller child to SoC) allows to remove fake simple-bus compatible and
dtbs_check warnings like:
clock-controller@e0100000: $nodename:0:
'clock-controller@e0100000' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Tested-by: Jonathan Bakker <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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The fixed clocks are kept under dedicated 'external-clocks' node, thus a
fake 'reg' was added. This is not correct with dtschema as fixed-clock
binding does not have a 'reg' property. Moving fixed clocks out of
'soc' to root node fixes multiple dtbs_check warnings:
external-clocks: $nodename:0: 'external-clocks' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
external-clocks: #size-cells:0:0: 0 is not one of [1, 2]
external-clocks: oscillator@0:reg:0: [0] is too short
external-clocks: oscillator@1:reg:0: [1] is too short
external-clocks: 'ranges' is a required property
oscillator@0: 'reg' does not match any of the regexes: 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Tested-by: Jonathan Bakker <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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There is no need to keep DMA controller nodes under AMBA bus node.
Remove the "amba" node to fix dtschema warnings like:
amba: $nodename:0: 'amba' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Tested-by: Jonathan Bakker <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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Fix typo in pinctrl property of "vibrator-en" fixed regulator in Aries
family of boards. The error caused lack of pin configuration for the
GPIO used in vibrator.
Fixes: 04568cb58a43 ("ARM: dts: s5pv210: Disable pull for vibrator enable GPIO on Aries boards")
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Cc: <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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GPU needs additional regulator, add it to devicetree of bpi-r2
Signed-off-by: Alex Ryabchenko <[email protected]>
Signed-off-by: Frank Wunderlich <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Matthias Brugger <[email protected]>
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Add display subsystem related device nodes for MT7623.
Signed-off-by: chunhui dai <[email protected]>
Signed-off-by: Bibby Hsieh <[email protected]>
Signed-off-by: Ryder Lee <[email protected]>
Signed-off-by: Frank Wunderlich <[email protected]>
Tested-by: Frank Wunderlich <[email protected]>
Cc: Chun-Kuang Hu <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Matthias Brugger <[email protected]>
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mt7623a has no graphics support so move nodes from generic mt7623.dtsi
to mt7623n.dtsi
Fixes: 1f6ed2245946 ("arm: dts: mt7623: add Mali-450 device node")
Suggested-by: David Woodhouse <[email protected]>
Signed-off-by: Frank Wunderlich <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Matthias Brugger <[email protected]>
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A feature was added to the aspeed vuart driver to configure the vuart
interrupt (sirq) polarity according to the LPC/eSPI strapping register.
Systems that depend on a active low behaviour (sirq_polarity set to 0)
such as OpenPower boxes also use LPC, so this relationship does not
hold. Jeremy confirms that the s2600st which is strapped for eSPI also
does not have this relationship.
The property was added for a Tyan S7106 system which is not supported
in the kernel tree. Should this or other systems wish to use this
feature of the driver they should add it to the machine specific device
tree.
Fixes: c791fc76bc72 ("arm: dts: aspeed: Add vuart aspeed,sirq-polarity-sense...")
Signed-off-by: Joel Stanley <[email protected]>
Tested-by: Jeremy Kerr <[email protected]>
Reviewed-by: Jeremy Kerr <[email protected]>
Cc: [email protected]
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Joel Stanley <[email protected]>
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Set I2C bus 7 to multi-master mode and add the panel device that will
register as a slave.
Signed-off-by: Eddie James <[email protected]>
Reviewed-by: Joel Stanley <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Joel Stanley <[email protected]>
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Set I2C bus 0 to multi-master mode and add the panel device that will
register as a slave.
Signed-off-by: Eddie James <[email protected]>
Reviewed-by: Joel Stanley <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Joel Stanley <[email protected]>
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Now that all the drivers have been adjusted for it, let's bring in the
necessary device tree changes.
The VEC and PV3 are left out for now, since it will require a more specific
clock setup.
Reviewed-by: Dave Stevenson <[email protected]>
Tested-by: Chanwoo Choi <[email protected]>
Tested-by: Hoegeun Kwon <[email protected]>
Tested-by: Stefan Wahren <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
Reviewed-by: Hoegeun Kwon <[email protected]>
Signed-off-by: Nicolas Saenz Julienne <[email protected]>
Link: https://lore.kernel.org/r/cfce2276d172d3d9c4d34d966b58fd47f77c4e46.1599120059.git-series.maxime@cerno.tech
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Add the reg property to each channel node. This update is
to accommodate the multicolor framework. In addition to the
accommodation this allows the LEDs to be placed on any channel
and allow designs to skip channels as opposed to requiring
sequential order.
Signed-off-by: Dan Murphy <[email protected]>
Acked-by: Pavel Machek <[email protected]>
Acked-by: Linus Walleij <[email protected]>
CC: Linus Walleij <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Linus Walleij <[email protected]>
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The SP805 binding sets the name for the actual watchdog clock to
"wdog_clk" (with an underscore).
Change the name in the DTs for ARM Ltd. platforms to match that. The
Linux and U-Boot driver use the *first* clock for this purpose anyway,
so it does not break anything.
For MPS2 we only specify one clock so far, but the binding requires
two clocks to be named.
In practice, Linux would pick a clock named "apb_pclk" for the bus
clock, and the Linux and U-Boot SP805 driver would use the first clock
to derive the actual watchdog counter frequency. So since currently both
are the very same clock, we can just double the clock reference, and add
the correct clock-names, to match the binding.
Link: https://lore.kernel.org/r/[email protected]
Reviewed-by: Linus Walleij <[email protected]>
Signed-off-by: Andre Przywara <[email protected]>
Signed-off-by: Sudeep Holla <[email protected]>
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The SP804 DT nodes for Realview, MPS2 and VExpress were not complying
with the binding: it requires either one or three clocks, but does not
allow exactly two clocks.
Simply duplicate the first clock to satisfy the binding requirement.
For MPS2, we triple the clock, and add the clock-names property, as this
is required by the Linux primecell driver.
Try to make the clock-names more consistent on the way.
Link: https://lore.kernel.org/r/[email protected]
Acked-by: Linus Walleij <[email protected]>
Signed-off-by: Andre Przywara <[email protected]>
Signed-off-by: Sudeep Holla <[email protected]>
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The SATA PHY in Exynos5250 SoCs has two interfaces and two device nodes:
1. sata-phy@12170000
2. i2c-9/i2c@38
The first node represents the actual SATA PHY device with phy-cells.
The second represents an additional I2C interface, needed by the driver
to communicate with the SATA PHY device. It is not a PHY-provider in
the terms of dtschema so rename it to silence dtbs_check warning:
arch/arm/boot/dts/exynos5250-arndale.dt.yaml: sata-phy@38: '#phy-cells' is a required property
From schema: lib/python3.6/site-packages/dtschema/schemas/phy/phy-provider.yaml
This second device node is also a property of SoC, not a board so move
it there.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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The property samsung,i2c-slave-addr in I2C9 controller on Exynos5250
Arndale and SMDK5250 boards, is not actually needed. There is only one
master on this bus. It's not clear why this property was added at first
place.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Tested-by: Marek Szyprowski <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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The purpose of those assigned-clock-* properties is to configure clock for
for the I2S device so move them to respective node.
This suppresses the dtbs_check warning:
arch/arm/boot/dts/exynos5422-odroidxu3.dt.yaml: sound: 'clocks' is a dependency of 'assigned-clocks'
Reported-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Sylwester Nawrocki <[email protected]>
Signed-off-by: Krzysztof Kozlowski <[email protected]>
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Device tree schema expects NAND controller to be named
"nand-controller", otherwise dtbs_check complain with a warning like:
arch/arm/boot/dts/imx28-eukrea-mbmx283lc.dt.yaml: gpmi-nand@8000c000:
$nodename:0: 'gpmi-nand@8000c000' does not match '^nand-controller(@.*)?'
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Like the other i-MX devices the i.MX6 family can output the enet tx
clock on the pad to feed the connected device. Add the missing clk here
to avoid local fixups like: arch/arm/boot/dts/imx6qdl-tx6.dtsi.
Signed-off-by: Marco Felsch <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The common imx6qdl.dtsi already defines the iomuxc phandle. Make use of
it in the imx6dl.dtsi and imx6q.dtsi.
Signed-off-by: Marco Felsch <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The PCA95xx GPIO expander requires GPIO controller properties to operate
properly.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The pad QSPI1B_SCLK mux mode 0x1 is for function UART3_DTE_TX,
correct the mux mode.
Fixes: 743636f25f1d ("ARM: dts: imx: add pin function header for imx6sx")
Signed-off-by: Fugang Duan <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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This adds a devicetree for the Tolino Shine 2 HD Ebook reader. It is based
on boards marked with "37NB-E60QF0+4A2". It is equipped with an i.MX6SL
SoC.
Expected to work:
- Buttons
- Wifi
- Touchscreen
- LED
- uSD
- USB
- RTC
Not working due to missing drivers:
- Backlight (requires NTXEC driver)
- EPD
Not working due to unknown reasons:
- deep sleep (echo standby >/sys/power/state works),
wakeup fails when imx_gpc_pre_suspend(true) was called.
Signed-off-by: Andreas Kemnade <[email protected]>
Reviewed-by: Jonathan Neuschäfer <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add the five IPMMU instances found in the r8a7742 to DT with a disabled
status.
Signed-off-by: Lad Prabhakar <[email protected]>
Reviewed-by: Chris Paterson <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Joerg Roedel <[email protected]>
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Use the 32 kHz clock from S2MPS11 PMIC in the S3C RTC node. Except
making the S3C RTC working, this also fixes dtbs_check warnings:
arch/arm/boot/dts/exynos5420-smdk5420.dt.yaml: rtc@101e0000: clocks: [[2, 317]] is too short
arch/arm/boot/dts/exynos5420-smdk5420.dt.yaml: rtc@101e0000: clock-names: ['rtc'] is too short
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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Enable PCIe Controller and set PCIe bus clock frequency.
Signed-off-by: Lad Prabhakar <[email protected]>
Reviewed-by: Chris Paterson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Geert Uytterhoeven <[email protected]>
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Add the five IPMMU instances found in the r8a7742 to DT with a disabled
status.
Signed-off-by: Lad Prabhakar <[email protected]>
Reviewed-by: Chris Paterson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Geert Uytterhoeven <[email protected]>
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The pin configuration of Display Port HPD GPIO emds with '-gpio' which
confuses dtschema:
arch/arm/boot/dts/exynos5250-spring.dt.yaml: pinctrl@11400000: dp-hpd-gpio:
{'samsung,pins': ['gpc3-0'], ... 'samsung,pin-drv': [[0]], 'phandle': [[23]]} is not of type 'array'
From schema: lib/python3.6/site-packages/dtschema/schemas/gpio/gpio-consumer.yaml
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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Use the 32 kHz clock from S5M8767 PMIC in the S3C RTC node. Except
making the S3C RTC working, this also fixes dtbs_check warnings:
arch/arm/boot/dts/exynos5250-spring.dt.yaml: rtc@101e0000: clocks: [[2, 337]] is too short
arch/arm/boot/dts/exynos5250-spring.dt.yaml: rtc@101e0000: clock-names: ['rtc'] is too short
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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Add clock-cells to max77686 PMIC node so its 32 kHz clocks could be used
later in the S3C RTC node. Except making the S3C RTC working, this also
fixes dtbs_check warnings:
arch/arm/boot/dts/exynos5250-smdk5250.dt.yaml: rtc@101e0000: clocks: [[2, 337]] is too short
arch/arm/boot/dts/exynos5250-smdk5250.dt.yaml: rtc@101e0000: clock-names: ['rtc'] is too short
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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Using full paths to extend or override a device tree node is error prone
since if there was a typo error, a new node will be created instead of
extending the node as it was desired. This will lead to run-time errors
that could be hard to detect.
A mistyped label on the other hand, will cause a dtc compile error
(during build time).
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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Remove double space after '=' and fix indentation in Exynos5250,
Exynos5410 and Exynos5420 DTS files.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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The name of I2C controller over GPIO lines node ends with '-gpio' which
confuses dtschema:
arch/arm/boot/dts/exynos5250-arndale.dt.yaml: soc: i2c-gpio:
{'pinctrl-names': ['default'], ... 'phandle': [[65]]} is not of type 'array'
From schema: lib/python3.6/site-packages/dtschema/schemas/gpio/gpio-consumer.yaml
Add a '-10' (there are already 0-9 I2C controllers on the SoC) suffix to
silence it. This pattern on naming i2c-gpio is already present in many
other dts. No functional change.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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The S3C RTC requires 32768 Hz clock as input which is provided by PMIC.
However the PMIC is not described in DTS at all so at least add
a workaround to model its clock with a fixed-clock. This fixes S3C RTC
and silences dtbs_check warnings like:
arch/arm/boot/dts/exynos5410-smdk5410.dt.yaml: rtc@101e0000: clocks: [[5, 317]] is too short
arch/arm/boot/dts/exynos5410-smdk5410.dt.yaml: rtc@101e0000: clock-names: ['rtc'] is too short
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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The Exynos5260 GIC node does not have any children so remove the address
and size cells as they are not needed by DT bindings. The size-cells of
'0' were also incorrect. This fixes dtbs_check warning:
arch/arm/boot/dts/exynos5260-xyref5260.dt.yaml: interrupt-controller@10481000: #size-cells:0:0: 1 was expected
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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Exynos5260 SoCs have ARM GIC 400. Correct the compatibles to match
dtschema and fix the dtbs_check warnings like:
arch/arm/boot/dts/exynos5260-xyref5260.dt.yaml: interrupt-controller@10481000:
compatible: ['arm,cortex-a15-gic', 'arm,cortex-a9-gic'] is not valid under any of the given schemas
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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Exynos5250 and Exynso54xx SoCs have ARM GIC 400. Correct the
compatibles to match dtschema and fix the dtbs_check warnings like:
arch/arm/boot/dts/exynos5420-peach-pit.dt.yaml: interrupt-controller@10481000:
compatible: ['arm,gic-400', 'arm,cortex-a15-gic', 'arm,cortex-a9-gic']
is not valid under any of the given schemas
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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We don't want to depend on the linker's orphan section placement
heuristics as these can vary between linkers, and may change between
versions. All sections need to be explicitly handled in the linker script.
With all sections now handled, enable orphan section warning.
Signed-off-by: Kees Cook <[email protected]>
Signed-off-by: Ingo Molnar <[email protected]>
Reviewed-by: Nick Desaulniers <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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The ranges, #address-cells and #size-cells properties are mandatory, add
them to the sram nodes.
Signed-off-by: Alexandre Belloni <[email protected]>
Reviewed-by: Nicolas Ferre <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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The reg property is mandatory for cpu nodes, also fix the #address-cells of
the cpus node that has to be at least 1.
Signed-off-by: Alexandre Belloni <[email protected]>
Reviewed-by: Nicolas Ferre <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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