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2020-09-10ARM: dts: Cygnus: Fix SP805 clocksAndre Przywara1-2/+2
The SP805 DT binding requires two clocks to be specified, but the Broadcom Cygnus DT currently only specifies one clock. In practice, Linux would pick a clock named "apb_pclk" for the bus clock, and the Linux and U-Boot SP805 driver would use the first clock to derive the actual watchdog counter frequency. Since currently both are the very same clock, we can just double the clock reference, and add the correct clock-names, to match the binding. Signed-off-by: Andre Przywara <[email protected]> Reviewed-by: Ray Jui <[email protected]> Acked-by: Florian Fainelli <[email protected]> Signed-off-by: Florian Fainelli <[email protected]>
2020-09-10ARM: dts: NSP: replace status value "ok" by "okay"Adrian Schmutzler2-2/+2
While the DT parser recognizes "ok" as a valid value for the "status" property, it is actually mentioned nowhere. Use the proper value "okay" instead, as done in the majority of files already. Signed-off-by: Adrian Schmutzler <[email protected]> Signed-off-by: Florian Fainelli <[email protected]>
2020-09-10ARM: BCM5301X: Add DT for Meraki MR32Christian Lamparter2-0/+198
add support for the Cisco Meraki MR32. This is a dual-band enterprise class 802.11ac access point. The unit was donated by Chris Blake. Thank you! SoC: Broadcom BCM53016A1 (1 GHz, 2 cores) RAM: 128 MiB NAND: 128 MiB Spansion S34ML01G2 (~114 MiB useable) ETH: 1GBit Ethernet Port - PoE WIFI1: Broadcom BCM43520 an+ac (2x2:2 - id: 0x4352) WIFI2: Broadcom BCM43520 bgn (2x2:2 - id: 0x4352) WIFI3: Broadcom BCM43428 abgn (1x1:1 - id: 43428) BLE: Broadcom BCM20732 (ttyS1) LEDS: 1 x Programmable RGB Status LED (driven by a PWM) 1 x White LED (GPIO) 1 x Orange LED Fault Indicator (GPIO) 2 x LAN Activity / Speed LEDs (On the RJ45 Port) BUTTON: one Reset button MISC: AT24C64 8KiB EEPROM (i2c - stores Ethernet MAC) ina219 hardware monitor (i2c) Kensington Lock SERIAL: WARNING: The serial port needs a TTL/RS-232 3V3 level converter! The Serial setting is 115200-8-N-1. The board has a populated right angle 1x4 0.1" pinheader. The pinout is: VCC, RX, TX, GND. Odd stuff: - uart0 clock frequency is 62.5 MHz. - The LEDs are labeled as SYS-LED1 through SYS-LED3 because of the silkscreen on the PCB. - the original u-boot has been compiled with most functions and commands disabled. The u-boot env isn't setup properly either and as a result, the bcm47xxpart probing is not working. Hence, the nand partitions are specified through a "fixed-partition" binding. - The "WICED SMART(TM)" Bluetooth LE 4.0 BCM20732 chip is connected to uart2 of the SoC. The BCM20732 does not provide a HCI. So the linux' bluetooth stack is useless. The mock-up node with the compatible binding and enable-gpios property is provided solely as documentation. Signed-off-by: Christian Lamparter <[email protected]> Signed-off-by: Florian Fainelli <[email protected]>
2020-09-10net: dsa: microchip: look for phy-mode in port nodesHelmut Grohne1-1/+1
Documentation/devicetree/bindings/net/dsa/dsa.txt says that the phy-mode property should be specified on port nodes. However, the microchip drivers read it from the switch node. Let the driver use the per-port property and fall back to the old location with a warning. Fix in-tree users. Signed-off-by: Helmut Grohne <[email protected]> Link: https://lore.kernel.org/netdev/20200617082235.GA1523@laureti-dev/ Acked-by: Alexandre Belloni <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2020-09-10ARM: dts: r8a7742-iwg21d-q7: Enable SD2 LED indicationLad Prabhakar1-0/+10
Add support for LED trigger on SD2 interface. Signed-off-by: Lad Prabhakar <[email protected]> Reviewed-by: Chris Paterson <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Geert Uytterhoeven <[email protected]>
2020-09-10ARM: dts: r8a7742-iwg21d-q7: Add can1 support to carrier boardLad Prabhakar1-0/+21
This patch enables CAN1 interface exposed through connector J20 on the carrier board. Signed-off-by: Lad Prabhakar <[email protected]> Reviewed-by: Chris Paterson <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Geert Uytterhoeven <[email protected]>
2020-09-10ARM: dts: r8a7742-iwg21d-q7: Add SPI NOR supportLad Prabhakar1-0/+31
Add support for the SPI NOR device which is connected to MSIOF0 interface on the iWave RainboW-G21d-q7 board. Signed-off-by: Lad Prabhakar <[email protected]> Reviewed-by: Chris Paterson <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Geert Uytterhoeven <[email protected]>
2020-09-10ARM: dts: r8a7742: Add VIN DT nodesLad Prabhakar1-0/+44
Add VIN[0123] instances found in the r8a7742 SoC. Signed-off-by: Lad Prabhakar <[email protected]> Reviewed-by: Biju Das <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Geert Uytterhoeven <[email protected]>
2020-09-10ARM: dts: dra7: drop legacy cpsw dt nodeGrygorii Strashko2-56/+2
All dra7/am57 boards converted to use new driver, so drop legacy cpsw dt node. Signed-off-by: Grygorii Strashko <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2020-09-10ARM: dts: am57xx-cl-som-am57x: switch to new cpsw switch drvGrygorii Strashko1-7/+6
Switch CompuLab CL-SOM-AM57x board to use new cpsw switch driver. Those board configured in dual_mac mode by default. Hence, dual_mac mode has been preserved the same way between legacy and new driver it's safe to switch drivers. Signed-off-by: Grygorii Strashko <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2020-09-10ARM: dts: dra7x-evm: switch to new cpsw switch drvGrygorii Strashko6-37/+35
Switch all TI DRA7x boards to use new cpsw switch driver. Those boards configured in dual_mac mode by default. Hence, dual_mac mode has been preserved the same way between legacy and new driver it's safe to switch drivers. Signed-off-by: Grygorii Strashko <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2020-09-10ARM: dts: beagle-x15: switch to new cpsw switch drvGrygorii Strashko1-7/+6
Switch all TI AM5728 BeagleBoard-X15 boards to use new cpsw switch driver. Those boards have 2 Ext. port wired and configured in dual_mac mode by default. Hence, dual_mac mode has been preserved the same way between legacy and new driver it's safe to switch drivers. Signed-off-by: Grygorii Strashko <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2020-09-10ARM: dts: am57xx-idk: switch to new cpsw switch drvGrygorii Strashko4-42/+9
Switch all am571/2/4-idk boards to use new cpsw switch driver. Those boards have 2 Ext. port wired and configured in dual_mac mode by default. Hence, dual_mac mode has been preserved the same way between legacy and new driver it's safe to switch drivers. Signed-off-by: Grygorii Strashko <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2020-09-10ARM: dts: am5729: beagleboneai: switch to new cpsw switch drvGrygorii Strashko1-5/+9
Switch BeagleBone AI to use new cpsw switch driver. It has one Ext. port only and fits dual_mac mode with no issues. Signed-off-by: Grygorii Strashko <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2020-09-10ARM: dts: am43xx: replace status value "ok" by "okay"Adrian Schmutzler3-3/+3
While the DT parser recognizes "ok" as a valid value for the "status" property, it is actually mentioned nowhere. Use the proper value "okay" instead, as done in the majority of files already. Signed-off-by: Adrian Schmutzler <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2020-09-10ARM: dts: dra7xx: replace status value "ok" by "okay"Adrian Schmutzler5-11/+11
While the DT parser recognizes "ok" as a valid value for the "status" property, it is actually mentioned nowhere. Use the proper value "okay" instead, as done in the majority of files already. Signed-off-by: Adrian Schmutzler <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2020-09-10ARM: dts: omap: replace status value "ok" by "okay"Adrian Schmutzler29-51/+51
While the DT parser recognizes "ok" as a valid value for the "status" property, it is actually mentioned nowhere. Use the proper value "okay" instead, as done in the majority of files already. Signed-off-by: Adrian Schmutzler <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2020-09-10ARM: dts: n9, n950: Remove nokia,nvm-size propertySakari Ailus2-2/+0
Remove nokia,nvm-size property as it is no longer needed. The driver can nowadays figure out the size so do not specify it in DT. Signed-off-by: Sakari Ailus <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2020-09-10ARM: dts: rainier: Disable internal pull-downs on eMMC pinsAndrew Jeffery1-0/+4
There's a veritable tug-of-war going on in the design, so disable one of the warring parties. Signed-off-by: Andrew Jeffery <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Joel Stanley <[email protected]>
2020-09-09ARM: dts: BCM5301X: Fixed QSPI compatible stringFlorian Fainelli1-1/+1
The string was incorrectly defined before from least to most specific, swap the compatible strings accordingly. Fixes: 1c8f40650723 ("ARM: dts: BCM5301X: convert to iProc QSPI") Signed-off-by: Florian Fainelli <[email protected]>
2020-09-09ARM: dts: NSP: Fixed QSPI compatible stringFlorian Fainelli1-1/+1
The string was incorrectly defined before from least to most specific, swap the compatible strings accordingly. Fixes: 329f98c1974e ("ARM: dts: NSP: Add QSPI nodes to NSPI and bcm958625k DTSes") Signed-off-by: Florian Fainelli <[email protected]>
2020-09-09ARM: dts: bcm: HR2: Fixed QSPI compatible stringFlorian Fainelli1-1/+1
The string was incorrectly defined before from least to most specific, swap the compatible strings accordingly. Fixes: b9099ec754b5 ("ARM: dts: Add Broadcom Hurricane 2 DTS include file") Signed-off-by: Florian Fainelli <[email protected]>
2020-09-09ARM: dts: s5pv210: align SPI GPIO node name with dtschema in AriesKrzysztof Kozlowski1-1/+1
The device tree schema expects SPI controller to be named "spi", otherwise dtbs_check complain with a warning like: spi-gpio-0: $nodename:0: 'spi-gpio-0' does not match '^spi(@.*|-[0-9a-f])*$' Signed-off-by: Krzysztof Kozlowski <[email protected]> Tested-by: Jonathan Bakker <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-09-09ARM: dts: s5pv210: use defines for IRQ flags in GoniKrzysztof Kozlowski1-1/+2
Replace hard-coded flags with defines for readability. No functional change. Signed-off-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-09-09ARM: dts: s5pv210: use defines for IRQ flags in SMDKV210Krzysztof Kozlowski1-1/+2
Replace hard-coded flags with defines for readability. No functional change. Signed-off-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-09-09ARM: dts: s5pv210: use defines for GPIO flags in GoniKrzysztof Kozlowski1-9/+10
Replace hard-coded flags with defines for readability. No functional change. Signed-off-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-09-09ARM: dts: s5pv210: use defines for GPIO flags in AquilaKrzysztof Kozlowski1-6/+7
Replace hard-coded flags with defines for readability. No functional change. Signed-off-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-09-09ARM: dts: s5pv210: add RTC 32 KHz clock in TorbreckKrzysztof Kozlowski1-0/+9
The S3C RTC requires 32768 Hz clock as input which is provided by PMIC. However the PMIC is not described in DTS at all so at least add a workaround to model its clock with a fixed-clock. This fixes dtbs_check warnings: rtc@e2800000: clocks: [[2, 145]] is too short rtc@e2800000: clock-names: ['rtc'] is too short Signed-off-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-09-09ARM: dts: s5pv210: add RTC 32 KHz clock in SMDKV210Krzysztof Kozlowski1-0/+9
The S3C RTC requires 32768 Hz clock as input which is provided by PMIC. However the PMIC is not described in DTS at all so at least add a workaround to model its clock with a fixed-clock. This fixes dtbs_check warnings: rtc@e2800000: clocks: [[2, 145]] is too short rtc@e2800000: clock-names: ['rtc'] is too short Signed-off-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-09-09ARM: dts: s5pv210: add RTC 32 KHz clock in SMDKC110Krzysztof Kozlowski1-0/+9
The S3C RTC requires 32768 Hz clock as input which is provided by PMIC. However the PMIC is not described in DTS at all so at least add a workaround to model its clock with a fixed-clock. This fixes dtbs_check warnings: rtc@e2800000: clocks: [[2, 145]] is too short rtc@e2800000: clock-names: ['rtc'] is too short Signed-off-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-09-09ARM: dts: s5pv210: add RTC 32 KHz clock in GoniKrzysztof Kozlowski1-0/+17
The S3C RTC requires 32768 Hz clock as input which is provided by PMIC. However there is no such clock provider but rather a regulator driver which registers the clock as a regulator. This is an old driver which will not be updated so add a workaround - a fixed-clock to fill missing clock phandle reference in S3C RTC. This fixes dtbs_check warnings: rtc@e2800000: clocks: [[2, 145]] is too short rtc@e2800000: clock-names: ['rtc'] is too short Signed-off-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-09-09ARM: dts: s5pv210: add RTC 32 KHz clock in Aries familyKrzysztof Kozlowski1-0/+12
The S3C RTC requires 32768 Hz clock as input which is provided by PMIC. However there is no such clock provider but rather a regulator driver which registers the clock as a regulator. This is an old driver which will not be updated so add a workaround - a fixed-clock to fill missing clock phandle reference in S3C RTC. This fixes dtbs_check warnings: rtc@e2800000: clocks: [[2, 145]] is too short rtc@e2800000: clock-names: ['rtc'] is too short Signed-off-by: Krzysztof Kozlowski <[email protected]> Tested-by: Jonathan Bakker <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-09-09ARM: dts: s5pv210: add RTC 32 KHz clock in AquillaKrzysztof Kozlowski1-0/+17
The S3C RTC requires 32768 Hz clock as input which is provided by PMIC. However there is no such clock provider but rather a regulator driver which registers the clock as a regulator. This is an old driver which will not be updated so add a workaround - a fixed-clock to fill missing clock phandle reference in S3C RTC. This fixes dtbs_check warnings: rtc@e2800000: clocks: [[2, 145]] is too short rtc@e2800000: clock-names: ['rtc'] is too short Signed-off-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-09-09ARM: dts: s5pv210: remove dedicated 'audio-subsystem' nodeKrzysztof Kozlowski1-36/+29
The 'audio-subsystem' node is an artificial creation, not representing real hardware. The hardware is described by its nodes - AUDSS clock controller and I2S0. Remove the 'audio-subsystem' node along with its undocumented compatible to fix dtbs_check warnings like: audio-subsystem: $nodename:0: 'audio-subsystem' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$' Signed-off-by: Krzysztof Kozlowski <[email protected]> Tested-by: Jonathan Bakker <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-09-09ARM: dts: s5pv210: move PMU node out of clock controllerKrzysztof Kozlowski1-8/+5
The Power Management Unit (PMU) is a separate device which has little common with clock controller. Moving it to one level up (from clock controller child to SoC) allows to remove fake simple-bus compatible and dtbs_check warnings like: clock-controller@e0100000: $nodename:0: 'clock-controller@e0100000' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$' Signed-off-by: Krzysztof Kozlowski <[email protected]> Tested-by: Jonathan Bakker <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-09-09ARM: dts: s5pv210: move fixed clocks under root nodeKrzysztof Kozlowski1-22/+14
The fixed clocks are kept under dedicated 'external-clocks' node, thus a fake 'reg' was added. This is not correct with dtschema as fixed-clock binding does not have a 'reg' property. Moving fixed clocks out of 'soc' to root node fixes multiple dtbs_check warnings: external-clocks: $nodename:0: 'external-clocks' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$' external-clocks: #size-cells:0:0: 0 is not one of [1, 2] external-clocks: oscillator@0:reg:0: [0] is too short external-clocks: oscillator@1:reg:0: [1] is too short external-clocks: 'ranges' is a required property oscillator@0: 'reg' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <[email protected]> Tested-by: Jonathan Bakker <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-09-09ARM: dts: s5pv210: remove DMA controller bus node name to fix dtschema warningsKrzysztof Kozlowski1-28/+21
There is no need to keep DMA controller nodes under AMBA bus node. Remove the "amba" node to fix dtschema warnings like: amba: $nodename:0: 'amba' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$' Signed-off-by: Krzysztof Kozlowski <[email protected]> Tested-by: Jonathan Bakker <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-09-09ARM: dts: s5pv210: fix pinctrl property of "vibrator-en" regulator in AriesKrzysztof Kozlowski1-1/+1
Fix typo in pinctrl property of "vibrator-en" fixed regulator in Aries family of boards. The error caused lack of pin configuration for the GPIO used in vibrator. Fixes: 04568cb58a43 ("ARM: dts: s5pv210: Disable pull for vibrator enable GPIO on Aries boards") Signed-off-by: Krzysztof Kozlowski <[email protected]> Cc: <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-09-09arm: dts: mt7623: add lima related regulatorAlex Ryabchenko1-1/+12
GPU needs additional regulator, add it to devicetree of bpi-r2 Signed-off-by: Alex Ryabchenko <[email protected]> Signed-off-by: Frank Wunderlich <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Matthias Brugger <[email protected]>
2020-09-09arm: dts: mt7623: add display subsystem related device nodesRyder Lee3-0/+316
Add display subsystem related device nodes for MT7623. Signed-off-by: chunhui dai <[email protected]> Signed-off-by: Bibby Hsieh <[email protected]> Signed-off-by: Ryder Lee <[email protected]> Signed-off-by: Frank Wunderlich <[email protected]> Tested-by: Frank Wunderlich <[email protected]> Cc: Chun-Kuang Hu <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Matthias Brugger <[email protected]>
2020-09-09arm: dts: mt7623: move display nodes to separate mt7623n.dtsiFrank Wunderlich4-125/+136
mt7623a has no graphics support so move nodes from generic mt7623.dtsi to mt7623n.dtsi Fixes: 1f6ed2245946 ("arm: dts: mt7623: add Mali-450 device node") Suggested-by: David Woodhouse <[email protected]> Signed-off-by: Frank Wunderlich <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Matthias Brugger <[email protected]>
2020-09-09ARM: aspeed: g5: Do not set sirq polarityJoel Stanley1-1/+0
A feature was added to the aspeed vuart driver to configure the vuart interrupt (sirq) polarity according to the LPC/eSPI strapping register. Systems that depend on a active low behaviour (sirq_polarity set to 0) such as OpenPower boxes also use LPC, so this relationship does not hold. Jeremy confirms that the s2600st which is strapped for eSPI also does not have this relationship. The property was added for a Tyan S7106 system which is not supported in the kernel tree. Should this or other systems wish to use this feature of the driver they should add it to the machine specific device tree. Fixes: c791fc76bc72 ("arm: dts: aspeed: Add vuart aspeed,sirq-polarity-sense...") Signed-off-by: Joel Stanley <[email protected]> Tested-by: Jeremy Kerr <[email protected]> Reviewed-by: Jeremy Kerr <[email protected]> Cc: [email protected] Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Joel Stanley <[email protected]>
2020-09-09ARM: dts: aspeed: rainier: Add IBM Operation Panel I2C deviceEddie James1-0/+7
Set I2C bus 7 to multi-master mode and add the panel device that will register as a slave. Signed-off-by: Eddie James <[email protected]> Reviewed-by: Joel Stanley <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Joel Stanley <[email protected]>
2020-09-09ARM: dts: aspeed: tacoma: Add IBM Operation Panel I2C deviceEddie James1-0/+7
Set I2C bus 0 to multi-master mode and add the panel device that will register as a slave. Signed-off-by: Eddie James <[email protected]> Reviewed-by: Joel Stanley <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Joel Stanley <[email protected]>
2020-09-08ARM: dts: bcm2711: Enable the display pipelineMaxime Ripard2-1/+169
Now that all the drivers have been adjusted for it, let's bring in the necessary device tree changes. The VEC and PV3 are left out for now, since it will require a more specific clock setup. Reviewed-by: Dave Stevenson <[email protected]> Tested-by: Chanwoo Choi <[email protected]> Tested-by: Hoegeun Kwon <[email protected]> Tested-by: Stefan Wahren <[email protected]> Signed-off-by: Maxime Ripard <[email protected]> Reviewed-by: Hoegeun Kwon <[email protected]> Signed-off-by: Nicolas Saenz Julienne <[email protected]> Link: https://lore.kernel.org/r/cfce2276d172d3d9c4d34d966b58fd47f77c4e46.1599120059.git-series.maxime@cerno.tech
2020-09-07ARM: dts: ste-href: Add reg property to the LP5521 channel nodesDan Murphy1-6/+16
Add the reg property to each channel node. This update is to accommodate the multicolor framework. In addition to the accommodation this allows the LEDs to be placed on any channel and allow designs to skip channels as opposed to requiring sequential order. Signed-off-by: Dan Murphy <[email protected]> Acked-by: Pavel Machek <[email protected]> Acked-by: Linus Walleij <[email protected]> CC: Linus Walleij <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Linus Walleij <[email protected]>
2020-09-07ARM: dts: arm: Fix SP805 clocksAndre Przywara9-13/+13
The SP805 binding sets the name for the actual watchdog clock to "wdog_clk" (with an underscore). Change the name in the DTs for ARM Ltd. platforms to match that. The Linux and U-Boot driver use the *first* clock for this purpose anyway, so it does not break anything. For MPS2 we only specify one clock so far, but the binding requires two clocks to be named. In practice, Linux would pick a clock named "apb_pclk" for the bus clock, and the Linux and U-Boot SP805 driver would use the first clock to derive the actual watchdog counter frequency. So since currently both are the very same clock, we can just double the clock reference, and add the correct clock-names, to match the binding. Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Linus Walleij <[email protected]> Signed-off-by: Andre Przywara <[email protected]> Signed-off-by: Sudeep Holla <[email protected]>
2020-09-07ARM: dts: arm: Fix SP804 usersAndre Przywara3-12/+14
The SP804 DT nodes for Realview, MPS2 and VExpress were not complying with the binding: it requires either one or three clocks, but does not allow exactly two clocks. Simply duplicate the first clock to satisfy the binding requirement. For MPS2, we triple the clock, and add the clock-names property, as this is required by the Linux primecell driver. Try to make the clock-names more consistent on the way. Link: https://lore.kernel.org/r/[email protected] Acked-by: Linus Walleij <[email protected]> Signed-off-by: Andre Przywara <[email protected]> Signed-off-by: Sudeep Holla <[email protected]>
2020-09-06ARM: dts: exynos: Silence SATA PHY warning in Exynos5250Krzysztof Kozlowski3-10/+14
The SATA PHY in Exynos5250 SoCs has two interfaces and two device nodes: 1. sata-phy@12170000 2. i2c-9/i2c@38 The first node represents the actual SATA PHY device with phy-cells. The second represents an additional I2C interface, needed by the driver to communicate with the SATA PHY device. It is not a PHY-provider in the terms of dtschema so rename it to silence dtbs_check warning: arch/arm/boot/dts/exynos5250-arndale.dt.yaml: sata-phy@38: '#phy-cells' is a required property From schema: lib/python3.6/site-packages/dtschema/schemas/phy/phy-provider.yaml This second device node is also a property of SoC, not a board so move it there. Signed-off-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-09-06ARM: dts: exynos: Remove I2C9 samsung, i2c-slave-addr from Exynos5250 boardsKrzysztof Kozlowski2-2/+0
The property samsung,i2c-slave-addr in I2C9 controller on Exynos5250 Arndale and SMDK5250 boards, is not actually needed. There is only one master on this bus. It's not clear why this property was added at first place. Signed-off-by: Krzysztof Kozlowski <[email protected]> Tested-by: Marek Szyprowski <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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