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2020-09-25ARM: dts: am3874: iceboard: fix GPIO expander reset GPIOsKrzysztof Kozlowski1-4/+4
Correct the property for reset GPIOs of the GPIO expander. Signed-off-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2020-09-25ARM: dts: am335x: t335: align GPIO hog names with dtschemaKrzysztof Kozlowski1-2/+2
The convention for node names is to use hyphens, not underscores. dtschema for pca95xx expects GPIO hogs to end with 'hog' prefix. Signed-off-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2020-09-25ARM: dts: am335x: lxm: fix PCA9539 GPIO expander propertiesKrzysztof Kozlowski1-0/+4
The PCA9539 GPIO expander requires GPIO controller properties to operate properly. Signed-off-by: Krzysztof Kozlowski <[email protected]> Acked-by: Tony Lindgren <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2020-09-25ARM: dts: am437x-l4: drop legacy cpsw dt nodeGrygorii Strashko1-51/+0
All am437x boards have been converted to use new driver, so drop legacy cpsw dt node. Signed-off-by: Grygorii Strashko <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2020-09-25ARM: dts: am437x: switch to new cpsw switch drvGrygorii Strashko6-33/+38
The dual_mac mode has been preserved the same way between legacy and new driver, and one port devices works the same as 1 dual_mac port - it's safe to switch drivers. So, Switch all am437x boards to use new cpsw switch driver. Those boards have or 2 Ext. port wired and configured in dual_mac mode by default, or only 1 Ext. port. Signed-off-by: Grygorii Strashko <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2020-09-25ARM: dts: am437x-l4: add dt node for new cpsw switchdev driverGrygorii Strashko1-0/+54
Add DT node for the new cpsw switchdev based driver. Signed-off-by: Grygorii Strashko <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2020-09-25ARM: dts: iwg20d-q7-common: Fix touch controller probe failureBiju Das1-1/+14
As per the iWave RZ/G1M schematic, the signal LVDS_PPEN controls the supply voltage for the touch panel, LVDS receiver and RGB LCD panel. Add a regulator for these device nodes and remove the powerdown-gpios property from the lvds-receiver node as it results in a touch controller driver probe failure. Fixes: 6f89dd9e9325 ("ARM: dts: iwg20d-q7-common: Add LCD support") Signed-off-by: Biju Das <[email protected]> Reviewed-by: Laurent Pinchart <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Geert Uytterhoeven <[email protected]>
2020-09-25ARM: dts: aspeed: Add silicon id nodeJoel Stanley3-0/+15
This register describes the silicon id and chip unique id. It varies between CPU revisions, but is always part of the SCU. Reviewed-by: Andrew Jeffery <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Joel Stanley <[email protected]>
2020-09-24ARM: dts: at91: sam9x60ek: enable usb deviceCristian Birsan2-0/+27
Enable usb device for sam9x60ek board. Signed-off-by: Cristian Birsan <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2020-09-23ARM: dts: stm32: add arm-pmu node on stm32mp15Alexandre Torgue2-0/+13
Add arm-pmu node on stm32mp15. Signed-off-by: Alexandre Torgue <[email protected]> Signed-off-by: Marek Vasut <[email protected]> # update to linux-next Tested-by: Marek Vasut <[email protected]> # on DH PDK2 and Avenger96 Signed-off-by: Alexandre Torgue <[email protected]>
2020-09-23ARM: dts: stm32: add FMC2 EBI support for stm32mp157cChristophe Kerello2-21/+38
This patch adds FMC2 External Bus Interface support on stm32mp157c. Signed-off-by: Christophe Kerello <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2020-09-23ARM: dts: stm32: lxa-mc1: enable DDR50 mode on eMMCAhmad Fatoum1-0/+1
The "eMMC high-speed DDR mode (3.3V I/O)" at 50MHz is supported on the eMMC-interface of the lxa-mc1. Set it in the device tree to benefit from the speed improvement. Signed-off-by: Ahmad Fatoum <[email protected]> Signed-off-by: Holger Assmann <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2020-09-23ARM: dts: stm32: Fix DH PDK2 display PWM channelMarek Vasut1-1/+1
The display PWM channel is number 3 (PWM2 CH4), make it so. Fixes: 34e0c7847dcf ("ARM: dts: stm32: Add DH Electronics DHCOM STM32MP1 SoM and PDK2 board") Signed-off-by: Marek Vasut <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Cc: Patrice Chotard <[email protected]> Cc: Patrick Delaunay <[email protected]> Cc: [email protected] To: [email protected] Signed-off-by: Alexandre Torgue <[email protected]>
2020-09-23ARM: dts: stm32: Enable RTS/CTS for DH AV96 UART7Marek Vasut1-0/+1
The DH AV96 has RTS/CTS lines available on UART7, describe them in DT. Signed-off-by: Marek Vasut <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Cc: Patrice Chotard <[email protected]> Cc: Patrick Delaunay <[email protected]> Cc: [email protected] To: [email protected] Signed-off-by: Alexandre Torgue <[email protected]>
2020-09-23ARM: dts: stm32: Swap PHY reset GPIO and TSC2004 IRQ on DHCOM SOMMarek Vasut1-2/+2
On the production revision of the SoM, 587-200, the PHY reset GPIO and touchscreen IRQs are swapped to prevent collision between EXTi IRQs, reflect that in DT. Fixes: 34e0c7847dcf ("ARM: dts: stm32: Add DH Electronics DHCOM STM32MP1 SoM and PDK2 board") Signed-off-by: Marek Vasut <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Cc: Patrice Chotard <[email protected]> Cc: Patrick Delaunay <[email protected]> Cc: [email protected] To: [email protected] Signed-off-by: Alexandre Torgue <[email protected]>
2020-09-23ARM: dts: stm32: use stm32h7 usart compatible string for stm32h743Tobias Schramm1-2/+2
Previously the FIFO on the stm32h743 usart was not utilized, because the stm32f7 compatible configures it without FIFO support. Signed-off-by: Tobias Schramm <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2020-09-23ARM: dts: stm32: add resets property to spi device nodes on stm32h743Tobias Schramm1-0/+6
The stm32 spi driver tries to determine the fifo size of spi devices dynamically. However, if the spi was already configured by the bootloader the fifo size check can become an endless loop, because the driver expects the spi to be in its initial "after device reset" state. The driver does already support resetting the spi device at probe, thus this patch adds only the required device tree properties Signed-off-by: Tobias Schramm <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2020-09-23ARM: dts: stm32: add display controller node to stm32h743Tobias Schramm1-0/+10
Declare LTDC (display controller) on stm32h743. Signed-off-by: Tobias Schramm <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2020-09-23ARM: dts: stm32: Enable RTS/CTS for DH PDK2 UART8Marek Vasut1-1/+2
The DH PDK2 has RTS/CTS lines available on UART8, describe them in DT. Signed-off-by: Marek Vasut <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Cc: Patrice Chotard <[email protected]> Cc: Patrick Delaunay <[email protected]> Cc: [email protected] To: [email protected] Signed-off-by: Alexandre Torgue <[email protected]>
2020-09-23ARM: dts: stm32: Drop QSPI CS2 pinmux on DHCOMMarek Vasut1-2/+2
The QSPI CS2 is not used on DHCOM, remove the pinmux settings. Signed-off-by: Marek Vasut <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Cc: Patrice Chotard <[email protected]> Cc: Patrick Delaunay <[email protected]> Cc: [email protected] To: [email protected] Signed-off-by: Alexandre Torgue <[email protected]>
2020-09-23ARM: dts: stm32: Add STM32MP1 UART8 RTS/CTS pinmuxMarek Vasut1-0/+8
Add extra RTS/CTS line pinmux for STM32MP1 UART8. Signed-off-by: Marek Vasut <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Cc: Patrice Chotard <[email protected]> Cc: Patrick Delaunay <[email protected]> Cc: [email protected] To: [email protected] Acked-by: Fabrice Gasnier <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2020-09-23ARM: dts: stm32: add initial support for stm32mp157-odyssey boardMarcin Sloniewski4-1/+376
Add support for Seeed Studio's stm32mp157c odyssey board. Board consists of SoM with stm32mp157c with 4GB eMMC and 512 MB DDR3 RAM and carrier board with USB and ETH interfaces, SD card connector, wifi and BT chip AP6236. In this patch only basic kernel boot is supported and interfacing SD card and on-board eMMC. Signed-off-by: Marcin Sloniewski <[email protected]> Reviewed-by: Ahmad Fatoum <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2020-09-23ARM: dts: stm32: lxa-mc1: Fix kernel warning about PHY delaysHolger Assmann1-2/+0
The KSZ9031 PHY skew timings for rxc/txc, originally set to achieve the desired phase shift between clock- and data-signal, now trigger a kernel warning when used in rgmii-id mode: *-skew-ps values should be used only with phy-mode = "rgmii" This is because commit bcf3440c6dd7 ("net: phy: micrel: add phy-mode support for the KSZ9031 PHY") now configures own timings when phy-mode = "rgmii-id". Device trees wanting to set their own delays should use phy-mode "rgmii" instead as the warning prescribes. The "standard" timings now used with "rgmii-id" work fine on this board, so drop the explicit timings in the device tree and thereby silence the warning. Fixes: 666b5ca85cd3 ("ARM: dts: stm32: add STM32MP1-based Linux Automation MC-1 board") Signed-off-by: Holger Assmann <[email protected]> Acked-by: Ahmad Fatoum <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2020-09-23ARM: dts: stm32: Add USB OTG support to DH PDK2Marek Vasut1-2/+5
The DH PDK2 board is capable of USB OTG on the X14 USB Mini-AB connector, fill in the missing bits to make USB OTG possible instead of peripheral. Signed-off-by: Marek Vasut <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Cc: Patrice Chotard <[email protected]> Cc: Patrick Delaunay <[email protected]> Cc: [email protected] To: [email protected] Signed-off-by: Alexandre Torgue <[email protected]>
2020-09-23ARM: dts: stm32: Fix sdmmc2 pins on AV96Marek Vasut1-3/+3
The AV96 uses sdmmc2_d47_pins_c and sdmmc2_d47_sleep_pins_c, which differ from sdmmc2_d47_pins_b and sdmmc2_d47_sleep_pins_b in one pin, SDMMC2_D5, which is PA15 in the former and PA9 in the later. The PA15 is correct on AV96, so fix this. This error is likely a result of rebasing across the stm32mp1 DT pinctrl rework. Fixes: 611325f68102 ("ARM: dts: stm32: Add eMMC attached to SDMMC2 on AV96") Signed-off-by: Marek Vasut <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Cc: Patrice Chotard <[email protected]> Cc: Patrick Delaunay <[email protected]> Cc: [email protected] To: [email protected] Signed-off-by: Alexandre Torgue <[email protected]>
2020-09-23ARM: dts: stm32: Add DHSOM based DRC02 boardMarek Vasut4-2/+195
Add DT for DH DRC02 unit, which is a universal controller device. The system has two ethernet ports, two CANs, RS485 and RS232, USB, capacitive buttons and an OLED display. Signed-off-by: Marek Vasut <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Cc: Patrice Chotard <[email protected]> Cc: Patrick Delaunay <[email protected]> Cc: [email protected] To: [email protected] Signed-off-by: Alexandre Torgue <[email protected]>
2020-09-23ARM: dts: stm32: Move ethernet PHY into DH SoM DTMarek Vasut2-33/+36
The PHY and the VIO regulator is populated on the SoM, move it into the SoM DT. Signed-off-by: Marek Vasut <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Cc: Patrice Chotard <[email protected]> Cc: Patrick Delaunay <[email protected]> Cc: [email protected] To: [email protected] Signed-off-by: Alexandre Torgue <[email protected]>
2020-09-22Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netLinus Torvalds1-1/+1
Pull networking fixes from Jakub Kicinski: - fix failure to add bond interfaces to a bridge, the offload-handling code was too defensive there and recent refactoring unearthed that. Users complained (Ido) - fix unnecessarily reflecting ECN bits within TOS values / QoS marking in TCP ACK and reset packets (Wei) - fix a deadlock with bpf iterator. Hopefully we're in the clear on this front now... (Yonghong) - BPF fix for clobbering r2 in bpf_gen_ld_abs (Daniel) - fix AQL on mt76 devices with FW rate control and add a couple of AQL issues in mac80211 code (Felix) - fix authentication issue with mwifiex (Maximilian) - WiFi connectivity fix: revert IGTK support in ti/wlcore (Mauro) - fix exception handling for multipath routes via same device (David Ahern) - revert back to a BH spin lock flavor for nsid_lock: there are paths which do require the BH context protection (Taehee) - fix interrupt / queue / NAPI handling in the lantiq driver (Hauke) - fix ife module load deadlock (Cong) - make an adjustment to netlink reply message type for code added in this release (the sole change touching uAPI here) (Michal) - a number of fixes for small NXP and Microchip switches (Vladimir) [ Pull request acked by David: "you can expect more of this in the future as I try to delegate more things to Jakub" ] * git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net: (167 commits) net: mscc: ocelot: fix some key offsets for IP4_TCP_UDP VCAP IS2 entries net: dsa: seville: fix some key offsets for IP4_TCP_UDP VCAP IS2 entries net: dsa: felix: fix some key offsets for IP4_TCP_UDP VCAP IS2 entries inet_diag: validate INET_DIAG_REQ_PROTOCOL attribute net: bridge: br_vlan_get_pvid_rcu() should dereference the VLAN group under RCU net: Update MAINTAINERS for MediaTek switch driver net/mlx5e: mlx5e_fec_in_caps() returns a boolean net/mlx5e: kTLS, Avoid kzalloc(GFP_KERNEL) under spinlock net/mlx5e: kTLS, Fix leak on resync error flow net/mlx5e: kTLS, Add missing dma_unmap in RX resync net/mlx5e: kTLS, Fix napi sync and possible use-after-free net/mlx5e: TLS, Do not expose FPGA TLS counter if not supported net/mlx5e: Fix using wrong stats_grps in mlx5e_update_ndo_stats() net/mlx5e: Fix multicast counter not up-to-date in "ip -s" net/mlx5e: Fix endianness when calculating pedit mask first bit net/mlx5e: Enable adding peer miss rules only if merged eswitch is supported net/mlx5e: CT: Fix freeing ct_label mapping net/mlx5e: Fix memory leak of tunnel info when rule under multipath not ready net/mlx5e: Use synchronize_rcu to sync with NAPI net/mlx5e: Use RCU to protect rq->xdp_prog ...
2020-09-22ARM: dts: owl-s500: Add RoseapplePiCristian Ciocaltea2-0/+48
Add a Device Tree for the RoseapplePi SBC. Signed-off-by: Cristian Ciocaltea <[email protected]> Reviewed-by: Peter Korsgaard <[email protected]> Reviewed-by: Manivannan Sadhasivam <[email protected]> Signed-off-by: Manivannan Sadhasivam <[email protected]>
2020-09-22ARM: dts: owl-s500: Fix incorrect PPI interrupt specifiersCristian Ciocaltea1-3/+3
The PPI interrupts for cortex-a9 were incorrectly specified, fix them. Fixes: fdfe7f4f9d85 ("ARM: dts: Add Actions Semi S500 and LeMaker Guitar") Signed-off-by: Cristian Ciocaltea <[email protected]> Reviewed-by: Peter Korsgaard <[email protected]> Reviewed-by: Manivannan Sadhasivam <[email protected]> Signed-off-by: Manivannan Sadhasivam <[email protected]>
2020-09-22ARM: dts: Add Caninos Loucos Labrador v2Matheus Castello3-0/+58
Add Device Trees for Caninos Loucos Labrador CoM Core v2 and base board M v1. Based on the work of Andreas Färber on Lemaker Guitar device tree. Signed-off-by: Matheus Castello <[email protected]> Reviewed-by: Manivannan Sadhasivam <[email protected]> Reviewed-by: Andreas Färber <[email protected]> Signed-off-by: Manivannan Sadhasivam <[email protected]>
2020-09-22ARM: dts: imx6qdl-gw5xxx: correct interrupt flagsKrzysztof Kozlowski14-14/+28
GPIO_ACTIVE_x flags are not correct in the context of interrupt flags. These are simple defines so they could be used in DTS but they will not have the same meaning: 1. GPIO_ACTIVE_HIGH = 0 = IRQ_TYPE_NONE 2. GPIO_ACTIVE_LOW = 1 = IRQ_TYPE_EDGE_RISING Correct the interrupt flags, assuming the author of the code wanted same logical behavior behind the name "ACTIVE_xxx", this is: ACTIVE_LOW => IRQ_TYPE_LEVEL_LOW Signed-off-by: Krzysztof Kozlowski <[email protected]> Acked-By: Tim Harvey <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2020-09-22ARM: dts: imx6q-logicpd: Use GPIO chipselectFabio Estevam1-1/+2
Using the native SPI chipselect on i.MX6 is known to be problematic. Doing it on a imx6q-sabresd causes the SPI NOR probe to fail: [ 5.388704] spi-nor spi0.0: unrecognized JEDEC id bytes: 00 00 00 00 00 00 Use the GPIO chipselect to avoid such problem. Signed-off-by: Fabio Estevam <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2020-09-22ARM: dts: imx: Add an entry for imx6q-logicpd.dtbFabio Estevam1-0/+1
Add an entry for imx6q-logicpd.dtb so that it can be built by default. Signed-off-by: Fabio Estevam <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2020-09-22ARM: dts: imx6q-logicpd: Add a specific board compatible stringFabio Estevam1-1/+1
It is standard practice to have a specific board compatible string, so pass "logicpd,imx6q-logicpd". Signed-off-by: Fabio Estevam <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2020-09-22ARM: dts: imx6q: align GPIO hog names with dtschemaKrzysztof Kozlowski4-21/+21
dtschema for pca95xx expects GPIO hogs to end with 'hog' prefix. While touching the hogs, fix indentation (spaces -> tabs). Signed-off-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2020-09-21arm: dts: mt7623: add missing pause for switchportFrank Wunderlich1-0/+1
port6 of mt7530 switch (= cpu port 0) on bananapi-r2 misses pause option which causes rx drops on running iperf. Fixes: f4ff257cd160 ("arm: dts: mt7623: add support for Bananapi R2 (BPI-R2) board") Signed-off-by: Frank Wunderlich <[email protected]> Cc: [email protected] Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Matthias Brugger <[email protected]>
2020-09-17ARM: dts: sun8i: v3s: Enable crypto engineMartin Cerveny1-0/+11
V3s contains crypto engine that is compatible with A33. Add device tree node. Signed-off-by: Martin Cerveny <[email protected]> Signed-off-by: Maxime Ripard <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-09-17ARM: dts: sun8i: a33: Update codec widget namesSamuel Holland2-4/+4
The sun8i-codec driver introduced a new set of DAPM widgets that more accurately describe the hardware topology. Update the various device trees to use the new widget names. Signed-off-by: Samuel Holland <[email protected]> Signed-off-by: Maxime Ripard <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-09-17ARM: dts: sun8i: r40: Add video engine nodeJernej Skrabec1-0/+11
Allwinner R40 SoC has a video engine. Add a node for it. Signed-off-by: Jernej Skrabec <[email protected]> Signed-off-by: Maxime Ripard <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-09-17ARM: tegra: nexus7: Add SMB347 battery chargerDavid Heidelberg1-1/+23
SMB347 is a battery charger controller which is found on the Nexus 7 device. Signed-off-by: David Heidelberg <[email protected]> Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-09-17ARM: tegra: nexus7: Add touchscreenDmitry Osipenko1-0/+18
Nexus 7 2012 has Elantech EKTF3624 touchscreen, this patch adds TS node to the device-tree. Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-09-17ARM: tegra: nexus7: Use PLLC for WiFi MMC clock parentDmitry Osipenko1-0/+5
The default parent for all MMCs is PLLP, which is running at 408 MHz on Tegra30 and 50 MHz clock can't be derived from PLLP. The maximum SDIO clock rate is 50 MHz, but this rate isn't achievable using PLLP. Let's switch the WiFi MMC clock parent to PLLC in order to get true 50 MHz. This patch doesn't fix any problems, it's just a minor improvement. Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-09-17ARM: tegra: acer-a500: Use PLLC for WiFi MMC clock parentDmitry Osipenko1-0/+4
The default parent for all MMCs is PLLP, which is running at 216 MHz on Tegra20 and 50 MHz clock can't be derived from PLLP. The maximum SDIO clock rate is 50 MHz, but this rate isn't achievable using PLLP. Let's switch the WiFi MMC clock parent to PLLC in order to get true 50 MHz. This patch doesn't fix any problems, it's just a minor improvement. Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-09-17ARM: tegra: acer-a500: Set WiFi MMC clock rate to 50 MHzDmitry Osipenko1-1/+1
Previously 50MHz clock rate didn't work because of the wrong PINCTRL configuration used for SDIO pins. Now the PINCTRL config is corrected and the MMC clock rate could be bumped safely to 50MHz, increasing WiFi TX throughput by 20 Mbit/s and allowing to hit the maximum 40 Mbit/s. Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-09-17ARM: tegra: acer-a500: Correct PINCTRL configurationDmitry Osipenko1-2/+10
The low-power-mode drive was set to DIV_4 for some of PINCTRL groups, while these groups should use DIV_1. This patch fixes the wrong PINCTRL configurations and adds a full drive-setup for the changed configs, just for completeness since the added values match the default configuration. Now WiFi SDIO communication works properly using legacy signaling mode if SDIO BUS clocked at 50MHz, which is a maximum SDIO clock rate on Tegra20. Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-09-17ARM: tegra: acer-a500: Remove atmel,cfg_name propertyDmitry Osipenko1-2/+0
This property was supposed to be upstreamed, but it was NAKed recently in a favor to a better approach of firmware loading. It also turned out that the firmware loading isn't really necessary because it's stored in a non-volatile memory inside of the touchscreen controller and previously the FW loading was needed in order to get touchscreen working, but it actually was a TS driver problem which is resolved now. Hence remove the unsupported property. Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-09-17ARM: tegra: acer-a500: Add aliases for MMCDmitry Osipenko1-3/+7
MMC core now supports binding to a specific ID, which is very handy for embedded devices, like Acer A500, because MMC ID may change depending on kernel version or configuration which affects MMC driver probe order. Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-09-17ARM: tegra: nexus7: Add aliases for MMCDmitry Osipenko1-2/+5
MMC core now supports binding to a specific ID, which is very handy for embedded devices, like Nexus 7, because MMC ID may change depending on kernel version or configuration which affects MMC driver probe order. Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-09-16ARM: dts: s5pv210: replace deprecated "gpios" i2c-gpio property in GoniKrzysztof Kozlowski1-2/+2
"gpios" property is deprecated. Update the Goni DTS to fix dtbs_checks warnings like: i2c-pmic: 'sda-gpios' is a required property i2c-pmic: 'scl-gpios' is a required property Signed-off-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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