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2020-11-26ARM: tegra: Properly align clocks for SOCTHERMThierry Reding1-1/+1
Entries on subsequent lines should be aligned with the entry on the first line. Signed-off-by: Thierry Reding <[email protected]>
2020-11-26ARM: tegra: Hook up edp interrupt on Tegra124 SOCTHERMThierry Reding1-1/+3
For some reason this was never hooked up. Do it now so that over-current interrupts can be logged. Reported-by: Nicolas Chauvet <[email protected]> Suggested-by: Jon Hunter <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-11-26ARM: tegra: Add missing hot temperatures to Tegra124 thermal-zonesNicolas Chauvet1-0/+10
According to dmesg, thermal-zones for mem and cpu are missing hot temperatures properties. throttrip: pll: missing hot temperature ... throttrip: mem: missing hot temperature ... Adding them will clear the messages. Signed-off-by: Nicolas Chauvet <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-11-26ARM: tegra: Add missing gpu-throt-level to Tegra124 socthermNicolas Chauvet1-0/+1
On Jetson TK1 the following message can be seen: tegra_soctherm 700e2000.thermal-sensor: throttle-cfg: heavy: no throt prop or invalid prop This patch will fix the invalid prop issue according to the binding. Signed-off-by: Nicolas Chauvet <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-11-26ARM: tegra: Populate OPP table for Tegra20 VentanaJon Hunter1-0/+11
Commit 9ce274630495 ("cpufreq: tegra20: Use generic cpufreq-dt driver (Tegra30 supported now)") update the Tegra20 CPUFREQ driver to use the generic CPUFREQ device-tree driver. Since this change CPUFREQ support on the Tegra20 Ventana platform has been broken because the necessary device-tree nodes with the operating point information are not populated for this platform. Fix this by updating device-tree for Venata to include the operating point informration for Tegra20. Fixes: 9ce274630495 ("cpufreq: tegra20: Use generic cpufreq-dt driver (Tegra30 supported now)") Cc: [email protected] Signed-off-by: Jon Hunter <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-11-26ARM: tegra: nexus7: Use panel-lvds as the only panel compatibleDmitry Osipenko1-2/+10
Depending on a driver probe order, panel-simple driver may probe first, which results in this error: panel-simple display-panel: Reject override mode: panel has a fixed mode We don't want to use panel-simple anyways because customized timings are preferred for Nexus 7, hence remove the panel-simple compatibles from the panel node. Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-11-26ARM: tegra: nexus7: Rename gpio-hog nodesDmitry Osipenko3-4/+4
Devicetree schema now requires gpio-hog nodes to have a certain naming pattern, like a -hog suffix. This patch fixes dtbs_check warnings about the names. Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-11-26ARM: tegra: nexus7: Add power-supply to lvds-encoder nodeDmitry Osipenko1-0/+1
The lvds-encoder binding now supports power-supply property, let's specify it in the device-tree for completeness. Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-11-26ARM: tegra: nexus7: Improve CPU passive-cooling thresholdDmitry Osipenko1-3/+3
The current CPU thermal limit is a bit inappropriate for Nexus 7 once device is getting used on a daily bases. For example, currently it's may be impossible to watch a hardware accelerated 720p video without hitting a severe CPU throttling, which ruins user experience. This patch improves the thermal throttling thresholds. In my experience setting CPU thermal threshold to 57C provides the most reasonable result, where device is a bit warm under constant load and not getting overly hot, in the same time performance is okay. Let's bump the passive-cooling threshold from 50C to 57C and also lower the thermal hysteresis to 0.2C in order to make throttling more reactive. Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-11-26ARM: tegra: nexus7: Correct thermal zone namesDmitry Osipenko1-2/+2
Rename thermal zones in order fix dt_binding_check warning telling that names do not match the expected pattern. Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-11-26ARM: tegra: acer-a500: Add power-supply to lvds-encoder nodeDmitry Osipenko1-0/+1
The lvds-encoder binding now supports power-supply property, let's specify it in the device-tree for completeness. Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-11-26ARM: tegra: acer-a500: Correct thermal zone namesDmitry Osipenko1-2/+2
Rename thermal zones in order fix dt_binding_check warning telling that names do not match the expected pattern. Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-11-26ARM: tegra: Add device-tree for OuyaPeter Geis2-1/+4513
The Ouya was the sole device produced by Ouya Inc in 2013. It was a game console originally running Android 5 on top of Linux 3.1.10. This patch adds the device tree supporting the Ouya. It has been tested on the original variant with Samsung ram. Signed-off-by: Peter Geis <[email protected]> Reviewed-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-11-26ARM: dts: qcom: msm8974-lge-nexus5: Add fuel gaugeIskren Chernev1-0/+25
The LG Nexus 5 uses a maxim17048 fuelgauge. The maxim,rcomp value is taken from downstream dt. Temperature-based compensation is not yet supported in the mainline driver, but the readings seem fine nevertheless. Signed-off-by: Iskren Chernev <[email protected]> Tested-by: Nícolas F. R. A. Prado <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2020-11-26ARM: dts: qcom: msm8974-klte: Add fuel gaugeIskren Chernev1-0/+39
The Samsung Galaxy S5 uses a maxim17048 fuelgauge. The maxim,rcomp value is taken from downstream kernel. Model data and temperature-based compensation are not yet supported in the mainline driver, but the readings seem fine nevertheless. Signed-off-by: Iskren Chernev <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2020-11-26ARM: dts: stm32: lxa-mc1: add OSD32MP15x to list of compatiblesAhmad Fatoum1-1/+1
Earlier commit modified the binding, so the SiP is to be specified as well. Adjust the device tree accordingly. Signed-off-by: Ahmad Fatoum <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2020-11-26ARM: dts: stm32: Add DHCOM based PicoITX boardMarek Vasut3-0/+179
Add DT for DH PicoITX unit, which is a bare-bones carrier board for the DHCOM. The board has ethernet port, USB, CAN, LEDs and a custom board-to-board expansion connector. Signed-off-by: Marek Vasut <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Cc: Patrice Chotard <[email protected]> Cc: Patrick Delaunay <[email protected]> Cc: [email protected] To: [email protected] Signed-off-by: Alexandre Torgue <[email protected]>
2020-11-26ARM: dts: stm32: support child mfd cells for the stm32mp1 TAMP sysconAhmad Fatoum1-1/+1
The stm32mp1 TAMP peripheral has 32 backup registers that survive a warm reset. This makes them suitable for storing a reboot mode, which the vendor's kernel tree is already doing[0]. The actual syscon-reboot-mode child node can be added by a board.dts or fixed up by the bootloader. For the child node to be probed, the compatible needs to include simple-mfd. The binding now specifies this, so have the SoC dtsi adhere to it. [0]: https://github.com/STMicroelectronics/linux/commit/2e9bfc29dd Signed-off-by: Ahmad Fatoum <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2020-11-26ARM: dts: stm32: update stm32mp151 for remote proc synchronization supportArnaud Pouliquen1-0/+7
Two backup registers are used to store the Cortex-M4 state and the resource table address. Declare the tamp node and add associated properties in m4_rproc node to allow Linux to attach to a firmware loaded by the first boot stages. Associated driver implementation is available in commit 9276536f455b3 ("remoteproc: stm32: Parse syscon that will manage M4 synchronisation"). Signed-off-by: Arnaud Pouliquen <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2020-11-26ARM: dts: stm32: adjust USB OTG gadget fifo sizes in stm32mp151Amelie Delaunay1-2/+2
Defaut use case on stm32mp151 USB OTG is ethernet gadget, using EP1 bulk endpoint (MPS=512 bytes) and EP2 interrupt endpoint (MPS=16 bytes). This patch optimizes USB OTG FIFO sizes accordingly. Signed-off-by: Amelie Delaunay <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2020-11-26ARM: dts: stm32: fix dmamux reg property on stm32h743Amelie Delaunay1-1/+1
Reg property length should cover all DMAMUX_CxCR registers. DMAMUX_CxCR Address offset: 0x000 + 0x04 * x (x = 0 to 15), so latest offset is at 0x3c, so length should be 0x40. Signed-off-by: Amelie Delaunay <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2020-11-26ARM: dts: stm32: fix dmamux reg property on stm32mp151Amelie Delaunay1-1/+1
Reg property length should cover all DMAMUX_CxCR registers. DMAMUX_CxCR Address offset: 0x000 + 0x04 * x (x = 0 to 15), so latest offset is at 0x3c, so length should be 0x40. Signed-off-by: Amelie Delaunay <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2020-11-26ARM: dts: stm32: fix mdma1 clients channel priority level on stm32mp151Amelie Delaunay1-3/+3
Update mdma1 clients channel priority level following stm32-mdma bindings. Signed-off-by: Amelie Delaunay <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2020-11-26ARM: dts: stm32: add STUSB1600 Type-C using I2C4 on stm32mp15xx-dkxAmelie Delaunay2-0/+37
This patch adds support for STUSB1600 USB Type-C port controller, used on I2C4 on stm32mp15xx-dkx. The default configuration on this board, on Type-C connector, is: - Dual Power Role (DRP), so set power-role to "dual"; - Vbus limited to 500mA, so set typec-power-opmode to "default" (it means 500mA in USB 2.0). typec-power-opmode is used to reconfigure the STUSB1600 advertising of current capability when its NVM is not in line with the board layout. On stm32mp15xx-dkx, Vbus power source of STUSB1600 is 5V_VIN. So power operation mode depends on the power supply used. To avoid any power issues, it is better to limit Vbus to 500mA on this board. ALERT# is the interrupt pin of STUSB1600. It needs an external pull-up, and signal is active low. USB OTG controller ID and Vbus signals are not connected on stm32mp15xx-dkx boards, so disconnection are not detected. Without DWC2 usb-role-switch: - if you unplug the USB cable from the Type-C port, you have to manually disconnect the USB gadget: echo disconnect > /sys/devices/platform/soc/49000000.usb-otg/udc/49000000.usb-otg/soft_connect - Then you can plug the USB cable again in the Type-C port, and manually reconnect the USB gadget: echo connect > /sys/devices/platform/soc/49000000.usb-otg/udc/49000000.usb-otg/soft_connect With DWC2 usb-role-switch, USB gadget is dynamically disconnected or connected. Signed-off-by: Amelie Delaunay <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2020-11-26ARM: dts: stm32: reorder spi4 within stm32mp15-pinctrlPatrick Delaunay1-14/+14
Move spi4 at the right alphabetical place within stm32mp15-pinctrl Fixes: 4fe663890ac5 ("ARM: dts: stm32: Fix spi4 pins in stm32mp15-pinctrl") Signed-off-by: Patrick Delaunay <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2020-11-26ARM: dts: stm32: set bus-type in DCMI endpoint for stm32429i-eval boardHugues Fruchet1-0/+1
Explicitly set bus-type to parallel mode in DCMI endpoint (bus-type=5). Signed-off-by: Hugues Fruchet <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2020-11-26ARM: dts: stm32: set bus-type in DCMI endpoint for stm32mp157c-ev1 boardHugues Fruchet1-0/+1
Explicitly set bus-type to parallel mode in DCMI endpoint (bus-type=5). Signed-off-by: Hugues Fruchet <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2020-11-26ARM: dts: stm32: enable CRYP by default on stm32mp15Lionel Debieve2-0/+8
Enable CRYP1 device for cryp accelerated support on stm32mp157C-EV1/DK2 STMicroelectronics platforms. Signed-off-by: Nicolas Toromanoff <[email protected]> Signed-off-by: Lionel Debieve <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2020-11-26ARM: dts: stm32: enable CRC1 by default on stm32mp15Nicolas Toromanoff2-0/+8
Enable CRC1 device for CRC-32 accelerated support on stm32mp15 STMicroelectronics platforms. Signed-off-by: Nicolas Toromanoff <[email protected]> Signed-off-by: Lionel Debieve <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2020-11-26ARM: dts: stm32: enable HASH by default on stm32mp15Lionel Debieve2-0/+8
Enable HASH1 device for HASH accelerated support on stm32mp15 STMicroelectronics platforms. Signed-off-by: Lionel Debieve <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2020-11-26ARM: dts: stm32: Add LP timer wakeup-source on stm32mp151Fabrice Gasnier1-0/+5
LP timer can be used to wakeup from stop mode on stm32mp151. Add wakeup-source properties to all LP timer instances. Signed-off-by: Fabrice Gasnier <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2020-11-26ARM: dts: stm32: Add LP timer irqs on stm32mp151Fabrice Gasnier1-0/+5
Add all LP timer irqs on stm32mp151. Signed-off-by: Fabrice Gasnier <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2020-11-26ARM: dts: stm32: update sdmmc IP version for STM32MP15Yann Gautier1-3/+3
Update the IP version to v2.0, which supports linked lists in internal DMA, and is present in STM32MP1 SoCs. The mmci driver supports the v2.0 periph id since 7a2a98be672b ("mmc: mmci: Add support for sdmmc variant revision 2.0"), so it's now Ok to add it into the SoC device tree to benefit from the improved DMA support. Signed-off-by: Ludovic Barre <[email protected]> Signed-off-by: Yann Gautier <[email protected]> Signed-off-by: Ahmad Fatoum <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2020-11-26ARM: dts: stm32: Harmonize EHCI/OHCI DT nodes name on stm32mp15Serge Semin1-2/+2
In accordance with the Generic EHCI/OHCI bindings the corresponding node name is suppose to comply with the Generic USB HCD DT schema, which requires the USB nodes to have the name acceptable by the regexp: "^usb(@.*)?" . Make sure the "generic-ehci" and "generic-ohci"-compatible nodes are correctly named. Signed-off-by: Serge Semin <[email protected]> Acked-by: Amelie Delaunay <[email protected]> Acked-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2020-11-26ARM: zynq: Add Z-turn board V5Alexandre GRIVEAUX4-100/+129
Adding Z-turn board V5 to resolve the change between: "Z-TURNBOARD_schematic.pdf" schematics state version 1 to 4 has Atheros AR8035 "Z-Turn_Board_sch_V15_20160303.pdf" schematics state version 5 has Micrel KSZ9031 Changes v1 -> v2: Instead of using new board, the v2 using a common devicetree for z-turn boards (zynq-zturn-common.dtsi) and for each board a specific DT Signed-off-by: Alexandre GRIVEAUX <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2020-11-24ARM: dts: sun8i-h2-plus-bananapi-m2-zero: add gpio-line-namesMichael Klein1-0/+64
Add gpio-line-names as documented in the Banana Pi wiki [1] and in the schematics [2]. [1]: http://wiki.banana-pi.org/Banana_Pi_BPI-M2_ZERO#GPIO_PIN_define [2]: https://drive.google.com/file/d/0B4PAo2nW2KfnMW5sVkxWSW9qa28/view Signed-off-by: Michael Klein <[email protected]> Signed-off-by: Maxime Ripard <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-11-24ARM: dts: sun7i: pcduino3-nano: enable RGMII RX/TX delay on PHYAdam Sampson1-2/+2
The RX/TX delays for the Ethernet PHY on the Linksprite pcDuino 3 Nano are configured in hardware, using resistors that are populated to pull the RTL8211E's RXDLY/TXDLY pins low or high as needed. phy-mode should be set to rgmii-id to reflect this. Previously it was set to rgmii, which used to work but now results in the delays being disabled again as a result of the bugfix in commit bbc4d71d6354 ("net: phy: realtek: fix rtl8211e rx/tx delay config"). Tested on two pcDuino 3 Nano boards purchased in 2015. Without this fix, Ethernet works unreliably on one board and doesn't work at all on the other. Fixes: 061035d456c9 ("ARM: dts: sun7i: Add dts file for pcDuino 3 Nano board") Signed-off-by: Adam Sampson <[email protected]> Signed-off-by: Maxime Ripard <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Acked-by: Chen-Yu Tsai <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-11-24ARM: dts: hisilicon: fix errors detected by syscon.yamlZhen Lei1-1/+1
The DT binding for system controller is not allowed to contain only the compatible string "syscon", the Hisilicon peripheral subsystem controller should add compatible string "hisilicon,peri-subctrl". Otherwise, the error "compatible: ['syscon'] is too short" will be reported. Signed-off-by: Zhen Lei <[email protected]> Signed-off-by: Wei Xu <[email protected]>
2020-11-24ARM: dts: hisilicon: fix errors detected by spi-pl022.yamlZhen Lei1-6/+6
1. Change clock-names to "sspclk", "apb_pclk". Both of them use the same clock. Signed-off-by: Zhen Lei <[email protected]> Signed-off-by: Wei Xu <[email protected]>
2020-11-24ARM: dts: hisilicon: fix errors detected by synopsys-dw-mshc.yamlZhen Lei1-2/+2
Look at the clock-names schema defined in synopsys-dw-mshc.yaml: clock-names: items: - const: biu - const: ciu The "biu" needs to be placed before the "ciu". Signed-off-by: Zhen Lei <[email protected]> Signed-off-by: Wei Xu <[email protected]>
2020-11-24ARM: dts: hisilicon: fix errors detected by root-node.yamlZhen Lei4-4/+4
Make the memory node name match the regex "^memory(@[0-9a-f]+)?$" which is described in memory.yaml. Otherwise, it will be treated as root node, and misreported by root-node.yaml. Errors misreported by root-node.yaml: /: memory: False schema does not allow {'device_type': ['memory'], 'reg': Signed-off-by: Zhen Lei <[email protected]> Signed-off-by: Wei Xu <[email protected]>
2020-11-24ARM: dts: hisilicon: fix errors detected by simple-bus.yamlZhen Lei4-4/+4
Change bus node name from "amba" to "amba-bus" to match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$' Signed-off-by: Zhen Lei <[email protected]> Signed-off-by: Wei Xu <[email protected]>
2020-11-24ARM: dts: hisilicon: fix errors detected by usb yamlZhen Lei1-2/+2
1. Change node name to match '^usb(@.*)?' These errors are detected by generic-ehci.yaml and generic-ohci.yaml. Signed-off-by: Zhen Lei <[email protected]> Signed-off-by: Wei Xu <[email protected]>
2020-11-24ARM: dts: hisilicon: fix errors detected by pl011.yamlZhen Lei4-50/+50
1. Change node name to match '^serial(@[0-9a-f,]+)*$' 2. Change clock-names to "uartclk", "apb_pclk". Both of them use the same clock. 3. Change pinctrl-names to "default", "sleep". Signed-off-by: Zhen Lei <[email protected]> Signed-off-by: Wei Xu <[email protected]>
2020-11-24ARM: dts: hisilicon: fix errors detected by snps-dw-apb-uart.yamlZhen Lei3-16/+16
1. Change node name to match '^serial(@[0-9a-f,]+)*$' 2. Change clock-names to "baudclk", "apb_pclk". Both of them use the same clock. Signed-off-by: Zhen Lei <[email protected]> Signed-off-by: Wei Xu <[email protected]>
2020-11-24ARM: dts: at91: sama5d3_xplained: add pincontrol for USB HostCristian Birsan1-0/+7
The pincontrol node is needed for USB Host since Linux v5.7-rc1. Without it the driver probes but VBus is not powered because of wrong pincontrol configuration. Fixes: b7c2b61570798 ("ARM: at91: add Atmel's SAMA5D3 Xplained board") Signed-off-by: Cristian Birsan <[email protected]> Signed-off-by: Alexandre Belloni <[email protected]> Acked-by: Ludovic Desroches <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-11-24ARM: dts: at91: sama5d4_xplained: add pincontrol for USB HostCristian Birsan1-0/+7
The pincontrol node is needed for USB Host since Linux v5.7-rc1. Without it the driver probes but VBus is not powered because of wrong pincontrol configuration. Fixes: 38153a017896f ("ARM: at91/dt: sama5d4: add dts for sama5d4 xplained board") Signed-off-by: Cristian Birsan <[email protected]> Signed-off-by: Alexandre Belloni <[email protected]> Acked-by: Ludovic Desroches <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-11-24ARM: dts: at91: sam9x60: add pincontrol for USB HostCristian Birsan1-0/+9
The pincontrol node is needed for USB Host since Linux v5.7-rc1. Without it the driver probes but VBus is not powered because of wrong pincontrol configuration. Fixes: 1e5f532c2737 ("ARM: dts: at91: sam9x60: add device tree for soc and board") Signed-off-by: Cristian Birsan <[email protected]> Signed-off-by: Alexandre Belloni <[email protected]> Acked-by: Ludovic Desroches <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-11-23Merge tag 'ux500-dts-for-v5.11-1' of ↵Arnd Bergmann8-16/+29
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into arm/dt Ux500 DTS updates for the v5.11 kernels: - Rename the DSI controllers to match the preferred schema. - Pull down the SDI2 feedback clock on the Skomer. - Add proper supplies to the MaxToch touchscreen on the Golden. * tag 'ux500-dts-for-v5.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: ARM: dts: ux500-golden: Add proper supplies to touchscreen ARM: dts: ux500: skomer: Pull down SDI2 FBCLK ARM: dts: ux500: Rename DSI controller nodes Link: https://lore.kernel.org/r/CACRpkdY_M4xj++QhRPqX6N3x9YmFNJkz70DnvBj7Ai-dOtCJSQ@mail.gmail.com Signed-off-by: Arnd Bergmann <[email protected]>
2020-11-23ARM: dts: add Nuvoton NPCM730 device treeTomer Maimon1-0/+44
Add Nuvoton NPCM730 SoC device tree. The Nuvoton NPCN730 SoC is a part of the Nuvoton NPCM7xx SoCs family. Signed-off-by: Tomer Maimon <[email protected]> Reviewed-by: Benjamin Fair <[email protected]> Link: https://lore.kernel.org/r/[email protected]' Signed-off-by: Arnd Bergmann <[email protected]>
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