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path: root/arch/arm/boot/dts/tegra124-apalis.dtsi
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2018-05-03ARM: tegra: apalis-tk1: Fix high speed UART compatibleMarcel Ziswiler1-3/+3
Turns out the compatible "nvidia,tegra124-hsuart" does not (yet) exist and everybody else also uses it only in conjunction with "nvidia,tegra30-hsuart". Reported-by: Martin Šafařík <msafarik@retia.cz> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-03-08ARM: tegra: apalis-tk1: Copyright period, spurious newlinesMarcel Ziswiler1-10/+1
Update the copyright period and get rid of some spurious newlines. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-03-08ARM: tegra: apalis-tk1: Hog group for ethernet, PCIe, reset GPIOsMarcel Ziswiler1-0/+18
The Apalis TK1 module uses some dedicated GPIOs as I210 gigabit Ethernet controller reset and to control RESET_MOCI aka reset module output carrier input on MXM3 pin 26. The Apalis Evaluation Board furthermore uses Apalis GPIO7 on MXM3 pin 15 as reset signal for its PLX PEX 8605 PCIe Switch. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-03-08ARM: tegra: apalis-tk1: Add missing as3722 gpio0 configurationMarcel Ziswiler1-3/+3
As the AS3722 GPIO0 is also a not connected on our Apalis TK1 module explicitly configure it to high-impedance as well. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-03-08ARM: tegra: apalis-tk1: Activate PWM pin muxing for pwm3Marcel Ziswiler1-4/+4
Activate PWM pin muxing for Apalis PWM3. Note that the same PWM3 is already active on pu6 being Apalis BKL1_PWM as well. Therefore exporting that one for raw sysfs access will fail and one has to revert to using the PWM backlight. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-03-08ARM: tegra: apalis-tk1: Set critical tripsMarcel Ziswiler1-24/+3
Set "critical" trip temperatures for cpu, gpu, mem and pllx thermal zones. These trips can trigger shut down or reset. Similar to commit 40823f8e267f ("arm: tegra: set critical trips for Tegra124"). Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-03-08ARM: tegra: Fix I2C bus frequencies on Apalis/ColibriMarcel Ziswiler1-1/+1
Use a faster speed of 400 kbit/s for regular I2C busses. Use a slower speed of 10 kbit/s for DDC/EDID to improve reliability. Use a slower speed of 100 kbit/s for power I2C to be within specs of the LM95245 temperature sensor. While at it further annotate I2C pin usage. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-06-13ARM: dts: tegra: fix PCI bus dtc warningsRob Herring1-1/+1
dtc recently added PCI bus checks. Fix these warnings. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: linux-tegra@vger.kernel.org Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-01-25ARM: tegra: apalis-tk1: Update compatibility commentMarcel Ziswiler1-1/+1
Now with the new V1.1A HW card detect being implemented update resp. compatibility information. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-01-25ARM: tegra: apalis-tk1: Adjust pin muxing for v1.1 HWMarcel Ziswiler1-30/+23
Configure Apalis MMC1 D6 GPIO on SDMMC3_CLK_LB_IN as reserved function without any pull-up/down. Configure GPIO_PV2 as SD1_CD# according to latest V1.1 HW. Leave SDMMC3_CLK_LB_OUT muxed as SDMMC3 with output driver enabled aka not tristated and input driver enabled as well as it features some magic properties even though the external loopback is disabled and the internal loopback used as per SDMMC_VENDOR_MISC_CNTRL_0 register's SDMMC_SPARE1 bits being set to 0xfffd according to the TRM! This pin is now a not-connect on V1.1 HW in order to avoid any interference. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-01-25ARM: tegra: apalis-tk1: Optional DisplayPort hot-plug detectMarcel Ziswiler1-1/+1
Configure DP_HPD_PFF0 pin as optional DisplayPort hot-plug detect. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-01-25ARM: tegra: apalis-tk1: Pull-up temperature alertMarcel Ziswiler1-2/+2
Pull-up GPIO_PI6 connected to TMP451's ALERT#/THERM2#. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-11-08ARM: tegra: apalis-tk1: Drop leading 0 from unit-addressThierry Reding1-1/+1
According to the latest best practices, unit-addresses should be represented without any leading zeroes. Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-07-11ARM: tegra: Initial support for Apalis TK1Marcel Ziswiler1-0/+2100
This patch adds the device tree to support Toradex Apalis TK1 a computer on module which can be used on different carrier boards. The module consists of a Tegra TK1 SoC, a PMIC solution, 2 GB of DDR3L RAM, a bunch of level shifters, an eMMC, a TMP451 temperature sensor chip, an I210 gigabit Ethernet controller and a SGTL5000 audio codec. Furthermore, there is a Kinetis MK20DN512 companion micro controller for analogue, CAN and resistive touch functionality which is not yet supported. Anything that is not self contained on the module is disabled by default. The device tree for the Evaluation Board includes the module's device tree and enables the supported peripherals of the carrier board (the Evaluation Board supports almost all of them). Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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