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2023-01-19Documentation/gpu: update dGPU asic info tableAlex Deucher1-0/+2
Update to the latest launched dGPUs. Link: https://www.amd.com/en/graphics/radeon-rx-graphics Link: https://www.amd.com/en/graphics/amd-radeon-rx-laptops Reviewed-by: Mario Limonciello <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-01-19Documentation/gpu: Add Raphael to apu-asic-info-tableMario Limonciello1-0/+1
Raphael launched in 2022 but was missed to add to this table. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Mario Limonciello <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-01-19Documentation/gpu: Add Mendocino to apu-asic-info-tableMario Limonciello1-0/+1
Mendocino launched in 2023 and uses the new naming scheme for APU processors. Link: https://community.amd.com/t5/corporate/announcing-new-model-numbers-for-2023-mobile-processors/ba-p/543985 Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Mario Limonciello <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-01-19Documentation/gpu: Update lines for GREEN_SARDINE and YELLOW_CARPMario Limonciello1-2/+2
These products have launched, so add matching codenames. Also AMD has announced that both of these products have new refresh variants that launch in 2023 using the new naming scheme, so add that information. Link: https://community.amd.com/t5/corporate/announcing-new-model-numbers-for-2023-mobile-processors/ba-p/543985 Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Mario Limonciello <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-01-19Documentation/gpu: Add MP0 version to apu-asic-info-tableMario Limonciello2-9/+9
MP0 version is useful to know to figure out which firmware is intended for a platform. Add a column for all supported APUs. v2: squash in column fix (Mario) Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Mario Limonciello <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-12-02drm/amdgpu: add GART, GPUVM, and GTT to glossaryAlex Deucher1-0/+23
Add definitions to clarify GPU virtual memory. v2: clarify the terms a bit more Reviewed-by: Christian König <[email protected]> Reviewed-by: Luben Tuikov <[email protected]> Suggested-by: Peter Maucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-12-01drm/amdgpu: mention RDNA support in docuPeter Maucher1-1/+1
The amdgpu kernel module has supported RDNA for a while, mention that in the module description. v2: Add CDNA as well (Alex) Signed-off-by: Peter Maucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-29drm/amdgpu: update docum. filename following renameRandy Dunlap1-2/+2
Fix documentation build errors for amdgpu: correct the filename. Error: Cannot open file ../drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c Error: Cannot open file ../drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c Error: Cannot open file ../drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c WARNING: kernel-doc '../scripts/kernel-doc -rst -enable-lineno -sphinx-version 5.3.0 -function MMU Notifier ../drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c' failed with return code 1 WARNING: kernel-doc '../scripts/kernel-doc -rst -enable-lineno -sphinx-version 5.3.0 -internal ../drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c' failed with return code 2 Fixes: d9483ecd327b ("drm/amdgpu: rename the files for HMM handling") Signed-off-by: Randy Dunlap <[email protected]> Cc: Christian König <[email protected]> Cc: Alex Deucher <[email protected]> Cc: Felix Kuehling <[email protected]> Cc: David Airlie <[email protected]> Cc: Daniel Vetter <[email protected]> Cc: Jonathan Corbet <[email protected]> Cc: [email protected] Cc: [email protected] Signed-off-by: Alex Deucher <[email protected]>
2022-09-01Documentation/gpu: Add Multiplane Overlay docRodrigo Siqueira7-0/+1674
Multiple plane overlay is a feature supported by AMD hardware, but it has specific details that deserve proper documentation. This commit introduces a documentation that describes some of the features, limitations, and use cases for this feature. Part of this documentation came from some discussion in the public upstream [1][2]. [1]. https://lore.kernel.org/amd-gfx/3qY-QeukF_Q_MJeIXAuBjO4szbS4jRtqkTifXnbnN3bp88SxVodFQRpah3mIIVJq24DUkF6g0rOGdCmSqTvVxx9LCGEItmzLw8uWU44jtXE=@emersion.fr/ [2]. https://lore.kernel.org/amd-gfx/[email protected]/ Cc: Harry Wentland <[email protected]> Cc: Nicholas Kazlauskas <[email protected]> Cc: Bhawanpreet Lakha <[email protected]> Cc: Hersen Wu <[email protected]> Cc: Alex Hung <[email protected]> Cc: Pierre-Eric Pelloux-Prayer <[email protected]> Cc: Simon Ser <[email protected]> Cc: Pekka Paalanen <[email protected]> Cc: Sean Paul <[email protected]> Cc: Mark Yacoub <[email protected]> Cc: Leo Li <[email protected]> Cc: Pierre-Loup <[email protected]> Cc: Michel Dänzer <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-01Documentation/gpu: Add an explanation about the DCN pipelineRodrigo Siqueira3-0/+2079
In the DCN code, we constantly talk about hardware pipeline, pipeline, or even just pipes, which is a concept that is not obvious to everyone. For this reason, this commit expands the DCN overview explanation by adding a new section that describes what a pipeline is from the DCN perspective. Changes since V1: - Rewrite the first paragraph that describes AMD hardware pipeline. Cc: Harry Wentland <[email protected]> Cc: Nicholas Kazlauskas <[email protected]> Cc: Bhawanpreet Lakha <[email protected]> Cc: Hersen Wu <[email protected]> Cc: Alex Hung <[email protected]> Cc: Pierre-Eric Pelloux-Prayer <[email protected]> Cc: Leo Li <[email protected]> Cc: Simon Ser <[email protected]> Cc: Pekka Paalanen <[email protected]> Cc: Sean Paul <[email protected]> Cc: Mark Yacoub <[email protected]> Cc: Pierre-Loup <[email protected]> Cc: Michel Dänzer <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-01Documentation/gpu: Add info table for ASICsRodrigo Siqueira3-0/+49
Amdgpu driver is used in an extensive range of devices, and each ASIC has some specific configuration. As a result of this variety, sometimes it is hard to identify the correct block that might cause the issue. This commit expands the amdgpu kernel-doc to alleviate this issue by introducing one ASIC table that describes dGPU and another one that shares the APU info. Cc: Harry Wentland <[email protected]> Cc: Nicholas Kazlauskas <[email protected]> Cc: Bhawanpreet Lakha <[email protected]> Cc: Hersen Wu <[email protected]> Cc: Alex Hung <[email protected]> Cc: Pierre-Eric Pelloux-Prayer <[email protected]> Cc: Leo Li <[email protected]> Cc: Simon Ser <[email protected]> Cc: Pekka Paalanen <[email protected]> Cc: Sean Paul <[email protected]> Cc: Mark Yacoub <[email protected]> Cc: Pierre-Loup <[email protected]> Cc: Michel Dänzer <[email protected]> Cc: Kent Russell <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-16Documentation/gpu: Document GFXOFF's count and residencyAndré Almeida1-1/+17
Add documentation explaining those two new files. While here, add a note about the value type. Signed-off-by: André Almeida <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-16Documentation/gpu/amdgpu/amdgpu_dm: add DM docs for pixel blend modeMelissa Wen1-0/+98
AMD GPU display manager (DM) maps DRM pixel blend modes (None, Pre-multiplied, Coverage) to MPC hw blocks through blend configuration options. Describe relevant elements and how to set and test them to get the expected DRM blend mode on DCN hw. v2: - add ref tag (Tales) Signed-off-by: Melissa Wen <[email protected]> Reviewed-by: Tales Aparecida <[email protected]> Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-16drm/amd/display: add doc entries for MPC blending configurationMelissa Wen1-1/+1
Describe structs and enums used to set blend mode properties to MPC blocks. Some pieces of information are already available as code comments, and were just formatted. Others were collected and summarised from discussions on AMD issue tracker[1][2]. [1] https://gitlab.freedesktop.org/drm/amd/-/issues/1734 [2] https://gitlab.freedesktop.org/drm/amd/-/issues/1769 v2: - fix typos (Tales) - add MPCC to MPC entry in the glossary Signed-off-by: Melissa Wen <[email protected]> Reviewed-by: Tales Aparecida <[email protected]> Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-16Documentation/amdgpu/display: add DC color caps infoMelissa Wen3-0/+2933
Add details about color correction capabilities and explain a bit about differences between DC hw generations and also how they are mapped between DRM and DC interface. Two schemas for DCN 2.0 and 3.0 (converted to svg from the original png) is included to illustrate it. They were obtained from a discussion[1] in the amd-gfx mailing list. [1] https://lore.kernel.org/amd-gfx/[email protected]/ v1: - remove redundant comments (Harry) - fix typos (Harry) v2: - reword introduction of color section - add co-dev tag for Harry - who provided most of the info - fix typos (Tales) - describe missing struct parameters (Tales and Siqueira) Co-developed-by: Harry Wentland <[email protected]> Signed-off-by: Harry Wentland <[email protected]> Signed-off-by: Melissa Wen <[email protected]> Reviewed-by: Tales Aparecida <[email protected]> Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-08-16Documentation/amdgpu_dm: Add DM color correction documentationMelissa Wen1-0/+9
AMDGPU DM maps DRM color management properties (degamma, ctm and gamma) to DC color correction entities. Part of this mapping is already documented as code comments and can be converted as kernel docs. v2: - rebase to amd-staging-drm-next - fix typos (Tales) - undo kernel-docs inside functions (Tales) Signed-off-by: Melissa Wen <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Reviewed-by: Tales Aparecida <[email protected]> Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-25Documentation/gpu: Add GFXOFF sectionAndré Almeida1-0/+41
Add a GFXOFF section at "GPU Power Controls" file, explaining what it is and how userspace can interact with it. v2: minor tweaks to the documenation (Alex) Signed-off-by: André Almeida <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-13drm/amdgpu: Fix acronym typo in glossaryKent Russell1-1/+1
The initialism of RunList Controller is RLC, not RCL Signed-off-by: Kent Russell <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-04-19Documentation/gpu: Add entries to amdgpu glossaryTales Lelo da Aparecida1-0/+13
Add missing acronyms to the amdgppu glossary. Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/1939 Acked-by: Christian König <[email protected]> Signed-off-by: Tales Lelo da Aparecida <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-12-14Documentation/gpu: include description of some of the GC microcontrollersYann Dirson1-0/+35
This is Alex' description from the "Looking for clarifications around gfx/kcq/kiq" thread, edited to fit as ReST. Original text: https://www.spinics.net/lists/amd-gfx/msg71383.html Originally-by: Alex Deucher <[email protected]> Signed-off-by: Yann Dirson <[email protected]> Acked-by: Harry Wentland <[email protected]> Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-12-14Documentation/gpu: include description of AMDGPU hardware structureYann Dirson2-0/+84
This describes in broad lines the how an AMD GPU is organized, in terms of hardware blocks. This is Alex' description from the "gpu block diagram" thread, edited to fit as ReST. Original text: https://www.spinics.net/lists/amd-gfx/msg71543.html Originally-by: Alex Deucher <[email protected]> Signed-off-by: Yann Dirson <[email protected]> Acked-by: Harry Wentland <[email protected]> Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-12-13Documentation/gpu: split amdgpu/index for readabilityYann Dirson7-334/+324
This starts to make the formated index much more manageable to the reader. Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Yann Dirson <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-12-13Documentation/gpu: Add amdgpu and dc glossaryRodrigo Siqueira4-0/+332
In the DC driver, we have multiple acronyms that are not obvious most of the time; the same idea is valid for amdgpu. This commit introduces a DC and amdgpu glossary in order to make it easier to navigate through our driver. Changes since V3: - Yann: Add new acronyms to amdgpu glossary - Daniel: Add link between dc and amdgpu glossary Changes since V2: - Add MMHUB Changes since V1: - Yann: Divide glossary based on driver context. - Alex: Make terms more consistent and update CPLIB - Add new acronyms to the glossary Reviewed-by: Yann Dirson <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-12-13Documentation/gpu: Add basic overview of DC pipelineRodrigo Siqueira5-12/+2206
This commit describes how DCN works by providing high-level diagrams with an explanation of each component. In particular, it details the Global Sync signals. Change since V2: - Add a comment about MMHUBBUB. Reviewed-by: Yann Dirson <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-12-13Documentation/gpu: How to collect DTN logRodrigo Siqueira1-0/+17
Introduce how to collect DTN log from debugfs. Reviewed-by: Yann Dirson <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-12-13Documentation/gpu: Document pipe split visual confirmationRodrigo Siqueira1-2/+26
Display core provides a feature that makes it easy for users to debug Pipe Split. This commit introduces how to use such a debug option. Reviewed-by: Yann Dirson <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-12-13Documentation/gpu: Document amdgpu_dm_visual_confirm debugfs entryRodrigo Siqueira1-1/+33
Display core provides a feature that makes it easy for users to debug Multiple planes by enabling a visual notification at the bottom of each plane. This commit introduces how to use such a feature. Reviewed-by: Yann Dirson <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-12-13Documentation/gpu: Reorganize DC documentationRodrigo Siqueira4-0/+411
Display core documentation is not well organized, and it is hard to find information due to the lack of sections. This commit reorganizes the documentation layout, and it is preparation work for future changes. Changes since V1: - Christian: Group amdgpu documentation together. - Daniel: Drop redundant amdgpu prefix. - Jani: Create index pages. - Yann: Mirror display folder in the documentation. Reviewed-by: Yann Dirson <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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