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2024-04-03dt-bindings: arm: Add Emcraft Systems i.MX8M Plus NavQ+ KitGilles Talis1-0/+1
Add DT compatible string for Emcraft NavQ+ kit based on the i.MX8M Plus SoC from NXP Signed-off-by: Gilles Talis <[email protected]> Acked-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2024-04-03dt-bindings: vendor-prefixes: Add Emcraft SystemsGilles Talis1-0/+2
Add an entry for Emcraft Systems (https://www.emcraft.com/) Signed-off-by: Gilles Talis <[email protected]> Acked-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2024-04-02ASoC: dt-bindings: fsl-asoc-card: convert to YAMLShengjiu Wang2-117/+195
Convert the fsl-asoc-card binding to YAML. When testing dtbs_check, found below compatible strings are not listed in document: fsl,imx-sgtl5000 fsl,imx53-cpuvo-sgtl5000 fsl,imx51-babbage-sgtl5000 fsl,imx53-m53evk-sgtl5000 fsl,imx53-qsb-sgtl5000 fsl,imx53-voipac-sgtl5000 fsl,imx6-armadeus-sgtl5000 fsl,imx6-rex-sgtl5000 fsl,imx6-sabreauto-cs42888 fsl,imx6-wandboard-sgtl5000 fsl,imx6dl-nit6xlite-sgtl5000 fsl,imx6q-ba16-sgtl5000 fsl,imx6q-nitrogen6_max-sgtl5000 fsl,imx6q-nitrogen6_som2-sgtl5000 fsl,imx6q-nitrogen6x-sgtl5000 fsl,imx6q-sabrelite-sgtl5000 fsl,imx6q-sabresd-wm8962 fsl,imx6q-udoo-ac97 fsl,imx6q-ventana-sgtl5000 fsl,imx6sl-evk-wm8962 fsl,imx6sx-sdb-mqs fsl,imx6sx-sdb-wm8962 fsl,imx7d-evk-wm8960 karo,tx53-audio-sgtl5000 tq,imx53-mba53-sgtl5000 So add them in yaml file to pass the test. Also correct the 'dai-format' to 'format' in document. For 'audio-routing', the items are not listed. Because this fsl-asoc-card is generic driver, which supports several codecs, if list all the items, there will be a long list. Signed-off-by: Shengjiu Wang <[email protected]> Reviewed-by: Rob Herring <[email protected]> Link: https://msgid.link/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2024-04-02dt-bindings: arm: fsl: add NXP S32G3 boardWadim Mueller1-0/+6
Add bindings for NXP S32G3 Reference Design Board 3 (S32G-VNP-RDB3) [1] [1] https://www.nxp.com/design/design-center/designs/s32g3-vehicle-networking-reference-design:S32G-VNP-RDB3 Signed-off-by: Wadim Mueller <[email protected]> Acked-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2024-04-02dt-bindings: mmc: fsl-imx-esdhc: add NXP S32G3 supportWadim Mueller1-0/+3
Add a compatible string for the SDHC binding of NXP S32G3 platforms. Here we use "nxp,s32g2-usdhc" as fallback since the s32g2-usdhc driver works also on S32G3 platforms. Signed-off-by: Wadim Mueller <[email protected]> Acked-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2024-04-02Merge drm/drm-next into drm-misc-nextThomas Zimmermann457-4337/+12431
Backmerging to get v6.9-rc2 changes into drm-misc-next. Signed-off-by: Thomas Zimmermann <[email protected]>
2024-04-02dt-bindings: ata: ahci-da850: Convert to dtschemaAnimesh Agarwal2-18/+39
Convert the ahci-da850 bindings to DT schema. Signed-off-by: Animesh Agarwal <[email protected]> Reviewed-by: Conor Dooley <[email protected]> Signed-off-by: Damien Le Moal <[email protected]>
2024-04-01dt-bindings: display/msm: sm8150-mdss: add DP nodeDmitry Baryshkov1-0/+9
As Qualcomm SM8150 got support for the DisplayPort, add displayport@ node as a valid child to the MDSS node. Fixes: 88806318e2c2 ("dt-bindings: display: msm: dp: declare compatible string for sm8150") Reviewed-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/586156/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Abhinav Kumar <[email protected]>
2024-04-02dt-bindings: crypto: ice: Document sc7280 inline crypto engineLuca Weiss1-0/+1
Document the compatible used for the inline crypto engine found on SC7280. Signed-off-by: Luca Weiss <[email protected]> Acked-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2024-04-02dt-bindings: crypto: starfive: Add jh8100 supportJia Jie Ho1-2/+28
Add compatible string and additional interrupt for StarFive JH8100 crypto engine. Signed-off-by: Jia Jie Ho <[email protected]> Acked-by: Conor Dooley <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2024-04-01dt-bindings: display: mediatek: gamma: Add support for MT8188Jason-JH.Lin1-0/+4
The gamma LUT setting of MT8188 and MT8195 are the same, so we create a one of items for MT8188 to reuse the driver data settings of MT8195. Signed-off-by: Jason-JH.Lin <[email protected]> Reviewed-by: AngeloGioacchino Del Regno <[email protected]> Acked-by: Krzysztof Kozlowski <[email protected]> Reviewed-by: CK Hu <[email protected]> Link: https://patchwork.kernel.org/project/dri-devel/patch/[email protected]/ Signed-off-by: Chun-Kuang Hu <[email protected]>
2024-04-01dt-bindings: display: mediatek: gamma: Change MT8195 to single enum groupJason-JH.Lin1-0/+1
Since MT8195 gamma has multiple bank for 12 bits LUT and it is different from any other SoC LUT setting. So we add MT8195 compatible to the single enum group to make its driver data settings can be reused by other SoC. Signed-off-by: Jason-JH.Lin <[email protected]> Acked-by: Krzysztof Kozlowski <[email protected]> Reviewed-by: AngeloGioacchino Del Regno <[email protected]> Reviewed-by: CK Hu <[email protected]> Link: https://patchwork.kernel.org/project/dri-devel/patch/[email protected]/ Signed-off-by: Chun-Kuang Hu <[email protected]>
2024-03-31dt-bindings: fpga: xlnx,fpga-selectmap: add DT schemaCharles Perry1-0/+86
Document the SelectMAP interface of Xilinx 7 series FPGA. Signed-off-by: Charles Perry <[email protected]> Reviewed-by: Krzysztof Kozlowski <[email protected]> Acked-by: Xu Yilun <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Xu Yilun <[email protected]>
2024-03-29dt-bindings: net: dwmac: Document STM32 property st,ext-phyclkChristophe Roullier1-0/+7
The Linux kernel dwmac-stm32 driver currently supports three DT properties used to configure whether PHY clock are generated by the MAC or supplied to the MAC from the PHY. Originally there were two properties, st,eth-clk-sel and st,eth-ref-clk-sel, each used to configure MAC clocking in different bus mode and for different MAC clock frequency. Since it is possible to determine the MAC 'eth-ck' clock frequency from the clock subsystem and PHY bus mode from the 'phy-mode' property, two disparate DT properties are no longer required to configure MAC clocking. Linux kernel commit 1bb694e20839 ("net: ethernet: stmmac: simplify phy modes management for stm32") introduced a third, unified, property st,ext-phyclk. This property covers both use cases of st,eth-clk-sel and st,eth-ref-clk-sel DT properties, as well as a new use case for 25 MHz clock generated by the MAC. The third property st,ext-phyclk is so far undocumented, document it. Below table summarizes the clock requirement and clock sources for supported PHY interface modes. __________________________________________________________________________ |PHY_MODE | Normal | PHY wo crystal| PHY wo crystal |No 125Mhz from PHY| | | | 25MHz | 50MHz | | --------------------------------------------------------------------------- | MII | - | eth-ck | n/a | n/a | | | | st,ext-phyclk | | | --------------------------------------------------------------------------- | GMII | - | eth-ck | n/a | n/a | | | | st,ext-phyclk | | | --------------------------------------------------------------------------- | RGMII | - | eth-ck | n/a | eth-ck | | | | st,ext-phyclk | | st,eth-clk-sel or| | | | | | st,ext-phyclk | --------------------------------------------------------------------------- | RMII | - | eth-ck | eth-ck | n/a | | | | st,ext-phyclk | st,eth-ref-clk-sel | | | | | | or st,ext-phyclk | | --------------------------------------------------------------------------- Reviewed-by: Krzysztof Kozlowski <[email protected]> Reviewed-by: Marek Vasut <[email protected]> Signed-off-by: Christophe Roullier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-03-29dt-bindings: net: airoha,en8811h: Add en8811hEric Woudstra1-0/+56
Add the Airoha EN8811H 2.5 Gigabit PHY. The en8811h phy can be set with serdes polarity reversed on rx and/or tx. Signed-off-by: Eric Woudstra <[email protected]> Reviewed-by: Krzysztof Kozlowski <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-03-29dt-bindings: phy: Add QMP UFS PHY comptible for SM8475Danila Tikhonov1-0/+2
Document the QMP UFS PHY compatible for SM8475. Signed-off-by: Danila Tikhonov <[email protected]> Acked-by: Krzysztof Kozlowski <[email protected]> Reviewed-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2024-03-29dt-bindings: display: Add GameForce Chi PanelChris Morgan1-0/+2
The GameForce Chi panel is a panel specific to the GameForce Chi handheld device that measures 3.5" diagonally with a resolution of 640x480. Signed-off-by: Chris Morgan <[email protected]> Acked-by: Rob Herring <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Neil Armstrong <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-03-29dt-bindings: vendor-prefix: Add prefix for GameForceChris Morgan1-0/+2
GameForce is a company that produces handheld game consoles. https://gameforce.fun/ Signed-off-by: Chris Morgan <[email protected]> Acked-by: Rob Herring <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Neil Armstrong <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-03-29dt-bindings: rtc: nxp,lpc1788-rtc: convert to dtschemaJavier Carrasco2-21/+58
Convert existing binding to dtschema to support validation. This is a direct conversion with no additions. Reviewed-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Javier Carrasco <[email protected]> Reviewed-by: Rob Herring <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Alexandre Belloni <[email protected]>
2024-03-29dt-bindings: rtc: digicolor-rtc: move to trivial-rtcJavier Carrasco2-17/+2
Convert existing binding to dtschema to support validation. This device meets the requirements to be moved to trivial-rtc (compatible, reg and a single interrupt). Reviewed-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Javier Carrasco <[email protected]> Reviewed-by: Rob Herring <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Alexandre Belloni <[email protected]>
2024-03-29dt-bindings: rtc: alphascale,asm9260-rtc: convert to dtschemaJavier Carrasco2-19/+50
Convert existing binding to dtschema to support validation. This is a direct conversion with no additions. Reviewed-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Javier Carrasco <[email protected]> Reviewed-by: Rob Herring <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Alexandre Belloni <[email protected]>
2024-03-29dt-bindings: rtc: armada-380-rtc: convert to dtschemaJavier Carrasco2-24/+51
Convert existing binding to dtschema to support validation. This is a direct conversion with no additions. Reviewed-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Javier Carrasco <[email protected]> Reviewed-by: Rob Herring <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Alexandre Belloni <[email protected]>
2024-03-29dt-bindings: bluetooth: add 'qcom,local-bd-address-broken'Johan Hovold1-0/+4
Several Qualcomm Bluetooth controllers lack persistent storage for the device address and instead one can be provided by the boot firmware using the 'local-bd-address' devicetree property. The Bluetooth bindings clearly states that the address should be specified in little-endian order, but due to a long-standing bug in the Qualcomm driver which reversed the address some boot firmware has been providing the address in big-endian order instead. The only device out there that should be affected by this is the WCN3991 used in some Chromebooks. Add a 'qcom,local-bd-address-broken' property which can be set on these platforms to indicate that the boot firmware is using the wrong byte order. Note that ChromeOS always updates the kernel and devicetree in lockstep so that there is no need to handle backwards compatibility with older devicetrees. Reviewed-by: Douglas Anderson <[email protected]> Signed-off-by: Johan Hovold <[email protected]> Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Luiz Augusto von Dentz <[email protected]>
2024-03-29dt-bindings: gpio: mpfs: allow gpio-line-namesJamie Gibbons1-0/+1
The BeagleV Fire devicetree will make use of gpio-line-names, allow it in the binding. Signed-off-by: Jamie Gibbons <[email protected]> Signed-off-by: Conor Dooley <[email protected]> Acked-by: Rob Herring <[email protected]> Signed-off-by: Bartosz Golaszewski <[email protected]>
2024-03-29dt-bindings: gpio: mpfs: add coreGPIO supportJamie Gibbons1-3/+13
The GPIO controllers on PolarFire SoC were based on the "soft" IP CoreGPIO, but the inp/outp registers are at different offsets. Add compatible to allow for support of both sets of offsets. The soft core will not always have interrupts wired up, so only enforce them for the "hard" core on PolarFire SoC. Signed-off-by: Jamie Gibbons <[email protected]> Signed-off-by: Conor Dooley <[email protected]> Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Bartosz Golaszewski <[email protected]>
2024-03-29dt-bindings: arm: fsl: Add Seeed studio NPi based boardsParthiban Nallathambi1-0/+8
NPi i.MX6ULL eMMC/NAND is Seed Studios SoM using i.MX6ULL. Development baords can be either based on NAND or eMMC SoM. Signed-off-by: Parthiban Nallathambi <[email protected]> Reviewed-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2024-03-29ASoC: nau8325: Modify driver code and dtschema.Mark Brown1-0/+80
Merge series from Seven Lee <[email protected]>: Add a driver for the Nuvoton NAU88325.
2024-03-28dt-bindings: net: renesas,etheravb: Add optional MDIO bus nodeNiklas Söderlund1-2/+10
The Renesas Ethernet AVB bindings do not allow the MDIO bus to be described. This has not been needed as only a single PHY is supported and no MDIO bus properties have been needed. Add an optional mdio node to the binding which allows the MDIO bus to be described and allow bus properties to be set. Signed-off-by: Niklas Söderlund <[email protected]> Reviewed-by: Sergey Shtylyov <[email protected]> Reviewed-by: Rob Herring <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-03-29dt-bindings: phy: qcom-edp: Add X1E80100 PHY compatiblesAbel Vesa1-0/+1
The Qualcomm X1E80100 platform has multiple PHYs that can work in both eDP or DP mode, so document their compatible. Signed-off-by: Abel Vesa <[email protected]> Acked-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2024-03-29dt-bindings: phy: qcom,snps-eusb2-repeater: Add compatible for SMB2360Abel Vesa1-1/+3
Add a dt-bindings compatible string for the Qualcomm's SMB2360 PMIC. Acked-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Abel Vesa <[email protected]> Link: https://lore.kernel.org/r/20240220-phy-qualcomm-eusb2-repeater-smb2360-v2-1-213338ca1d5f@linaro.org Signed-off-by: Vinod Koul <[email protected]>
2024-03-29dt-bindings: phy: add binding for the i.MX8MP HDMI PHYLucas Stach1-0/+62
Add a DT binding for the HDMI PHY found on the i.MX8MP SoC. Signed-off-by: Lucas Stach <[email protected]> Signed-off-by: Adam Ford <[email protected]> Reviewed-by: Krzysztof Kozlowski <[email protected]> Reviewed-by: Luca Ceresoli <[email protected]> Tested-by: Tommaso Merciai <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2024-03-28ASoC: dt-bindings: fsl-sai: allow only one dma-namesFrank Li1-4/+2
Some sai only connect one direction dma (rx/tx) in SOC. For example: imx8qxp sai5 only connect tx dma channel. So allow only one "rx" or "tx" for dma-names. Remove description under dmas because no user use index to get dma channel. All user use 'dma-names' to get correct dma channel. dma-names already in 'required' list. Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Frank Li <[email protected]> Link: https://msgid.link/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2024-03-28ASoC: dt-bindings: fsl,imx-asrc: update max interrupt numbersFrank Li1-1/+19
fsl,imx8qxp-spdif and fsl,imx8qm-spdif have 2 interrupts. Other platforms have 1 interrupt. Increase max interrupt number to 2 and add restriction for platforms except i.MX8QXP and i.MX8QM. Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Frank Li <[email protected]> Link: https://msgid.link/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2024-03-28ASoC: dt-bindings: fsl,imx-asrc/spdif: Add power-domains propertyFrank Li2-0/+29
Add power-domains property for asrc and spdif since fsl,imx8qm-asrc/spdif and fsl,imx8qxp-asrc/spdif require 'power-domains'. Set 'power-domains' as required property for compatible string fsl,imx8qm-asrc/spdif and fsl,imx8qxp-asrc/spdif. Acked-by: Conor Dooley <[email protected]> Signed-off-by: Frank Li <[email protected]> Link: https://msgid.link/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2024-03-28ASoC: dt-bindings: Added schema for "nuvoton,nau8325"Seven Lee1-0/+80
Add a DT schema for describing nau8325 audio amplifiers. The key features are as follows: - Low SPK_VDD Quiescent Current - Gain Setting with 2-wire interface - Powerful Stereo Class-D Amplifier - Low Output Noise - Low Current Shutdown Mode - Click-and Pop Suppression More resources : https://www.nuvoton.com/products/smart-home-audio/audio-amplifiers/class-d-series/nau8325yg/ Signed-off-by: Seven Lee <[email protected]> Reviewed-by: Rob Herring <[email protected]> Link: https://msgid.link/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2024-03-28dt-bindings: iio: dac: ti,dac5571: Add DAC081C081 supportLaurent Pinchart1-0/+1
The DAC081C081 is a TI DAC whose software interface is compatible with the DAC5571. It is the 8-bit version of the DAC121C081, already supported by the DAC5571 bindings. Extends the bindings to support this chip. Signed-off-by: Laurent Pinchart <[email protected]> Reviewed-by: Sean Nyekjaer <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2024-03-28dt-bindings: iio: health: maxim,max30102: add max30101Javier Carrasco1-4/+8
The Maxim max30101 is the replacement for the max30105, which is no longer recommended for future designs. The max30101 does not require new properties, and it can be described with the existing ones for the max30105, which will be used as a fallback compatible. Signed-off-by: Javier Carrasco <[email protected]> Reviewed-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2024-03-28regulator: Merge axp20x changesMark Brown1-0/+2
There will be at least one incremental change on top of some MFD overlapping device additions for this driver so merge now. Merge tag 'ib-mfd-regulator-v6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd into regulator-6.10
2024-03-28dt-bindings: mfd: x-powers,axp152: Document AXP717Andre Przywara1-0/+2
The X-Powers AXP717 is a PMIC used on some newer Allwinner devices. Among quite some regulators it features the usual ADC/IRQ/power key parts, plus a battery charger circuit, and some newly introduced USB type-C circuitry. Like two other recent PMICs, it lacks the DC/DC converter PWM frequency control register, that rate is fixed here as well. Add the new compatible string, and add that to the list of PMICs without the PWM frequency property. Signed-off-by: Andre Przywara <[email protected]> Acked-by: Krzysztof Kozlowski <[email protected]> Tested-by: Ryan Walklin <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Lee Jones <[email protected]>
2024-03-28dt-bindings: pinctrl: qcom,pmic-gpio: Add PMIH0108 and PMD8028 supportAnjelique Melendez1-0/+20
Update the Qualcomm Technologies, Inc. PMIC GPIO binding documentation to include compatible strings for PMIH0108 and PMD8028 PMICs. Signed-off-by: Anjelique Melendez <[email protected]> Reviewed-by: Krzysztof Kozlowski <[email protected]> Message-ID: <[email protected]> Signed-off-by: Linus Walleij <[email protected]>
2024-03-28dt-bindings: pinctrl: qcom,pmic-gpio: Add PMXR2230 and PM6450 supportDavid Collins1-0/+6
Update the Qualcomm Technologies, Inc. PMIC GPIO binding documentation to include compatible strings for PMXR2230 and PM6450 PMICs. Signed-off-by: David Collins <[email protected]> Signed-off-by: Anjelique Melendez <[email protected]> Acked-by: Krzystof Kozlowski <[email protected]> Acked-by: Krzysztof Kozlowski <[email protected]> Message-ID: <[email protected]> Signed-off-by: Linus Walleij <[email protected]>
2024-03-28dt-bindings: pinctrl: qcom: update functions to match with driverTengfei Fan1-34/+18
Some functions were consolidated in the SM4450 pinctrl driver, but they had not been updated in the binding file before the previous SM4450 pinctrl patch series was merged. Update functions in this binding file to match with SM4450 pinctrl driver. Some functions need to be consolidated and some functions need to be removed. The following functions are removed: - atest_char0, atest_char1, atest_char2, atest_char3 - atest_usb00, atest_usb01, atest_usb02, atest_usb03 - audio_ref - cci_async - cci_timer0, cci_timer1, cci_timer2, cci_timer3, cci_timer4 - cmu_rng0, cmu_rng1, cmu_rng2, cmu_rng3 - coex_uart1 - cri_trng0, cri_trng1 - dbg_out - ddr_pxi0, ddr_pxi1 - dp0_hot - gcc_gp1, gcc_gp2, gcc_gp3 - ibi_i3c - jitter_bist - mdp_vsync0, mdp_vsync1, mdp_vsync2, mdp_vsync3 - mi2s0_data0, mi2s0_data1, mi2s0_sck, mi2s0_ws, mi2s2_data0, mi2s2_data1, mi2s2_sck, mi2s2_ws, mi2s_mclk0, mi2s_mclk1 - nav_gpio0, nav_gpio1, nav_gpio2 - phase_flag0, phase_flag1, phase_flag10, phase_flag11, phase_flag12, phase_flag13, phase_flag14, phase_flag15, phase_flag16, phase_flag17, phase_flag18, phase_flag19, phase_flag2, phase_flag20, phase_flag21, phase_flag22, phase_flag23, phase_flag24, phase_flag25, phase_flag26, phase_flag27, phase_flag28, phase_flag29, phase_flag3, phase_flag30, phase_flag31, phase_flag4, phase_flag5, phase_flag6, phase_flag7, phase_flag8, phase_flag9 - pll_bist, pll_clk - prng_rosc0, prng_rosc1, prng_rosc2, prng_rosc3 - qdss_gpio0, qdss_gpio1, qdss_gpio10, qdss_gpio11, qdss_gpio12, qdss_gpio13, qdss_gpio14, qdss_gpio15, qdss_gpio2, qdss_gpio3, qdss_gpio4, qdss_gpio5, qdss_gpio6, qdss_gpio7, qdss_gpio8, qdss_gpio9 - qlink0_wmss - qup0_se5, qup0_se6, qup0_se7, qup1_se5, qup1_se6 - sd_write - tb_trig - tgu_ch0, tgu_ch1, tgu_ch2, tgu_ch3 - tmess_prng0, tmess_prng1, tmess_prng2, tmess_prng3 - tsense_pwm1, tsense_pwm2 - uim0_clk, uim0_data, uim0_present, uim0_reset, uim1_clk, uim1_data, uim1_present, uim1_reset - usb0_hs, usb0_phy - vsense_trigger The following functions are added: - atest_char - atest_usb0 - audio_ref_clk - cci - cci_async_in0 - cmu_rng - coex_uart1_rx, coex_uart1_tx - dbg_out_clk - ddr_pxi0_test, ddr_pxi1_test - gcc_gp1_clk, gcc_gp2_clk, gcc_gp3_clk - ibi_i3c_qup0, ibi_i3c_qup1 - jitter_bist_ref - mdp_vsync - nav - phase_flag - pll_bist_sync, pll_clk_aux - prng_rosc - qlink0_wmss_reset - sd_write_protect - tb_trig_sdc1, tb_trig_sdc2 - tgu_ch0_trigout, tgu_ch1_trigout, tgu_ch2_trigout, tgu_ch3_trigout - tmess_prng - tsense_pwm1_out, tsense_pwm2_out - uim0, uim1 - usb0_hs_ac, usb0_phy_ps - vsense_trigger_mirnat - wlan1_adc_dtest0, wlan1_adc_dtest1 Fixes: 7bf8b78f86db ("dt-bindings: pinctrl: qcom: Add SM4450 pinctrl") Signed-off-by: Tengfei Fan <[email protected]> Acked-by: Krzysztof Kozlowski <[email protected]> Message-ID: <[email protected]> Signed-off-by: Linus Walleij <[email protected]>
2024-03-27dt-bindings: ufs: qcom: document SM6125 UFSKrzysztof Kozlowski1-0/+2
Document already upstreamed and used Qualcomm SM6125 UFS host controller to fix dtbs_check warnings like: sm6125-xiaomi-laurel-sprout.dtb: ufs@4804000: compatible:0: 'qcom,sm6125-ufshc' is not one of ['qcom,msm8994-ufshc', ... sm6125-xiaomi-laurel-sprout.dtb: ufs@4804000: Unevaluated properties are not allowed ('compatible' was unexpected) Signed-off-by: Krzysztof Kozlowski <[email protected]> Acked-by: Krzysztof Kozlowski <[email protected]> Reviewed-by: Krzysztof Kozlowski <[email protected]> Reviewed-by: Martin Botka <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Rob Herring <[email protected]>
2024-03-27dt-bindings: ufs: qcom: document SC7180 UFSKrzysztof Kozlowski1-4/+30
Document already upstreamed and used Qualcomm SC7180 UFS host controller to fix dtbs_check warnings like: sc7180-idp.dtb: ufshc@1d84000: compatible:0: 'qcom,sc7180-ufshc' is not one of ... sc7180-idp.dtb: ufshc@1d84000: clocks: [[39, 99], [39, 7], [39, 98], [39, 107], [36, 0], [39, 106], [39, 105]] is too short sc7180-idp.dtb: ufshc@1d84000: clock-names: ['core_clk', 'bus_aggr_clk', 'iface_clk', 'core_clk_unipro', ...] is too short Signed-off-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Rob Herring <[email protected]>
2024-03-27dt-bindings: ufs: qcom: document SC8180X UFSKrzysztof Kozlowski1-0/+2
Document already upstreamed and used Qualcomm SC8180x UFS host controller to fix dtbs_check warnings like: sc8180x-primus.dtb: ufshc@1d84000: compatible:0: 'qcom,sc8180x-ufshc' is not one of ['qcom,msm8994-ufshc', ... ] sc8180x-primus.dtb: ufshc@1d84000: Unevaluated properties are not allowed ('compatible' was unexpected) Signed-off-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Rob Herring <[email protected]>
2024-03-27ASoC: dt-bindings: xmos,xvf3500: add XMOS XVF3500 voice processorJavier Carrasco1-0/+63
The XMOS XVF3500 VocalFusion Voice Processor[1] is a low-latency, 32-bit multicore controller for voice processing. Add new bindings to define the device properties. [1] https://www.xmos.com/xvf3500/ Reviewed-by: Krzysztof Kozlowski <[email protected]> Acked-by: Mark Brown <[email protected]> Signed-off-by: Javier Carrasco <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2024-03-27dt-bindings: usb: ci-hdrc-usb2-imx: add compatible and clock-names ↵Xu Yang1-0/+18
restriction for imx93 The i.MX93 needs a wakup clock to work properly. This will add compatible and restriction for i.MX93 platform. Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Xu Yang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2024-03-27dt-bindings: usb: ci-hdrc-usb2-imx: add restrictions for reg, interrupts, ↵Xu Yang1-0/+76
clock and clock-names properties Add restrictions for reg, interrupts, clock and clock-names properties for imx Socs. Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Xu Yang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2024-03-27dt-bindings: usb: chipidea,usb2-imx: move imx parts to dedicated schemaXu Yang3-357/+396
As more and more NXP i.MX chips come out, it becomes harder to maintain ci-hdrc-usb2.yaml if more stuffs like property restrictions are added to this file. This will separate i.MX parts out of ci-hdrc-usb2.yaml and add a new schema for NXP ChipIdea USB2 Controller, also add a common schema. 1. Copy common ci-hdrc-usb2.yaml properties to a new shared chipidea,usb2-common.yaml schema. 2. Move fsl,* compatible devices and imx spefific properties to dedicated binding file chipidea,usb2-imx.yaml. Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Xu Yang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2024-03-27dt-bindings: usb: renesas,usbhs: Document RZ/G2L family compatibleBiju Das1-1/+5
The USBHS IP found on RZ/G2L SoCs only has 10 pipe buffers compared to 16 pipe buffers on RZ/A2M. Document renesas,rzg2l-usbhs family compatible to handle this difference for RZ/G2L family SoCs. Signed-off-by: Biju Das <[email protected]> Acked-by: Krzysztof Kozlowski <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
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