| Age | Commit message (Collapse) | Author | Files | Lines |
|
Most NVMEM providers have cells at hardcoded addresses however there are
some exceptions. Some devices store cells layout in internal structs
using custom formats.
It's important to allow NVMEM consumers to still reference such NVMEM
cells. Making "reg" optional allows defining NVMEM cells by their names
only and using them with phandles.
Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: Rafał Miłecki <[email protected]>
Signed-off-by: Srinivas Kandagatla <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>
|
|
1. Remove the unnecessary header file for dt-binding check
2. Replace OTPRX with 0x15 since it is not defined here.
3. Modify the name of the node of the clock driver.
Fixes: 8fb29b450182 ("dt-bindings: nvmem: Add bindings doc for Sunplus OCOTP driver")
Reported-by: Rob Herring <[email protected]>
Signed-off-by: Vincent Shih <[email protected]>
Signed-off-by: Srinivas Kandagatla <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>
|
|
Add bindings doc for Sunplus OCOTP driver
Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: Vincent Shih <[email protected]>
Signed-off-by: Srinivas Kandagatla <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>
|
|
The Security Fuse Processor provides efuses and is responsible for
reading it at SoC startup and configuring it accordingly.
Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: Michael Walle <[email protected]>
Signed-off-by: Srinivas Kandagatla <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>
|
|
D1 has a SID like other Allwinner SoCs, but with a unique eFuse layout.
Add a new compatible string for it.
Acked-by: Rob Herring <[email protected]>
Signed-off-by: Samuel Holland <[email protected]>
Signed-off-by: Srinivas Kandagatla <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>
|
|
Drop the child node schema. The schema for child nodes is already
defined by nvmem.yaml and doesn't need to be duplicated in the
qcom,spmi-sdam schema.
Signed-off-by: Rob Herring <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree fixes and cleanups from Rob Herring:
- Fix a regression when probing a child device reusing the parent
device's DT node pointer
- Refactor of_parse_phandle*() variants to static inlines
- Drop Enric Balletbo i Serra as a maintainer
- Fix DT schemas with arrays incorrectly encoded as a matrix
- Drop unneeded pinctrl properties from schemas
- Add SPI peripheral schema to SPI based displays
- Clean-up several schema examples
- Clean-up trivial-devices.yaml comments
- Add missing, in use vendor prefixes: Wingtech, Thundercomm, Huawei,
F(x)tec, 8devices
* tag 'devicetree-fixes-for-5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux:
dt-bindings: google,cros-ec: drop Enric Balletbo i Serra from maintainers
dt-bindings: display: bridge: drop Enric Balletbo i Serra from maintainers
of: Check 'of_node_reused' flag on of_match_device()
of: property: define of_property_read_u{8,16,32,64}_array() unconditionally
of: base: make small of_parse_phandle() variants static inline
dt-bindings: mfd: cirrus,madera: Fix 'interrupts' in example
dt-bindings: Fix array schemas encoded as matrices
dt-bindings: Drop unnecessary pinctrl properties
dt-bindings: rtc: st,stm32-rtc: Make each example a separate entry
dt-bindings: mmc: arm,pl18x: Make each example a separate entry
dt-bindings: display: Add SPI peripheral schema to SPI based displays
scripts/dtc: dtx_diff: remove broken example from help text
dt-bindings: trivial-devices: fix double spaces in comments
dt-bindings: trivial-devices: fix swapped comments
dt-bindings: vendor-prefixes: add Wingtech
dt-bindings: vendor-prefixes: add Thundercomm
dt-bindings: vendor-prefixes: add Huawei
dt-bindings: vendor-prefixes: add F(x)tec
dt-bindings: vendor-prefixes: add 8devices
dt-bindings: power: reset: gpio-restart: Correct default priority
|
|
The YAML DT encoding has leaked into some array properties. Properties
which are defined as an array should have a schema that's just an array.
That means there should only be a single level of 'minItems',
'maxItems', and/or 'items'.
Signed-off-by: Rob Herring <[email protected]>
Acked-by: Marc Kleine-Budde <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
|
|
With 'unevaluatedProperties' support implemented, the following warnings
are generated in the nvmem examples:
Documentation/devicetree/bindings/nvmem/st,stm32-romem.example.dt.yaml: efuse@1fff7800: Unevaluated properties are not allowed ('reg' was unexpected)
Documentation/devicetree/bindings/nvmem/rmem.example.dt.yaml: nvram@10000000: Unevaluated properties are not allowed ('reg' was unexpected)
Documentation/devicetree/bindings/nvmem/brcm,nvram.example.dt.yaml: nvram@1eff0000: Unevaluated properties are not allowed ('reg' was unexpected)
Add the missing 'reg' property definition.
Cc: Srinivas Kandagatla <[email protected]>
Cc: Maxime Coquelin <[email protected]>
Cc: Alexandre Torgue <[email protected]>
Cc: Rafał Miłecki <[email protected]>
Cc: Saenz Julienne <[email protected]>
Cc: Fabrice Gasnier <[email protected]>
Cc: [email protected]
Cc: [email protected]
Reviewed-by: Fabrice Gasnier <[email protected]>
Reviewed-by: Thierry Reding <[email protected]>
Signed-off-by: Rob Herring <[email protected]>
Signed-off-by: Srinivas Kandagatla <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>
|
|
Add compatible for mt8195
Acked-by: Rob Herring <[email protected]>
Signed-off-by: Chunfeng Yun <[email protected]>
Signed-off-by: Srinivas Kandagatla <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>
|
|
Add support bits property, will satisfy more consumers.
Acked-by: Rob Herring <[email protected]>
Signed-off-by: Chunfeng Yun <[email protected]>
Signed-off-by: Srinivas Kandagatla <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>
|
|
Not all @st.com email address are concerned, only people who have
a specific @foss.st.com email will see their entry updated.
For some people, who left the company, remove their email.
Cc: Alexandre Torgue <[email protected]>
Cc: Arnaud Pouliquen <[email protected]>
Cc: Fabien Dessenne <[email protected]>
Cc: Christophe Roullier <[email protected]>
Cc: Gabriel Fernandez <[email protected]>
Cc: Lionel Debieve <[email protected]>
Cc: Amelie Delaunay <[email protected]>
Cc: Pierre-Yves MORDRET <[email protected]>
Cc: Ludovic Barre <[email protected]>
Cc: Christophe Kerello <[email protected]>
Cc: pascal Paillet <[email protected]>
Cc: Erwan Le Ray <[email protected]>
Cc: Philippe CORNU <[email protected]>
Cc: Yannick Fertre <[email protected]>
Cc: Fabrice Gasnier <[email protected]>
Cc: Olivier Moysan <[email protected]>
Cc: Hugues Fruchet <[email protected]>
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Mathieu Poirier <[email protected]>
Acked-by: Krzysztof Kozlowski <[email protected]>
Acked-by: Mark Brown <[email protected]>
Acked-by: Lee Jones <[email protected]>
Acked-By: Vinod Koul <[email protected]>
Acked-by: Miquel Raynal <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Rob Herring <[email protected]>
|
|
Tidy up a bit the tree, by prefixing all include/dt-bindings/clock/ files
related to Ingenic SoCs with 'ingenic,'.
Signed-off-by: Paul Cercueil <[email protected]>
Acked-by: Rob Herring <[email protected]>
Acked-by: Stephen Boyd <[email protected]>
Signed-off-by: Rob Herring <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree updates from Rob Herring:
- Refactor arch kdump DT related code to a common implementation
- Add fw_devlink tracking for 'phy-handle', 'leds', 'backlight',
'resets', and 'pwm' properties
- Various clean-ups to DT FDT code
- Fix a runtime error for !CONFIG_SYSFS
- Convert Synopsys DW PCI and derivative binding docs to schemas. Add
Toshiba Visconti PCIe binding.
- Convert a bunch of memory controller bindings to schemas
- Covert eeprom-93xx46, Samsung Exynos TRNG, Samsung Exynos IRQ
combiner, arm-charlcd, img-ascii-lcd, UniPhier eFuse, Xilinx Zynq
MPSoC FPGA, Xilinx Zynq MPSoC reset, Mediatek mmsys, Gemini boards,
brcm,iproc-i2c, faraday,ftpci100, and ks8851 net to DT schema.
- Extend nvmem bindings to handle bit offsets in unit-addresses
- Add DT schemas for HiKey 970 PCIe PHY
- Remove unused ZTE, energymicro,efm32-timer, and Exynos SATA bindings
- Enable dtc pci_device_reg warning by default
- Fixes for handling 'unevaluatedProperties' in preparation to enable
pending support in the tooling for jsonschema 2020-12 draft
* tag 'devicetree-for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (78 commits)
dt-bindings: display: remove zte,vou.txt binding doc
dt-bindings: hwmon: merge max1619 into trivial devices
dt-bindings: mtd-physmap: Add 'arm,vexpress-flash' compatible
dt-bindings: PCI: imx6: convert the imx pcie controller to dtschema
dt-bindings: Use 'enum' instead of 'oneOf' plus 'const' entries
dt-bindings: Add vendor prefix for Topic Embedded Systems
of: fdt: Rename reserve_elfcorehdr() to fdt_reserve_elfcorehdr()
arm64: kdump: Remove custom linux,usable-memory-range handling
arm64: kdump: Remove custom linux,elfcorehdr handling
riscv: Remove non-standard linux,elfcorehdr handling
of: fdt: Use IS_ENABLED(CONFIG_BLK_DEV_INITRD) instead of #ifdef
of: fdt: Add generic support for handling usable memory range property
of: fdt: Add generic support for handling elf core headers property
crash_dump: Make elfcorehdr address/size symbols always visible
dt-bindings: memory: convert Samsung Exynos DMC to dtschema
dt-bindings: devfreq: event: convert Samsung Exynos PPMU to dtschema
dt-bindings: devfreq: event: convert Samsung Exynos NoCP to dtschema
kbuild: Enable dtc 'pci_device_reg' warning by default
dt-bindings: soc: remove obsolete zte zx header
dt-bindings: clock: remove obsolete zte zx header
...
|
|
Both of these consoles use the exact same two registers, even at the
same address, but the Wii U has eight banks of 128 bytes memory while
the Wii only has one, hence the two compatible strings.
Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: Emmanuel Gil Peyrot <[email protected]>
Signed-off-by: Srinivas Kandagatla <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>
|
|
qfprom devices on some SoCs need to vote on the performance state
of a power-domain, so add the power-domains optional property to the
bindings
Reviewed-by: Douglas Anderson <[email protected]>
Acked-by: Rob Herring <[email protected]>
Signed-off-by: Rajendra Nayak <[email protected]>
Signed-off-by: Srinivas Kandagatla <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>
|
|
Convert the UniPhier eFuse binding to DT schema format.
Cc: Keiji Hayashibara <[email protected]>
Signed-off-by: Kunihiko Hayashi <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Rob Herring <[email protected]>
|
|
Allow to extend expression of sub nodes to optionally indicate bit
position. This extension is needed to distinguish between different bit
positions in the same address.
For example, there are two nvmem nodes starting with bit 4 and bit 0
at the same address 0x54. In this case, it can be expressed as follows.
trim@54,4 {
reg = <0x54 1>;
bits = <4 2>;
};
trim@54,0 {
reg = <0x54 1>;
bits = <0 4>;
};
Signed-off-by: Kunihiko Hayashi <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Rob Herring <[email protected]>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC fixes from Arnd Bergmann:
"Only a small number of fixes so far, including some that I had applied
during the merge window, so this is based on the original merge of the
other branches.
- The largest change is a fix for a reference counting bug in the AMD
TEE driver.
- Neil Armstrong now co-maintains Amlogic SoC support
- Two build warning fixes for renesas device tree files
- A sign expansion bug for optee
- A DT binding fix for a mismerge"
* tag 'arm-soc-fixes-5.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
ARM: npcm: wpcm450: select interrupt controller driver
MAINTAINERS: ARM/Amlogic SoCs: add Neil as primary maintainer
tee: amdtee: unload TA only when its refcount becomes 0
dt-bindings: nvmem: mediatek: remove duplicate mt8192 line
firmware: arm_scmi: Remove duplicate declaration of struct scmi_protocol_handle
firmware: arm_scpi: Prevent the ternary sign expansion bug
arm64: dts: renesas: Add port@0 node for all CSI-2 nodes to dtsi
arm64: dts: renesas: aistarvision-mipi-adapter-2.1: Fix CSI40 ports
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree updates from Rob Herring:
- Refactor powerpc and arm64 kexec DT handling to common code. This
enables IMA on arm64.
- Add kbuild support for applying DT overlays at build time. The first
user are the DT unittests.
- Fix kerneldoc formatting and W=1 warnings in drivers/of/
- Fix handling 64-bit flag on PCI resources
- Bump dtschema version required to v2021.2.1
- Enable undocumented compatible checks for dtbs_check. This allows
tracking of missing binding schemas.
- DT docs improvements. Regroup the DT docs and add the example schema
and DT kernel ABI docs to the doc build.
- Convert Broadcom Bluetooth and video-mux bindings to schema
- Add QCom sm8250 Venus video codec binding schema
- Add vendor prefixes for AESOP, YIC System Co., Ltd, and Siliconfile
Technologies Inc.
- Cleanup of DT schema type references on common properties and
standard unit properties
* tag 'devicetree-for-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (64 commits)
powerpc: If kexec_build_elf_info() fails return immediately from elf64_load()
powerpc: Free fdt on error in elf64_load()
of: overlay: Fix kerneldoc warning in of_overlay_remove()
of: linux/of.h: fix kernel-doc warnings
of/pci: Add IORESOURCE_MEM_64 to resource flags for 64-bit memory addresses
dt-bindings: bcm4329-fmac: add optional brcm,ccode-map
docs: dt: update writing-schema.rst references
dt-bindings: media: venus: Add sm8250 dt schema
of: base: Fix spelling issue with function param 'prop'
docs: dt: Add DT API documentation
of: Add missing 'Return' section in kerneldoc comments
of: Fix kerneldoc output formatting
docs: dt: Group DT docs into relevant sub-sections
docs: dt: Make 'Devicetree' wording more consistent
docs: dt: writing-schema: Include the example schema in the doc build
docs: dt: writing-schema: Remove spurious indentation
dt-bindings: Fix reference in submitting-patches.rst to the DT ABI doc
dt-bindings: ddr: Add optional manufacturer and revision ID to LPDDR3
dt-bindings: media: video-interfaces: Drop the example
devicetree: bindings: clock: Minor typo fix in the file armada3700-tbg-clock.txt
...
|
|
The same patch was accidentally merged twice, resulting in a
duplicate line for the mt8192 SoC.
Fixes: f2674c0c7488 ("dt-bindings: nvmem: mediatek: add support for MediaTek mt8192 SoC")
Fixes: 2a1405a14c3a ("dt-bindings: nvmem: mediatek: add support for MediaTek mt8192 SoC")
Signed-off-by: Arnd Bergmann <[email protected]>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux
Pull mtd updates from Miquel Raynal:
"MTD core:
- Handle possible -EPROBE_DEFER from parse_mtd_partitions()
- Constify buf in mtd_write_user_prot_reg()
- Constify name param in mtd_bdi_init
- Fix fall-through warnings for Clang
- Get rid of Big MTD Lock ouf of mtdchar
- Drop mtd_mutex usage from mtdchar_open()
- Don't lock when recursively deleting partitions
- Use module_mtd_blktrans() to register driver when relevant
- Parse MTD as NVMEM cells
- New OTP (one-time-programmable) erase ioctl
- Require write permissions for locking and badblock ioctls
- physmap:
- Fix error return code of physmap_flash_remove()
- physmap-bt1-rom: Fix unintentional stack access
- ofpart parser:
- Support Linksys Northstar partitions
- Make symbol 'bcm4908_partitions_quirks' static
- Limit parsing of deprecated DT syntax
- Support BCM4908 fixed partitions
- Qcom parser:
- Incompatible with spi-nor 4k sectors
- Fix error condition
- Extend Qcom SMEM parser to SPI flash
CFI:
- Disable broken buffered writes for CFI chips within ID 0x2201
- Address a Coverity report for unused value
SPI NOR core:
- Add OTP support
- Fix module unload while an op in progress
- Add various cleanup patches
- Add Michael and Pratyush as designated reviewers in MAINTAINERS
SPI NOR controller drivers:
- intel-spi:
- Move platform data header to x86 subfolder
NAND core:
- Fix error handling in nand_prog_page_op() (x2)
- Add a helper to retrieve the number of ECC bytes per step
- Add a helper to retrieve the number of ECC steps
- Let ECC engines advertize the exact number of steps
- ECC Hamming:
- Populate the public nsteps field
- Use the public nsteps field
- ECC BCH:
- Populate the public nsteps field
- Use the public nsteps field
Raw NAND core:
- Add support for secure regions in NAND memory
- Try not to use the ECC private structures
- Remove duplicate include in rawnand.h
- BBT:
- Skip bad blocks when searching for the BBT in NAND (APPLIED THEN REVERTED)
Raw NAND controller drivers:
- Qcom:
- Convert bindings to YAML
- Use dma_mapping_error() for error check
- Add missing nand_cleanup() in error path
- Return actual error code instead of -ENODEV
- Update last code word register
- Add helper to configure location register
- Rename parameter name in macro
- Add helper to check last code word
- Convert nandc to chip in Read/Write helper
- Update register macro name for 0x2c offset
- GPMI:
- Fix a double free in gpmi_nand_init
- Rockchip:
- Use flexible-array member instead of zero-length array
- Atmel:
- Update ecc_stats.corrected counter
- MXC:
- Remove unneeded of_match_ptr()
- R852:
- replace spin_lock_irqsave by spin_lock in hard IRQ
- Brcmnand:
- Move to polling in pio mode on oops write
- Read/write oob during EDU transfer
- Fix OOB R/W with Hamming ECC
- FSMC:
- Fix error code in fsmc_nand_probe()
- OMAP:
- Use ECC information from the generic structures
SPI-NAND core:
- Add missing MODULE_DEVICE_TABLE()
SPI-NAND drivers:
- gigadevice: Support GD5F1GQ5UExxG"
* tag 'mtd/for-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (89 commits)
Revert "mtd: rawnand: bbt: Skip bad blocks when searching for the BBT in NAND"
mtd: core: Constify buf in mtd_write_user_prot_reg()
Revert "mtd: spi-nor: macronix: Add support for mx25l51245g"
mtd: spi-nor: core: Fix an issue of releasing resources during read/write
mtd: cfi_cmdset_0002: remove redundant assignment to variable timeo
mtd: cfi_cmdset_0002: Disable buffered writes for AMD chip 0x2201
mtd: rawnand: qcom: Use dma_mapping_error() for error check
mtd: rawnand: gpmi: Fix a double free in gpmi_nand_init
mtd: rawnand: qcom: Add missing nand_cleanup() in error path
mtd: rawnand: Add support for secure regions in NAND memory
dt-bindings: mtd: Add a property to declare secure regions in NAND chips
dt-bindings: mtd: Convert Qcom NANDc binding to YAML
mtd: spi-nor: winbond: add OTP support to w25q32fw/jw
mtd: spi-nor: implement OTP support for Winbond and similar flashes
mtd: spi-nor: add OTP support
mtd: spi-nor: swp: Improve code around spi_nor_check_lock_status_sr()
mtd: spi-nor: Move Software Write Protection logic out of the core
mtd: rawnand: bbt: Skip bad blocks when searching for the BBT in NAND
include: linux: mtd: Remove duplicate include of nand.h
mtd: parsers: ofpart: support Linksys Northstar partitions
...
|
|
Pull ARM devicetree updates from Arnd Bergmann:
"There are six new SoCs added this time.
Apple M1 and Nuvoton WPCM450 have separate branches because they are
new SoC families that require changes outside of device tree files.
The other four are variations of already supported chips and get
merged through this branch:
- STMicroelectronics STM32H750 is one of many variants of STM32
microcontrollers based on the Cortex-M7 core.
This is particularly notable since we rarely add support for new
MMU-less chips these days. In this case, the board that gets added
along with the platform is not a SoC reference platform but the
"Art Pi" (https://art-pi.gitee.io/website/) machine that was
originally design for the RT-Thread RTOS.
- NXP i.MX8QuadMax is a variant of the growing i.MX8
embedded/industrial SoC family, using two Cortex-A72 and four
Cortex-A53 cores.
It gets added along with its reference board, the "NXP i.MX8QuadMax
Multisensory Enablement Kit".
- Qualcomm SC7280 is a Laptop SoC following the SC7180 (Snapdragon
7c) that is used in some Chromebooks and Windows laptops.
Only a reference board is added for the moment.
- TI AM64x Sita4ra is a new version of the K3 SoC family for
industrial control, motor control, remote IO, IoT gateway etc.,
similar to the older AM65x family.
Two reference machines are added alongside.
Among the newly added machines, there is a very clear skew towards
64-bit machines now, with 12 32-bit machines compared to 23 64-bit
machines. The full list sorted by SoC is:
- ASpeed AST2500 BMC: ASRock E3C246D4I Xeon server board
- Allwinner A10: Topwise A721 Tablet
- Amlogic GXL: MeCool KII TV box
- Amlogic GXM: Mecool KIII, Minix Neo U9-H TV boxes
- Broadcom BCM4908: TP-Link Archer C2300 V1 router
- MStar SSD202D: M5Stack UnitV2 camera
- Marvell Armada 38x: ATL-x530 ethernet switch
- Mediatek MT8183 Chromebooks: Lenovo 10e, Acer Spin 311, Asus Flip
CM3, Asus Detachable CM3
- Mediatek MT8516/MT8183: OLogic Pumpkin Board
- NXP i.MX7: reMarkable Tablet
- NXP i.MX8M: Kontron pitx-imx8m, Engicam i.Core MX8M Mini
- Nuvoton NPCM730: Quanta GBS BMC
- Qualcomm X55: Telit FN980 TLB SoM, Thundercomm TurboX T55 SoM
- Qualcomm MSM8998: OnePlus 5/5T phones
- Qualcomm SM8350: Snapdragon 888 Mobile Hardware Development Kit
- Rockchip RK3399: NanoPi R4S board
- STM32MP1: Engicam MicroGEA STM32MP1 MicroDev 2.0 and SOM, EDIMM2.2
Starter Kit, Carrier, SOM
- TI AM65: Siemens SIMATIC IOT2050 gateway
There is notable work going into extending already supported machines
and SoCs:
- ASpeed AST2500
- Allwinner A23, A83t, A31, A64, H6
- Amlogic G12B
- Broadcom BCM4908
- Marvell Armada 7K/8K/CN91xx
- Mediatek MT6589, MT7622, MT8173, MT8183, MT8195
- NXP i.MX8Q, i.MX8MM, i.MX8MP
- Qualcomm MSM8916, SC7180, SDM845, SDX55, SM8350
- Renesas R-Car M3, V3U
- Rockchip RK3328, RK3399
- STEricsson U8500
- STMicroelectronics STM32MP141
- Samsung Exynos 4412
- TI K3-AM65, K3-J7200
- TI OMAP3
Among the treewide cleanups and bug fixes, two parts stand out:
- There are a number of cleanups for issues pointed out by 'make
dtbs_check' this time, and I expect more to come in the future as
we increasingly check for regressions.
- After a change to the MMC subsystem that can lead to unpredictable
device numbers, several platforms add 'aliases' properties for
these to give each MMC controller a fixed number"
* tag 'arm-dt-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (516 commits)
dt-bindings: mali-bifrost: add dma-coherent
arm64: dts: amlogic: misc DT schema fixups
arm64: dts: qcom: sc7180: Update iommu property for simultaneous playback
arm64: dts: qcom: sc7180: pompom: Add "dmic_clk_en" + sound model
arm64: dts: qcom: sc7180: coachz: Add "dmic_clk_en"
ARM: dts: mstar: Add a dts for M5Stack UnitV2
dt-bindings: arm: mstar: Add compatible for M5Stack UnitV2
dt-bindings: vendor-prefixes: Add vendor prefix for M5Stack
arm64: dts: mt8183: fix dtbs_check warning
arm64: dts: mt8183-pumpkin: fix dtbs_check warning
ARM: dts: aspeed: tiogapass: add hotplug controller
ARM: dts: aspeed: amd-ethanolx: Enable all used I2C busses
ARM: dts: aspeed: Rainier: Update to pass 2 hardware
ARM: dts: aspeed: Rainier 1S4U: Fix fan nodes
ARM: dts: aspeed: Rainier: Fix humidity sensor bus address
ARM: dts: aspeed: Rainier: Fix PCA9552 on bus 8
ARM: dts: qcom: sdx55: add IPA information
ARM: dts: qcom: sdx55: Add basic devicetree support for Thundercomm T55
dt-bindings: arm: qcom: Add binding for Thundercomm T55 kit
ARM: dts: qcom: sdx55: Add basic devicetree support for Telit FN980 TLB
...
|
|
Document SoC compatible for sc7280
Acked-by: Rob Herring <[email protected]>
Signed-off-by: Rajendra Nayak <[email protected]>
Signed-off-by: Srinivas Kandagatla <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>
|
|
Broadcom's NVRAM structure contains device data and can be accessed
using I/O mapping.
Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: Rafał Miłecki <[email protected]>
Signed-off-by: Srinivas Kandagatla <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>
|
|
This updates dt-binding documentation for MediaTek mt8192
Acked-by: Rob Herring <[email protected]>
Signed-off-by: Ryan Wu <[email protected]>
Signed-off-by: Srinivas Kandagatla <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>
|
|
This updates dt-binding documentation for MediaTek mt8192
Signed-off-by: Ryan Wu <[email protected]>
Acked-by: Rob Herring <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Matthias Brugger <[email protected]>
|
|
Drop $nodename restriction as now mtd partition can also be used as
nvmem provider.
Signed-off-by: Ansuel Smith <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: Miquel Raynal <[email protected]>
Link: https://lore.kernel.org/linux-mtd/[email protected]
|
|
Users of common properties shouldn't have a type definition as the
common schemas already have one. Drop all the unnecessary type
references in the tree.
A meta-schema update to catch these is pending.
Cc: Maxime Ripard <[email protected]>
Cc: Linus Walleij <[email protected]>
Cc: Bartosz Golaszewski <[email protected]>
Cc: Bjorn Andersson <[email protected]>
Cc: Krzysztof Kozlowski <[email protected]>
Cc: "David S. Miller" <[email protected]>
Cc: Jakub Kicinski <[email protected]>
Cc: Ohad Ben-Cohen <[email protected]>
Cc: Cheng-Yi Chiang <[email protected]>
Cc: Benson Leung <[email protected]>
Cc: Zhang Rui <[email protected]>
Cc: Daniel Lezcano <[email protected]>
Cc: Stefan Wahren <[email protected]>
Cc: Masahiro Yamada <[email protected]>
Cc: Odelu Kukatla <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Rob Herring <[email protected]>
Acked-by: Dmity Baryshkov <[email protected]>
Acked-by: Mark Brown <[email protected]>
Acked-by: Suman Anna <[email protected]>
Acked-by: Greg Kroah-Hartman <[email protected]>
Acked-by: Marc Kleine-Budde <[email protected]>
Reviewed-by: Srinivas Kandagatla <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
Reviewed-by: Nicolas Saenz Julienne <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
|
|
Common consumer schemas need to use the base.yaml meta-schema because
they need to define different constraints (e.g. the type) from what
users of the common schema need to define (e.g. how many entries).
Cc: Srinivas Kandagatla <[email protected]>
Signed-off-by: Rob Herring <[email protected]>
Reviewed-by: Srinivas Kandagatla <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
|
|
Firmware/co-processors might use reserved memory areas in order to pass
data stemming from an nvmem device otherwise non accessible to Linux.
For example an EEPROM memory only physically accessible to firmware, or
data only accessible early at boot time.
Introduce the dt-bindings to nvmem's rmem.
Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: Nicolas Saenz Julienne <[email protected]>
Signed-off-by: Srinivas Kandagatla <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>
|
|
Add SoC-specific compatible strings so that data can be attached
to it in the driver.
Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: Evan Green <[email protected]>
Signed-off-by: Srinivas Kandagatla <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>
|
|
Add binding documentation for MT8516 SoCs.
Acked-by: Rob Herring <[email protected]>
Signed-off-by: Fabien Parent <[email protected]>
Signed-off-by: Srinivas Kandagatla <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>
|
|
Pull ARM Devicetree updates from Olof Johansson:
"As usual, most of the changes are to devicetrees.
Besides smaller fixes, some refactorings and cleanups, some of the new
platforms and chips (or significant features) supported are below:
Broadcom boards:
- Cisco Meraki MR32 (BCM53016-based)
- BCM2711 (RPi4) display pipeline support
Actions Semi boards:
- Caninos Loucos Labrador SBC (S500-based)
- RoseapplePi SBC (S500-based)
Allwinner SoCs/boards:
- A100 SoC with Perf1 board
- Mali, DMA, Cetrus and IR support for R40 SoC
Amlogic boards:
- Libretch S905x CC V2 board
- Hardkernel ODROID-N2+ board
Aspeed boards/platforms:
- Wistron Mowgli (AST2500-based, Power9 OpenPower server)
- Facebook Wedge400 (AST2500-based, ToR switch)
Hisilicon SoC:
- SD5203 SoC
Nvidia boards:
- Tegra234 VDK, for pre-silicon Orin SoC
NXP i.MX boards:
- Librem 5 phone
- i.MX8MM DDR4 EVK
- Variscite VAR-SOM-MX8MN SoM
- Symphony board
- Tolino Shine 2 HD
- TQMa6 SoM
- Y Soft IOTA Orion
Rockchip boards:
- NanoPi R2S board
- A95X-Z2 board
- more Rock-Pi4 variants
STM32 boards:
- Odyssey SOM board (STM32MP157CAC-based)
- DH DRC02 board
Toshiba SoCs/boards:
- Visconti SoC and TPMV7708 board"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (638 commits)
ARM: dts: nspire: Fix SP804 users
arm64: dts: lg: Fix SP804 users
arm64: dts: lg: Fix SP805 clocks
ARM: mstar: Fix up the fallout from moving the dts/dtsi files
ARM: mstar: Add mstar prefix to all of the dtsi/dts files
ARM: mstar: Add interrupt to pm_uart
ARM: mstar: Add interrupt controller to base dtsi
ARM: dts: meson8: remove two invalid interrupt lines from the GPU node
arm64: dts: ti: k3-j7200-common-proc-board: Add USB support
arm64: dts: ti: k3-j7200-common-proc-board: Configure the SERDES lane function
arm64: dts: ti: k3-j7200-main: Add USB controller
arm64: dts: ti: k3-j7200-main.dtsi: Add USB to SERDES lane MUX
arm64: dts: ti: k3-j7200-main: Add SERDES lane control mux
dt-bindings: ti-serdes-mux: Add defines for J7200 SoC
ARM: dts: hisilicon: add SD5203 dts
ARM: dts: hisilicon: fix the system controller compatible nodes
arm64: dts: zynqmp: Fix leds subnode name for zcu100/ultra96 v1
arm64: dts: zynqmp: Remove undocumented u-boot properties
arm64: dts: zynqmp: Remove additional compatible string for i2c IPs
arm64: dts: zynqmp: Rename buses to be align with simple-bus yaml
...
|
|
In order to add meta-schema checks for additional/unevaluatedProperties
being present, all schema need to make this explicit. As common/shared
schema are included by other schemas, they should always allow for
additionalProperties.
Acked-by: Mark Brown <[email protected]>
Acked-by: Krzysztof Kozlowski <[email protected]>
Acked-by: Sebastian Reichel <[email protected]>
Acked-by: Chanwoo Choi <[email protected]>
Acked-By: Vinod Koul <[email protected]>
Acked-by: Lee Jones <[email protected]>
Acked-by: Geert Uytterhoeven <[email protected]>
Acked-by: Srinivas Kandagatla <[email protected]>
Acked-by: Ulf Hansson <[email protected]>
Acked-by: Jonathan Cameron <[email protected]>
Acked-by: Guenter Roeck <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Rob Herring <[email protected]>
|
|
This doesn't yet do anything in the tools, but make it explicit so we can
check either 'unevaluatedProperties' or 'additionalProperties' is present
in schemas.
'unevaluatedProperties' is appropriate when including another schema (via
'$ref') and all possible properties and/or child nodes are not
explicitly listed in the schema with the '$ref'.
This is in preparation to add a meta-schema to check for missing
'unevaluatedProperties' or 'additionalProperties'. This has been a
constant source of review issues.
Acked-by: Mark Brown <[email protected]>
Acked-by: Wolfram Sang <[email protected]>
Acked-by: Krzysztof Kozlowski <[email protected]>
Acked-By: Vinod Koul <[email protected]>
Acked-by: Geert Uytterhoeven <[email protected]>
Acked-by: Ulf Hansson <[email protected]>
Acked-by: Guenter Roeck <[email protected]>
Acked-by: Mathieu Poirier <[email protected]>
Acked-by: Dmitry Torokhov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Rob Herring <[email protected]>
|
|
DTSes with new i.MX 8M SoCs use two compatibles so update the binding to
fix dtbs_check warnings like:
arch/arm64/boot/dts/freescale/imx8mn-evk.dt.yaml: efuse@30350000: compatible:1: 'syscon' was expected
From schema: Documentation/devicetree/bindings/nvmem/imx-ocotp.yaml
arch/arm64/boot/dts/freescale/imx8mn-evk.dt.yaml: efuse@30350000:
compatible: ['fsl,imx8mn-ocotp', 'fsl,imx8mm-ocotp', 'syscon'] is too long
arch/arm64/boot/dts/freescale/imx8mn-evk.dt.yaml: efuse@30350000:
compatible: Additional items are not allowed ('syscon' was unexpected)
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: Rob Herring <[email protected]>
|
|
Add syscon compatibility with Vybrid OCOTP driver binding. This is
required to access the UID.
Fixes: 623069946952 ("nvmem: Add DT binding documentation for Vybrid OCOTP driver")
Signed-off-by: Chris Healy <[email protected]>
Reviewed-by: Stefan Agner <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
Acked-by: Rob Herring <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
|
|
Convert the snvs lpgpr binding to DT schema format using json-schema.
Signed-off-by: Anson Huang <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Rob Herring <[email protected]>
|
|
Clean-up incorrect indentation, extra spaces, long lines, and missing
EOF newline in schema files. Most of the clean-ups are for list
indentation which should always be 2 spaces more than the preceding
keyword.
Found with yamllint (which I plan to integrate into the checks).
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Acked-by: Sam Ravnborg <[email protected]>
Signed-off-by: Rob Herring <[email protected]>
|
|
Add a binding for A100's SID controller.
Signed-off-by: Yangtao Li <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: Srinivas Kandagatla <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>
|
|
On some systems it's possible to actually blow the fuses in the qfprom
from the kernel. Add properties to support that.
NOTE: Whether this is possible depends on the BIOS settings and
whether the kernel has permissions here, so not all boards will be
able to blow fuses in the kernel.
Signed-off-by: Ravi Kumar Bokka <[email protected]>
Signed-off-by: Douglas Anderson <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: Srinivas Kandagatla <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>
|
|
This switches the bindings over from txt to yaml.
Signed-off-by: Ravi Kumar Bokka <[email protected]>
Signed-off-by: Douglas Anderson <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: Srinivas Kandagatla <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>
|
|
Introduce boolean property st,non-secure-otp for OTP data located
in a factory programmed area that only secure firmware can access
by default and that shall be reachable from the non-secure world.
This change also allows additional properties for NVMEM nodes that
were forbidden prior this change.
Signed-off-by: Etienne Carriere <[email protected]>
Signed-off-by: Rob Herring <[email protected]>
|
|
Convert the MXS OCOTP binding to DT schema format using json-schema.
Signed-off-by: Anson Huang <[email protected]>
Signed-off-by: Rob Herring <[email protected]>
|
|
Convert the i.MX IIM binding to DT schema format using json-schema.
Signed-off-by: Anson Huang <[email protected]>
Signed-off-by: Rob Herring <[email protected]>
|
|
Convert the i.MX OCOTP binding to DT schema format using json-schema.
Signed-off-by: Anson Huang <[email protected]>
Signed-off-by: Rob Herring <[email protected]>
|
|
Convert the existing rockchip-efuse binding to json-schema. No changes
were done to the binding except for small changes in the documentation
strings.
This deletes the rockchip-efuse.txt binding and replaces it with
rockchip-efuse.yaml.
Signed-off-by: Ricardo Cañuelo <[email protected]>
Signed-off-by: Rob Herring <[email protected]>
|
|
This patch brings support for the JZ4780 efuse. Currently it only exposes
a read only access to the entire 8K bits efuse memory.
Tested-by: Mathieu Malaterre <[email protected]>
Signed-off-by: PrasannaKumar Muralidharan <[email protected]>
Signed-off-by: Mathieu Malaterre <[email protected]>
Signed-off-by: H. Nikolaus Schaller <[email protected]>
[converted to yaml]
Signed-off-by: Andreas Kemnade <[email protected]>
Reviewed-by: Paul Cercueil <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: Srinivas Kandagatla <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>
|
|
Fix all the warnings in the DT binding schema examples when built with
'W=1'. This is in preparation to make that the default for examples.
Reviewed-by: Linus Walleij <[email protected]>
Acked-by: Stephen Boyd <[email protected]>
Acked-by: Sam Ravnborg <[email protected]>
Acked-by: Vinod Koul <[email protected]>
Acked-by: Lee Jones <[email protected]>
Acked-by: Srinivas Kandagatla <[email protected]>
Acked-by: Mark Brown <[email protected]>
Acked-by: Bartosz Golaszewski <[email protected]>
Cc: Daniel Lezcano <[email protected]>
Cc: Kishon Vijay Abraham I <[email protected]>
Cc: Ulf Hansson <[email protected]>
Cc: Dmitry Torokhov <[email protected]>
Cc: Krzysztof Kozlowski <[email protected]>
Cc: Kukjin Kim <[email protected]>
Cc: Jonathan Cameron <[email protected]>
Cc: Thierry Reding <[email protected]>
Cc: Chen-Yu Tsai <[email protected]>
Cc: Maxime Ripard <[email protected]>
Cc: Alexandre Torgue <[email protected]>
Cc: Maxime Coquelin <[email protected]>
Signed-off-by: Rob Herring <[email protected]>
|