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2024-06-17drm/i915/gt: remove mem freq from gt debugfsJani Nikula1-1/+0
It's a bit out of place, and only printed for VLV/CHV. Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/bbfec4c67a81d1d3de1f40484a80b7164e69df21.1718356614.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-06-17drm/i915/dram: rearrange mem freq initJani Nikula1-34/+25
Follow the same style in mem freq init as in fsb freq init, returning the value instead of assigning in multiple places. Reviewed-by: Matt Roper <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/f098ccdbb0c42016d5dad81e0b089bb4babe29f0.1718356614.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-06-17drm/i915/dram: split out pnv DDR3 detectionJani Nikula1-4/+8
Split out the PNV DDR3 detection to a distinct step instead of conflating it with mem freq detection. Reviewed-by: Matt Roper <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/c4bf9d32479ab5024e9daa37a996508f543f05e9.1718356614.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-06-17drm/i915/dram: separate fsb freq detection from mem freqJani Nikula1-46/+60
To simplify further changes, add separate functions for reading the fsb frequency. This ends up reading CLKCFG register twice, but it's not a big deal. Reviewed-by: Matt Roper <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/7582651aa21ac2c1472111c4e81ba8fee182f80e.1718356614.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-06-17drm/i915/wm: clarify logging on not finding CxSR latency configJani Nikula1-12/+5
Clarify and unify the logging on not finding PNV CxSR latency config. Just let the i915->fsb_freq == 0 || i915->mem_freq == 0 case go through the table instead of checking for it separately. v2: Do not check for fsb == 0 || mem == 0 separately (Matt) Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/6333cb0675c531e971e829105f1ecfc4d71bdc6b.1718356614.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-06-17drm/i915/wm: rename intel_get_cxsr_latency -> pnv_get_cxsr_latencyJani Nikula1-3/+3
Clarify that the function is specific to PNV, making subsequent changes slightly easier to grasp. Reviewed-by: Matt Roper <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/7d4e3c9a4220ff84af2741e5cd7bb62d1b4f2a44.1718356614.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-06-17pinctrl: zynqmp: Support muxing individual pinsSean Anderson1-29/+54
While muxing groups of pins at once can be convenient for large interfaces, it can also be rigid. This is because the group is set to all pins which support a particular function, even though not all pins may be used. For example, the sdhci0 function may be used with a 8-bit eMMC, 4-bit SD card, or even a 1-bit SD card. In these cases, the extra pins may be repurposed for other uses, but this is not currently allowed. There is not too much point in pin "groups" when there are not actual pin groups at the hardware level. The pins can all be muxed individually, so there's no point in adding artificial groups on top. Just mux the pins like the hardware allows. To this effect, add a new group for each pin which can be muxed. These groups are part of each function the pin can be muxed to. We treat group selectors beyond the number of groups as "pin" groups. To set this up, we initialize groups before functions, and then create a bitmap of used pins for each function. These used pins are appended to the function's list of groups. Signed-off-by: Sean Anderson <[email protected]> Reviewed-by: Sai Krishna Potthuri <[email protected]> Acked-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Linus Walleij <[email protected]>
2024-06-17dt-bindings: pinctrl: xilinx: Add support for function with pinsSean Anderson1-169/+180
Support specifying the function per-pin. The driver doesn't care whether you use pins or groups for this purpose. Signed-off-by: Sean Anderson <[email protected]> Reviewed-by: Rob Herring (Arm) <[email protected]> Acked-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Linus Walleij <[email protected]>
2024-06-17drm/i915/mso: using joiner is not possible with eDP MSOJani Nikula1-0/+4
It's not possible to use the joiner at the same time with eDP MSO. When a panel needs MSO, it's not optional, so MSO trumps joiner. v3: Only change intel_dp_has_joiner(), leave debugfs alone (Ville) Fixes: bc71194e8897 ("drm/i915/edp: enable eDP MSO during link training") Cc: <[email protected]> # v5.13+ Cc: Ville Syrjala <[email protected]> Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/1668 Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Signed-off-by: Jani Nikula <[email protected]>
2024-06-17pinctrl: rockchip: fix pinmux reset in rockchip_pmx_setHuang-Huang Bao1-1/+3
rockchip_pmx_set reset all pinmuxs in group to 0 in the case of error, add missing bank data retrieval in that code to avoid setting mux on unexpected pins. Fixes: 14797189b35e ("pinctrl: rockchip: add return value to rockchip_set_mux") Reviewed-by: Heiko Stuebner <[email protected]> Signed-off-by: Huang-Huang Bao <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Linus Walleij <[email protected]>
2024-06-17pinctrl: rockchip: use dedicated pinctrl type for RK3328Huang-Huang Bao2-1/+5
rk3328_pin_ctrl uses type of RK3288 which has a hack in rockchip_pinctrl_suspend and rockchip_pinctrl_resume to restore GPIO6-C6 at assume, the hack is not applicable to RK3328 as GPIO6 is not even exist in it. So use a dedicated pinctrl type to skip this hack. Fixes: 3818e4a7678e ("pinctrl: rockchip: Add rk3328 pinctrl support") Reviewed-by: Heiko Stuebner <[email protected]> Signed-off-by: Huang-Huang Bao <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Linus Walleij <[email protected]>
2024-06-17pinctrl: rockchip: fix pinmux bits for RK3328 GPIO3-B pinsHuang-Huang Bao1-0/+51
The pinmux bits for GPIO3-B1 to GPIO3-B6 pins are not explicitly specified in RK3328 TRM, however we can get hint from pad name and its correspinding IOMUX setting for pins in interface descriptions. The correspinding IOMIX settings for these pins can be found in the same row next to occurrences of following pad names in RK3328 TRM. GPIO3-B1: IO_TSPd5m0_CIFdata5m0_GPIO3B1vccio6 GPIO3-B2: IO_TSPd6m0_CIFdata6m0_GPIO3B2vccio6 GPIO3-B3: IO_TSPd7m0_CIFdata7m0_GPIO3B3vccio6 GPIO3-B4: IO_CARDclkm0_GPIO3B4vccio6 GPIO3-B5: IO_CARDrstm0_GPIO3B5vccio6 GPIO3-B6: IO_CARDdetm0_GPIO3B6vccio6 Add pinmux data to rk3328_mux_recalced_data as mux register offset for these pins does not follow rockchip convention. Signed-off-by: Huang-Huang Bao <[email protected]> Reviewed-by: Heiko Stuebner <[email protected]> Fixes: 3818e4a7678e ("pinctrl: rockchip: Add rk3328 pinctrl support") Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Linus Walleij <[email protected]>
2024-06-17pinctrl: rockchip: fix pinmux bits for RK3328 GPIO2-B pinsHuang-Huang Bao1-7/+1
The pinmux bits for GPIO2-B0 to GPIO2-B6 actually have 2 bits width, correct the bank flag for GPIO2-B. The pinmux bits for GPIO2-B7 is recalculated so it remain unchanged. The pinmux bits for those pins are not explicitly specified in RK3328 TRM, however we can get hint from pad name and its correspinding IOMUX setting for pins in interface descriptions. The correspinding IOMIX settings for GPIO2-B0 to GPIO2-B6 can be found in the same row next to occurrences of following pad names in RK3328 TRM. GPIO2-B0: IO_SPIclkm0_GPIO2B0vccio5 GPIO2-B1: IO_SPItxdm0_GPIO2B1vccio5 GPIO2-B2: IO_SPIrxdm0_GPIO2B2vccio5 GPIO2-B3: IO_SPIcsn0m0_GPIO2B3vccio5 GPIO2-B4: IO_SPIcsn1m0_FLASHvol_sel_GPIO2B4vccio5 GPIO2-B5: IO_ I2C2sda_TSADCshut_GPIO2B5vccio5 GPIO2-B6: IO_ I2C2scl_GPIO2B6vccio5 This fix has been tested on NanoPi R2S for fixing confliting pinmux bits between GPIO2-B7 with GPIO2-B5. Signed-off-by: Huang-Huang Bao <[email protected]> Reviewed-by: Heiko Stuebner <[email protected]> Fixes: 3818e4a7678e ("pinctrl: rockchip: Add rk3328 pinctrl support") Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Linus Walleij <[email protected]>
2024-06-17pinctrl: ti: ti-iodelay: fix possible memory leak when pinctrl_enable() failsYang Yingliang1-5/+6
This driver calls pinctrl_register_and_init() which is not devm_ managed, it will leads memory leak if pinctrl_enable() fails. Replace it with devm_pinctrl_register_and_init(). And add missing of_node_put() in the error path. Fixes: 5038a66dad01 ("pinctrl: core: delete incorrect free in pinctrl_enable()") Signed-off-by: Yang Yingliang <[email protected]> Reviewed-by: Dan Carpenter <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Linus Walleij <[email protected]>
2024-06-17pinctrl: single: fix possible memory leak when pinctrl_enable() failsYang Yingliang1-3/+4
This driver calls pinctrl_register_and_init() which is not devm_ managed, it will leads memory leak if pinctrl_enable() fails. Replace it with devm_pinctrl_register_and_init(). And call pcs_free_resources() if pinctrl_enable() fails. Fixes: 5038a66dad01 ("pinctrl: core: delete incorrect free in pinctrl_enable()") Signed-off-by: Yang Yingliang <[email protected]> Reviewed-by: Dan Carpenter <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Linus Walleij <[email protected]>
2024-06-17pinctrl: core: fix possible memory leak when pinctrl_enable() failsYang Yingliang1-1/+11
In devm_pinctrl_register(), if pinctrl_enable() fails in pinctrl_register(), the "pctldev" has not been added to dev resources, so devm_pinctrl_dev_release() can not be called, it leads memory leak. Introduce pinctrl_uninit_controller(), call it in the error path to free memory. Fixes: 5038a66dad01 ("pinctrl: core: delete incorrect free in pinctrl_enable()") Signed-off-by: Yang Yingliang <[email protected]> Reviewed-by: Dan Carpenter <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Linus Walleij <[email protected]>
2024-06-17pinctrl: fix deadlock in create_pinctrl() when handling -EPROBE_DEFERHagar Hemdan1-1/+1
In create_pinctrl(), pinctrl_maps_mutex is acquired before calling add_setting(). If add_setting() returns -EPROBE_DEFER, create_pinctrl() calls pinctrl_free(). However, pinctrl_free() attempts to acquire pinctrl_maps_mutex, which is already held by create_pinctrl(), leading to a potential deadlock. This patch resolves the issue by releasing pinctrl_maps_mutex before calling pinctrl_free(), preventing the deadlock. This bug was discovered and resolved using Coverity Static Analysis Security Testing (SAST) by Synopsys, Inc. Fixes: 42fed7ba44e4 ("pinctrl: move subsystem mutex to pinctrl_dev struct") Suggested-by: Maximilian Heyne <[email protected]> Signed-off-by: Hagar Hemdan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Linus Walleij <[email protected]>
2024-06-17pinctrl: bcm2835: Use string_choices API instead of ternary operatorStefan Wahren1-2/+3
Use modern string_choices API instead of manually determining the output using ternary operator. Suggested-by: Andy Shevchenko <[email protected]> Signed-off-by: Stefan Wahren <[email protected]> Acked-by: Florian Fainelli <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Linus Walleij <[email protected]>
2024-06-17pinctrl: bcm2835: Fix permissions of persist_gpio_outputsStefan Wahren1-1/+1
The commit 8ff05989b44e ("pinctrl: bcm2835: Make pin freeing behavior configurable") unintentionally made the module parameter persist_gpio_outputs changeable at runtime. So drop the write permission in order to make the freeing behavior predictable for user applications. Fixes: 8ff05989b44e ("pinctrl: bcm2835: Make pin freeing behavior configurable") Reported-by: Andy Shevchenko <[email protected]> Closes: https://lore.kernel.org/linux-gpio/[email protected]/ Signed-off-by: Stefan Wahren <[email protected]> Acked-by: Florian Fainelli <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Linus Walleij <[email protected]>
2024-06-17pinctrl: tps6594: add missing support for LP8764 PMICThomas Richard1-0/+1
Add missing support for LP8764 PMIC in the probe(). Issue detected with v6.10-rc1 (and reproduced with 6.10-rc2) using a TI J7200 EVM board. tps6594-pinctrl tps6594-pinctrl.8.auto: error -EINVAL: Couldn't register gpio_regmap driver tps6594-pinctrl tps6594-pinctrl.8.auto: probe with driver tps6594-pinctrl failed with error -22 Fixes: 208829715917 (pinctrl: pinctrl-tps6594: Add TPS65224 PMIC pinctrl and GPIO) Signed-off-by: Thomas Richard <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Linus Walleij <[email protected]>
2024-06-17drm: zynqmp_dp: Don't delay workSean Anderson1-7/+6
We always call scheduled_delayed_work with no delay, so just use a non-delayed work_struct instead. Signed-off-by: Sean Anderson <[email protected]> Reviewed-by: Tomi Valkeinen <[email protected]> Signed-off-by: Tomi Valkeinen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-06-17drm: zynqmp_dp: Rearrange zynqmp_dp for better paddingSean Anderson1-13/+13
Sort the members of struct zynqmp_dp to reduce padding necessary for alignment. Signed-off-by: Sean Anderson <[email protected]> Signed-off-by: Tomi Valkeinen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-06-17drm: zynqmp_kms: Fix AUX bus not getting unregisteredSean Anderson1-3/+9
drm_encoder_cleanup is responsible for calling drm_bridge_detach for each bridge attached to the encoder. zynqmp_dp_bridge_detach is in turn responsible for unregistering the AUX bus. However, we never ended up calling drm_encoder_cleanup in the remove or error paths, so the AUX bus would stick around after the rest of the driver had been removed. I don't really understand why drm_mode_config_cleanup doesn't call drm_encoder_cleanup for us. It will call destroy (which for simple_encoder is drm_encoder_cleanup) on encoders in the mode_config's encoder_list. Should drm_encoder_cleanup get called before or after drm_atomic_helper_shutdown? Fixes: 2dfd045c8435 ("drm: xlnx: zynqmp_dpsub: Register AUX bus at bridge attach time") Signed-off-by: Sean Anderson <[email protected]> Signed-off-by: Tomi Valkeinen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-06-17drm: xlnx: zynqmp_dpsub: Enable plane in atomic updateAnatoliy Klymenko1-3/+7
Unconditionally enable the DPSUB layer in the corresponding atomic plane update callback. Setting the new display mode may require disabling and re-enabling the CRTC. This effectively resets DPSUB to the default state with all layers disabled. The original implementation of the plane atomic update enables the corresponding DPSUB layer only if the framebuffer format has changed. This would leave the layer disabled after switching to a different display mode with the same framebuffer format. Signed-off-by: Anatoliy Klymenko <[email protected]> Signed-off-by: Tomi Valkeinen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-06-17drm: zynqmp_dpsub: Fix an error handling path in zynqmp_dpsub_probe()Christophe JAILLET1-0/+1
If zynqmp_dpsub_drm_init() fails, we must undo the previous drm_bridge_add() call. Fixes: be3f3042391d ("drm: zynqmp_dpsub: Always register bridge") Signed-off-by: Christophe JAILLET <[email protected]> Reviewed-by: Sean Anderson <[email protected]> Reviewed-by: Laurent Pinchart <[email protected]> Signed-off-by: Tomi Valkeinen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/974d1b062d7c61ee6db00d16fa7c69aa1218ee02.1716198025.git.christophe.jaillet@wanadoo.fr
2024-06-17dt-bindings: pinctrl: aspeed,ast2600-pinctrl: Describe I3C, USBAndrew Jeffery1-0/+6
I3C1 and I3C2 become muxed functions in the mass production release of the AST2600. Also document the USB2A device and USB2B HID mux options. Squash warnings such as: arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-elbert.dtb: pinctrl: usb2ad_default:function:0: 'USB2AD' is not one of ['ADC0', 'ADC1', 'ADC10', 'ADC11', 'ADC12', 'ADC13', 'ADC14', 'ADC15', 'ADC2', 'ADC3', 'ADC4', 'ADC5', 'ADC6', 'ADC7', 'ADC8', 'ADC9', 'BMCINT', 'EMMC', 'ESPI', 'ESPIALT', 'FSI1', 'FSI2', 'FWQSPI', 'FWSPIABR', 'FWSPID', 'FWSPIWP', 'GPIT0', 'GPIT1', 'GPIT2', 'GPIT3', 'GPIT4', 'GPIT5', 'GPIT6', 'GPIT7', 'GPIU0', 'GPIU1', 'GPIU2', 'GPIU3', 'GPIU4', 'GPIU5', 'GPIU6', 'GPIU7', 'I2C1', 'I2C10', 'I2C11', 'I2C12', 'I2C13', 'I2C14', 'I2C15', 'I2C16', 'I2C2', 'I2C3', 'I2C4', 'I2C5', 'I2C6', 'I2C7', 'I2C8', 'I2C9', 'I3C3', 'I3C4', 'I3C5', 'I3C6', 'JTAGM', 'LHPD', 'LHSIRQ', 'LPC', 'LPCHC', 'LPCPD', 'LPCPME', 'LPCSMI', 'LSIRQ', 'MACLINK1', 'MACLINK2', 'MACLINK3', 'MACLINK4', 'MDIO1', 'MDIO2', 'MDIO3', 'MDIO4', 'NCTS1', 'NCTS2', 'NCTS3', 'NCTS4', 'NDCD1', 'NDCD2', 'NDCD3', 'NDCD4', 'NDSR1', 'NDSR2', 'NDSR3', 'NDSR4', 'NDTR1', 'NDTR2', 'NDTR3', 'NDTR4', 'NRI1', 'NRI2', 'NRI3', 'NR I4', 'NRTS1', 'NRTS2', 'NRTS3', 'NRTS4', 'OSCCLK', 'PEWAKE', 'PWM0', 'PWM1', 'PWM10', 'PWM11', 'PWM12', 'PWM13', 'PWM14', 'PWM15', 'PWM2', 'PWM3', 'PWM4', 'PWM5', 'PWM6', 'PWM7', 'PWM8', 'PWM9', 'RGMII1', 'RGMII2', 'RGMII3', 'RGMII4', 'RMII1', 'RMII2', 'RMII3', 'RMII4', 'RXD1', 'RXD2', 'RXD3', 'RXD4', 'SALT1', 'SALT10', 'SALT11', 'SALT12', 'SALT13', 'SALT14', 'SALT15', 'SALT16', 'SALT2', 'SALT3', 'SALT4', 'SALT5', 'SALT6', 'SALT7', 'SALT8', 'SALT9', 'SD1', 'SD2', 'SGPM1', 'SGPM2', 'SGPS1', 'SGPS2', 'SIOONCTRL', 'SIOPBI', 'SIOPBO', 'SIOPWREQ', 'SIOPWRGD', 'SIOS3', 'SIOS5', 'SIOSCI', 'SPI1', 'SPI1ABR', 'SPI1CS1', 'SPI1WP', 'SPI2', 'SPI2CS1', 'SPI2CS2', 'TACH0', 'TACH1', 'TACH10', 'TACH11', 'TACH12', 'TACH13', 'TACH14', 'TACH15', 'TACH2', 'TACH3', 'TACH4', 'TACH5', 'TACH6', 'TACH7', 'TACH8', 'TACH9', 'THRU0', 'THRU1', 'THRU2', 'THRU3', 'TXD1', 'TXD2', 'TXD3', 'TXD4', 'UART10', 'UART11', 'UART12', 'UART13', 'UART6', 'UART7', 'UART8', 'UART9', 'USBAD', 'USBADP', 'USB2AH', 'USB2AHP', 'USB 2BD', 'USB2BH', 'VB', 'VGAHS', 'VGAVS', 'WDTRST1', 'WDTRST2', 'WDTRST3', 'WDTRST4'] Signed-off-by: Andrew Jeffery <[email protected]> Acked-by: Rob Herring (Arm) <[email protected]> Link: https://lore.kernel.org/r/20240531-dt-warnings-gpio-ast2600-pinctrl-funcs-groups-v1-3-a6fe2281a1b8@codeconstruct.com.au Signed-off-by: Linus Walleij <[email protected]>
2024-06-17dt-bindings: pinctrl: aspeed,ast2500-pinctrl: Describe SGPMAndrew Jeffery1-0/+1
Squash warnings such as: arch/arm/boot/dts/aspeed/aspeed-ast2500-evb.dtb: pinctrl@80: sgpm_default:groups:0: 'SGPM' is not one of ['ACPI', 'ADC0', 'ADC1', 'ADC10', 'ADC11', 'ADC12', 'ADC13', 'ADC14', 'ADC15', 'ADC2', 'ADC3', 'ADC4', 'ADC5', 'ADC6', 'ADC7', 'ADC8', 'ADC9', 'BMCINT', 'DDCCLK', 'DDCDAT', 'ESPI', 'FWSPICS1', 'FWSPICS2', 'GPID0', 'GPID2', 'GPID4', 'GPID6', 'GPIE0', 'GPIE2', 'GPIE4', 'GPIE6', 'I2C10', 'I2C11', 'I2C12', 'I2C13', 'I2C14', 'I2C3', 'I2C4', 'I2C5', 'I2C6', 'I2C7', 'I2C8', 'I2C9', 'LAD0', 'LAD1', 'LAD2', 'LAD3', 'LCLK', 'LFRAME', 'LPCHC', 'LPCPD', 'LPCPLUS', 'LPCPME', 'LPCRST', 'LPCSMI', 'LSIRQ', 'MAC1LINK', 'MAC2LINK', 'MDIO1', 'MDIO2', 'NCTS1', 'NCTS2', 'NCTS3', 'NCTS4', 'NDCD1', 'NDCD2', 'NDCD3', 'NDCD4', 'NDSR1', 'NDSR2', 'NDSR3', 'NDSR4', 'NDTR1', 'NDTR2', 'NDTR3', 'NDTR4', 'NRI1', 'NRI2', 'NRI3', 'NRI4', 'NRTS1', 'NRTS2', 'NRTS3', 'NRTS4', 'OSCCLK', 'PEWAKE', 'PNOR', 'PWM0', 'PWM1', 'PWM2', 'PWM3', 'PWM4', 'PWM5', 'PWM6', 'PWM7', 'RGMII1', 'RGMII2', 'RMII1', 'RMII2', 'RXD1', ' RXD2', 'RXD3', 'RXD4', 'SALT1', 'SALT10', 'SALT11', 'SALT12', 'SALT13', 'SALT14', 'SALT2', 'SALT3', 'SALT4', 'SALT5', 'SALT6', 'SALT7', 'SALT8', 'SALT9', 'SCL1', 'SCL2', 'SD1', 'SD2', 'SDA1', 'SDA2', 'SGPS1', 'SGPS2', 'SIOONCTRL', 'SIOPBI', 'SIOPBO', 'SIOPWREQ', 'SIOPWRGD', 'SIOS3', 'SIOS5', 'SIOSCI', 'SPI1', 'SPI1CS1', 'SPI1DEBUG', 'SPI1PASSTHRU', 'SPI2CK', 'SPI2CS0', 'SPI2CS1', 'SPI2MISO', 'SPI2MOSI', 'TIMER3', 'TIMER4', 'TIMER5', 'TIMER6', 'TIMER7', 'TIMER8', 'TXD1', 'TXD2', 'TXD3', 'TXD4', 'UART6', 'USB11BHID', 'USB2AD', 'USB2AH', 'USB2BD', 'USB2BH', 'USBCKI', 'VGABIOSROM', 'VGAHS', 'VGAVS', 'VPI24', 'VPO', 'WDTRST1', 'WDTRST2'] Signed-off-by: Andrew Jeffery <[email protected]> Acked-by: Rob Herring (Arm) <[email protected]> Link: https://lore.kernel.org/r/20240531-dt-warnings-gpio-ast2600-pinctrl-funcs-groups-v1-2-a6fe2281a1b8@codeconstruct.com.au Signed-off-by: Linus Walleij <[email protected]>
2024-06-17dt-bindings: pinctrl: aspeed: Use block syntax for function and groupsAndrew Jeffery3-83/+774
The expansion makes the documents a lot longer, but it's easier to review changes to functions and groups when we're not having to deal with line wrapping. Signed-off-by: Andrew Jeffery <[email protected]> Acked-by: Rob Herring (Arm) <[email protected]> Link: https://lore.kernel.org/r/20240531-dt-warnings-gpio-ast2600-pinctrl-funcs-groups-v1-1-a6fe2281a1b8@codeconstruct.com.au Signed-off-by: Linus Walleij <[email protected]>
2024-06-17Merge tag 'renesas-pinctrl-for-v6.11-tag1' of ↵Linus Walleij6-236/+652
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: renesas: Updates for v6.11 - Add support for the new RZ/V2H(P) (R9A09G057) Soc, - Miscellaneous fixes and improvements. Signed-off-by: Linus Walleij <[email protected]>
2024-06-17pinctrl: keembay: Fix func conversion in keembay_build_functions()Nathan Chancellor1-1/+1
A recent refactoring to use the func member in struct function_desc missed converting one uses of name in keembay_build_functions(), resulting in a build failure: drivers/pinctrl/pinctrl-keembay.c: In function 'keembay_build_functions': drivers/pinctrl/pinctrl-keembay.c:1630:35: error: 'struct function_desc' has no member named 'name' 1630 | if (!fdesc->name) { | ^~ Perform the same conversion to resolve the build error. Fixes: 73ee52205e5a ("pinctrl: keembay: Convert to use func member") Signed-off-by: Nathan Chancellor <[email protected]> Reviewed-by: Andy Shevchenko <[email protected]> Link: https://lore.kernel.org/r/20240611-pinctrl-keembay-fix-func-conversion-v1-1-3197f2ded3f7@kernel.org Reported-by: kernel test robot <[email protected]> Closes: https://lore.kernel.org/oe-kbuild-all/[email protected]/ Signed-off-by: Linus Walleij <[email protected]>
2024-06-17pinctrl: imx: support SCMI pinctrl protocol for i.MX95Peng Fan3-0/+367
The generic pinctrl-scmi.c driver could not be used for i.MX95 because i.MX95 SCMI firmware not supports functions, groups or generic 'Pin Configuration Type and Enumerations' listed in SCMI Specification. i.MX95 System Control Management Interface(SCMI) firmware only supports below pin configuration types which are OEM specific types: 192: PIN MUX 193: PIN CONF 194: DAISY ID 195: DAISY VAL To Support fsl,pins property together with SCMI OEM protocol, add this driver. Signed-off-by: Peng Fan <[email protected]> Reviewed-by: Cristian Marussi <[email protected]> Acked-by: Sudeep Holla <[email protected]> Reviewed-by: Dong Aisheng <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Linus Walleij <[email protected]>
2024-06-17pinctrl: scmi: add blocklistPeng Fan1-0/+9
i.MX95 will have its own pinctrl scmi driver, so need block pinctrl-scmi driver for i.MX95, otherwise there will be two pinctrl devices for a single scmi protocol@19. Signed-off-by: Peng Fan <[email protected]> Acked-by: Sudeep Holla <[email protected]> Reviewed-by: Dong Aisheng <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Linus Walleij <[email protected]>
2024-06-17dt-bindings: firmware: arm,scmi: Add properties for i.MX95 Pinctrl OEM ↵Peng Fan2-1/+56
extensions i.MX95 Pinctrl is managed by System Control Management Interface(SCMI) firmware using OEM extensions. No functions, no groups are provided by the firmware. So add i.MX95 specific properties. To keep aligned with current i.MX pinctrl bindings, still use "fsl,pins" for i.MX95. Signed-off-by: Peng Fan <[email protected]> Reviewed-by: Rob Herring (Arm) <[email protected]> Reviewed-by: Dong Aisheng <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Linus Walleij <[email protected]>
2024-06-17pinctrl: qcom: sdm670: add pdc wakeirq mapRichard Acayan1-0/+19
The PDC was hooked up as a wakeup parent in the DTS in commit 71f080633d1e ("arm64: dts: qcom: sdm670: Hook up PDC as wakeup-parent of TLMM"), but the wakeirq mapping was not defined so it had no effect. Add the mapping for wakeup interrupts on the PDC to their corresponding pins. Configuring a pin IRQ as dual-edge would break it unless the wakeirq_dual_edge_errata flag is set. Signed-off-by: Richard Acayan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Linus Walleij <[email protected]>
2024-06-17pinctrl: cy8c95x0: Use REGCACHE_MAPLEPatrick Rudolph1-1/+1
Use REGCACHE_MAPLE instead of REGCACHE_FLAT. Signed-off-by: Patrick Rudolph <[email protected]> Reviewed-by: Andy Shevchenko <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Linus Walleij <[email protected]>
2024-06-17pinctrl: cy8c95x0: Use regmap rangesPatrick Rudolph1-126/+53
Instead of implementing a custom register paging mechanism in the driver use the existing regmap ranges feature. Signed-off-by: Patrick Rudolph <[email protected]> Reviewed-by: Andy Shevchenko <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Linus Walleij <[email protected]>
2024-06-17pinctrl: cy8c95x0: Use single I2C lockPatrick Rudolph1-15/+17
Currently there are 3 locks being used when accessing the chip, one in the driver and one in each regmap. Reduce that to one driver only lock that protects all regmap and regcache accesses. Signed-off-by: Patrick Rudolph <[email protected]> Reviewed-by: Andy Shevchenko <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Linus Walleij <[email protected]>
2024-06-17pinctrl: pinmux: Remove unused members from struct function_descAndy Shevchenko1-9/+0
All drivers are converted to use embedded struct pinfunction. Remove unused members from struct function_desc. Signed-off-by: Andy Shevchenko <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Linus Walleij <[email protected]>
2024-06-17pinctrl: mediatek: moore: Convert to use func memberAndy Shevchenko2-8/+6
Convert drivers to use func member embedded in struct function_desc, because other members will be removed to avoid duplication and desynchronisation of the generic pin function description. Reviewed-by: AngeloGioacchino Del Regno <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Linus Walleij <[email protected]>
2024-06-17pinctrl: keembay: Convert to use func memberAndy Shevchenko1-11/+11
Convert drivers to use func member embedded in struct function_desc, because other members will be removed to avoid duplication and desynchronisation of the generic pin function description. Signed-off-by: Andy Shevchenko <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Linus Walleij <[email protected]>
2024-06-17pinctrl: ingenic: Convert to use func memberAndy Shevchenko1-9/+7
Convert drivers to use func member embedded in struct function_desc, because other members will be removed to avoid duplication and desynchronisation of the generic pin function description. Signed-off-by: Andy Shevchenko <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Linus Walleij <[email protected]>
2024-06-17pinctrl: imx: Convert to use func memberAndy Shevchenko1-7/+7
Convert drivers to use func member embedded in struct function_desc, because other members will be removed to avoid duplication and desynchronisation of the generic pin function description. Signed-off-by: Andy Shevchenko <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Linus Walleij <[email protected]>
2024-06-17pinctrl: pinmux: Embed struct pinfunction into struct function_descAndy Shevchenko2-6/+9
struct function_desc is a particular version of the struct pinfunction with associated opaque data. Start switching pin control core and drivers to use it explicitly. Signed-off-by: Andy Shevchenko <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Linus Walleij <[email protected]>
2024-06-17pinctrl: pinmux: Add a convenient define PINCTRL_FUNCTION_DESC()Andy Shevchenko3-8/+14
Add PINCTRL_FUNCTION_DESC() macro for inline use. While at it, fix adjective form in the comment of PINCTRL_GROUP_DESC(). Signed-off-by: Andy Shevchenko <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Linus Walleij <[email protected]>
2024-06-17pinctrl: mediatek: moore: Provide a helper macro PINCTRL_PIN_FUNCTION()Andy Shevchenko6-76/+84
Provide a helper macro to assign the struct function_desc entries. This helps further refactoring. Reviewed-by: AngeloGioacchino Del Regno <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Linus Walleij <[email protected]>
2024-06-17pinctrl: ingenic: Provide a helper macro INGENIC_PIN_FUNCTION()Andy Shevchenko1-345/+352
Provide a helper macro to assign the struct function_desc entries. This helps further refactoring. Signed-off-by: Andy Shevchenko <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Linus Walleij <[email protected]>
2024-06-17pinctrl: equilibrium: Make use of struct pinfunctionAndy Shevchenko2-23/+13
Since pin control provides a generic data type for the pin function, use it in the driver. Signed-off-by: Andy Shevchenko <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Linus Walleij <[email protected]>
2024-06-17pinctrl: berlin: Make use of struct pinfunctionAndy Shevchenko2-18/+9
Since pin control provides a generic data type for the pin function, use it in the driver. Signed-off-by: Andy Shevchenko <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Linus Walleij <[email protected]>
2024-06-17pinctrl: rockchip: update rk3308 iomux routesDmitry Yashin1-15/+2
Some of the rk3308 iomux routes in rk3308_mux_route_data belong to the rk3308b SoC. Remove them and correct i2c3 routes. Fixes: 7825aeb7b208 ("pinctrl: rockchip: add rk3308 SoC support") Signed-off-by: Dmitry Yashin <[email protected]> Reviewed-by: Heiko Stuebner <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Linus Walleij <[email protected]>
2024-06-17pinctrl: pinctrl-zynqmp: Use pin numbers stored in pin descriptorSwati Agarwal1-1/+1
Use pin numbers stored in the pin descriptors instead of index value while creating the pin groups. Pin Id's are not same as Index values for Xilinx Versal platform, so use the pin values from descriptor which works for both ZynqMP and Versal platforms. Signed-off-by: Swati Agarwal <[email protected]> Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/2413a1f99278d70313960f13daecda9ef54172d8.1716807432.git.michal.simek@amd.com Signed-off-by: Linus Walleij <[email protected]>
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