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2024-07-31dt-bindings: clock: qcom: Add SM8150 camera clock controllerSatya Priya Kakitapalli2-0/+212
Add device tree bindings for the camera clock controller on Qualcomm SM8150 platform. Reviewed-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Satya Priya Kakitapalli <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-07-31arm64: dts: qcom: sc8180x-lenovo-flex-5g: Enable USB multiport controllerBjorn Andersson1-0/+34
The Lenovo Flex 5G has a camera attached to the multiport USB controller, enable the controller and the four phys to enable this. Reviewed-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-07-31arm64: dts: qcom: sc8180x-primus: Enable the two MP USB portsBjorn Andersson1-0/+60
The SC8180X Primus comes with an AUX card with two USB ports, fed by the two multiport ports. Enable the involved nodes and define two always-on regulators to enable VBUS for these ports. Reviewed-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-07-31arm64: dts: qcom: sc8180x: Add USB MP controller and physBjorn Andersson1-0/+152
The SC8180X platform comes with a multiport DWC3 controller with two ports, each connected to a pair of HighSpeed and QMP SuperSpeed PHYs. Describe these blocks. Reviewed-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-07-31arm64: dts: qcom: sc8180x: Align USB nodes with bindingBjorn Andersson1-11/+18
Add the pwr_event interrupt and rearrange the order of the other interrupts to match the binding. Reviewed-by: Konrad Dybcio <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-07-31arm64: dts: qcom: sc8180x-pmics: Add second PMC8180 GPIOBjorn Andersson1-3/+13
The SC8180X comes with two PMC8180 PMICs, with the GPIO block being used to control VBUS supply of the second USB multiport port. Rename the GPIO controller in the first PMC8180 to match the schematics and define this second controller. Reviewed-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-07-31Merge branch '[email protected]' into ↵Bjorn Andersson1-0/+4
arm64-for-6.12 Merge the sc8180x Global Clock Controller binding from a topic branch, to gain access to the introduced USB multiport reset constants.
2024-07-31clk: qcom: gcc-sc8180x: Add missing USB MP resetsBjorn Andersson1-0/+4
The USB multiport controller needs a few additional resets, add these to the driver. Reviewed-by: Konrad Dybcio <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-07-31Merge branch '[email protected]' into ↵Bjorn Andersson1-0/+4
clk-for-6.12 Merge the sc8180x multiport reset DeviceTree constants through a topic branch, to allow them also to be made available to DeviceTree source.
2024-07-31dt-bindings: clock: qcom: Add missing USB MP resetsBjorn Andersson1-0/+4
The USB multiport controller needs a few missing resets, describe them in the binding. Acked-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-07-31arm64: dts: qcom: sm6115-pro1x: Enable ATH10K WLANDang Huynh1-0/+11
Enable onboard Wi-Fi on the F(x)tec Pro1X. For reference, HW/SW identifies as: qmi chip_id 0x120 chip_family 0x4007 board_id 0xff soc_id 0x40670000 qmi fw_version 0x324103d6 fw_build_timestamp 2021-12-02 08:20 fw_build_id QC_IMAGE_VERSION_STRING=WLAN.HL.3.2.4-00982-QCAHLSWMTPLZ-1 Reviewed-by: Konrad Dybcio <[email protected]> Signed-off-by: Dang Huynh <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-07-31arm64: dts: qcom: sm6115-pro1x: Enable remoteprocsDang Huynh1-0/+15
Enable [A,C]DSP and MPSS remote processor on this device. Reviewed-by: Konrad Dybcio <[email protected]> Signed-off-by: Dang Huynh <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-07-31arm64: dts: qcom: sm6115-pro1x: Enable RGB LEDDang Huynh1-0/+27
This device has an RGB LED. It is used for notifications. Reviewed-by: Konrad Dybcio <[email protected]> Signed-off-by: Dang Huynh <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-07-31arm64: dts: qcom: sm6115-pro1x: Add PMI632 Type-C propertyDang Huynh1-3/+48
The USB-C port is used for powering external devices and transfer data from/to them. Reviewed-by: Konrad Dybcio <[email protected]> Signed-off-by: Dang Huynh <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-07-31arm64: dts: qcom: sm6115-pro1x: Hook up USB3 SSDang Huynh1-1/+6
The F(x)tec Pro1X supports USB 3.0 through it's USB-C port. Reviewed-by: Konrad Dybcio <[email protected]> Signed-off-by: Dang Huynh <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-07-31arm64: dts: qcom: sm6115-pro1x: Enable MDSS and GPUDang Huynh1-4/+80
Fxtec Pro1x uses the same display (BOE BF060Y8M-AJ0) as Pro1. Reviewed-by: Konrad Dybcio <[email protected]> Signed-off-by: Dang Huynh <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-07-31arm64: dts: qcom: sm6115-pro1x: Enable SD card slotDang Huynh1-0/+32
Fxtec Pro1X has two card slots and allow either 2xSIM cards or 1xSIM, 1xSD Card configuration. Reviewed-by: Konrad Dybcio <[email protected]> Signed-off-by: Dang Huynh <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-07-31arm64: dts: qcom: sm6115-pro1x: Add Caps Lock LEDDang Huynh1-0/+14
The Pro1X has a caps lock LED on the keyboard. Reviewed-by: Konrad Dybcio <[email protected]> Signed-off-by: Dang Huynh <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-07-31arm64: dts: qcom: sm6115-pro1x: Add Goodix TouchscreenDang Huynh1-0/+49
The Fxtec Pro1X touchscreen uses Goodix GT9286 chip. Signed-off-by: Dang Huynh <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-07-31arm64: dts: qcom: sm6115-pro1x: Add PCA9534 IO ExpanderDang Huynh1-0/+21
F(x)tec Pro1X comes with PCA9534 IO Expander, it is used for enabling touch screen VDD/VDDIO and keyboard's caps lock LED. Reviewed-by: Konrad Dybcio <[email protected]> Signed-off-by: Dang Huynh <[email protected]> Reviewed-by: Caleb Connolly <[email protected]> Link: https://lore.kernel.org/r/[email protected] [bjorn: Dropped unnecessary comment in i2c1] Signed-off-by: Bjorn Andersson <[email protected]>
2024-07-31arm64: dts: qcom: sm6115-pro1x: Add Hall Switch and Camera ButtonDang Huynh1-2/+32
The Pro1X has a flip keyboard and a single-state camera button. Signed-off-by: Dang Huynh <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-08-01firewire: core: utilize kref to maintain fw_node with reference countingTakashi Sakamoto2-5/+12
Current implementation directly uses refcount_t to maintain the life time of fw_node, while kref is available for the same purpose. This commit replaces the implementation with kref. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Takashi Sakamoto <[email protected]>
2024-07-31Merge branch 'ethernet-convert-from-tasklet-to-bh-workqueue'Jakub Kicinski11-71/+73
Allen Pais says: ==================== ethernet: Convert from tasklet to BH workqueue [part] The only generic interface to execute asynchronously in the BH context is tasklet; however, it's marked deprecated and has some design flaws. To replace tasklets, BH workqueue support was recently added. A BH workqueue behaves similarly to regular workqueues except that the queued work items are executed in the BH context. This patch converts a few drivers in drivers/ethernet/* from tasklet to BH workqueue. The next set will be sent out after the next -rc is out. v2: https://lore.kernel.org/[email protected] v1: https://lore.kernel.org/[email protected] ==================== Link: https://patch.msgid.link/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-07-31net: macb: Convert tasklet API to new bottom half workqueue mechanismAllen Pais2-6/+7
Migrate tasklet APIs to the new bottom half workqueue mechanism. It replaces all occurrences of tasklet usage with the appropriate workqueue APIs throughout the macb driver. This transition ensures compatibility with the latest design and enhances performance. Signed-off-by: Allen Pais <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-07-31net: cnic: Convert tasklet API to new bottom half workqueue mechanismAllen Pais2-10/+11
Migrate tasklet APIs to the new bottom half workqueue mechanism. It replaces all occurrences of tasklet usage with the appropriate workqueue APIs throughout the cnic driver. This transition ensures compatibility with the latest design and enhances performance. Signed-off-by: Allen Pais <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-07-31net: xgbe: Convert tasklet API to new bottom half workqueue mechanismAllen Pais5-38/+38
Migrate tasklet APIs to the new bottom half workqueue mechanism. It replaces all occurrences of tasklet usage with the appropriate workqueue APIs throughout the xgbe driver. This transition ensures compatibility with the latest design and enhances performance. Signed-off-by: Allen Pais <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-07-31net: alteon: Convert tasklet API to new bottom half workqueue mechanismAllen Pais2-17/+17
Migrate tasklet APIs to the new bottom half workqueue mechanism. It replaces all occurrences of tasklet usage with the appropriate workqueue APIs throughout the alteon driver. This transition ensures compatibility with the latest design and enhances performance. Signed-off-by: Allen Pais <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-07-31igc: Fix double reset adapter triggered from a single taprio cmdFaizal Rahim1-16/+17
Following the implementation of "igc: Add TransmissionOverrun counter" patch, when a taprio command is triggered by user, igc processes two commands: TAPRIO_CMD_REPLACE followed by TAPRIO_CMD_STATS. However, both commands unconditionally pass through igc_tsn_offload_apply() which evaluates and triggers reset adapter. The double reset causes issues in the calculation of adapter->qbv_count in igc. TAPRIO_CMD_REPLACE command is expected to reset the adapter since it activates qbv. It's unexpected for TAPRIO_CMD_STATS to do the same because it doesn't configure any driver-specific TSN settings. So, the evaluation in igc_tsn_offload_apply() isn't needed for TAPRIO_CMD_STATS. To address this, commands parsing are relocated to igc_tsn_enable_qbv_scheduling(). Commands that don't require an adapter reset will exit after processing, thus avoiding igc_tsn_offload_apply(). Fixes: d3750076d464 ("igc: Add TransmissionOverrun counter") Signed-off-by: Faizal Rahim <[email protected]> Acked-by: Vinicius Costa Gomes <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Tested-by: Mor Bar-Gabay <[email protected]> Signed-off-by: Tony Nguyen <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-07-31Merge branch 'mlxsw-core_thermal-small-cleanups'Jakub Kicinski1-31/+12
Petr Machata says: ==================== mlxsw: core_thermal: Small cleanups Ido Schimmel says: Clean up various issues which I noticed while addressing feedback on a different patchset. ==================== Link: https://patch.msgid.link/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-07-31mlxsw: core_thermal: Fix -Wformat-truncation warningIdo Schimmel1-1/+1
The name of a thermal zone device cannot be longer than 19 characters ('THERMAL_NAME_LENGTH - 1'). The format string 'mlxsw-lc%d-module%d' can exceed this limitation if the maximum number of line cards cannot be represented using a single digit and the maximum number of transceiver modules cannot be represented using two digits. This is not the case with current systems nor future ones. Therefore, increase the size of the result buffer beyond 'THERMAL_NAME_LENGTH' and suppress the following build warning [1]. If this limitation is ever exceeded, we will know about it since the thermal core validates the thermal device's name during registration. [1] drivers/net/ethernet/mellanox/mlxsw/core_thermal.c: In function ‘mlxsw_thermal_modules_init.part.0’: drivers/net/ethernet/mellanox/mlxsw/core_thermal.c:418:70: error: ‘%d’ directive output may be truncated writing between 1 and 3 bytes into a region of size between 2 and 4 [-Werror=format-truncation=] 418 | snprintf(tz_name, sizeof(tz_name), "mlxsw-lc%d-module%d", | ^~ In function ‘mlxsw_thermal_module_tz_init’, inlined from ‘mlxsw_thermal_module_init’ at drivers/net/ethernet/mellanox/mlxsw/core_thermal.c:465:9, inlined from ‘mlxsw_thermal_modules_init.part.0’ at drivers/net/ethernet/mellanox/mlxsw/core_thermal.c:500:9: drivers/net/ethernet/mellanox/mlxsw/core_thermal.c:418:52: note: directive argument in the range [1, 256] 418 | snprintf(tz_name, sizeof(tz_name), "mlxsw-lc%d-module%d", | ^~~~~~~~~~~~~~~~~~~~~ drivers/net/ethernet/mellanox/mlxsw/core_thermal.c:418:17: note: ‘snprintf’ output between 18 and 22 bytes into a destination of size 20 418 | snprintf(tz_name, sizeof(tz_name), "mlxsw-lc%d-module%d", | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 419 | module_tz->slot_index, module_tz->module + 1); | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Signed-off-by: Ido Schimmel <[email protected]> Reviewed-by: Vadim Pasternak <[email protected]> Signed-off-by: Petr Machata <[email protected]> Reviewed-by: Wojciech Drewek <[email protected]> Link: https://patch.msgid.link/583a70c6dbe75e6bf0c2c58abbb3470a860d2dc3.1722345311.git.petrm@nvidia.com Signed-off-by: Jakub Kicinski <[email protected]>
2024-07-31mlxsw: core_thermal: Remove unnecessary assignmentsIdo Schimmel1-2/+0
Setting both pointers to NULL is unnecessary since the code never checks whether these pointers are NULL or not. Remove the assignments. Signed-off-by: Ido Schimmel <[email protected]> Reviewed-by: Vadim Pasternak <[email protected]> Signed-off-by: Petr Machata <[email protected]> Reviewed-by: Wojciech Drewek <[email protected]> Link: https://patch.msgid.link/ea646f5d7642fffd5393fa23650660ab8f77a511.1722345311.git.petrm@nvidia.com Signed-off-by: Jakub Kicinski <[email protected]>
2024-07-31mlxsw: core_thermal: Remove unnecessary checksIdo Schimmel1-5/+3
mlxsw_thermal_module_fini() cannot be invoked with a thermal module which is NULL or which is not associated with a thermal zone, so remove these checks. Signed-off-by: Ido Schimmel <[email protected]> Reviewed-by: Vadim Pasternak <[email protected]> Signed-off-by: Petr Machata <[email protected]> Reviewed-by: Wojciech Drewek <[email protected]> Link: https://patch.msgid.link/8db5fe0a3a28ba09a15d4102cc03f7e8ca7675be.1722345311.git.petrm@nvidia.com Signed-off-by: Jakub Kicinski <[email protected]>
2024-07-31mlxsw: core_thermal: Simplify rollbackIdo Schimmel1-1/+1
During rollback, instead of calling mlxsw_thermal_module_fini() for all the modules, only call it for modules that were successfully initialized. This is not a bug fix since mlxsw_thermal_module_fini() first checks that the module was initialized. Signed-off-by: Ido Schimmel <[email protected]> Reviewed-by: Vadim Pasternak <[email protected]> Signed-off-by: Petr Machata <[email protected]> Reviewed-by: Wojciech Drewek <[email protected]> Link: https://patch.msgid.link/905bebc45f6e246031f0c5c177bba8efe11e05f5.1722345311.git.petrm@nvidia.com Signed-off-by: Jakub Kicinski <[email protected]>
2024-07-31mlxsw: core_thermal: Make mlxsw_thermal_module_{init, fini} symmetricIdo Schimmel1-7/+6
mlxsw_thermal_module_fini() de-initializes the module's thermal zone, but mlxsw_thermal_module_init() does not initialize it. Make both functions symmetric by moving the initialization of the module's thermal zone to mlxsw_thermal_module_init(). Signed-off-by: Ido Schimmel <[email protected]> Reviewed-by: Vadim Pasternak <[email protected]> Signed-off-by: Petr Machata <[email protected]> Reviewed-by: Wojciech Drewek <[email protected]> Link: https://patch.msgid.link/a661ad468f8ad0d7d533d8334e4abf61dfe34342.1722345311.git.petrm@nvidia.com Signed-off-by: Jakub Kicinski <[email protected]>
2024-07-31mlxsw: core_thermal: Remove unused argumentsIdo Schimmel1-3/+2
'dev' and 'core' arguments are not used by mlxsw_thermal_module_init(). Remove them. Signed-off-by: Ido Schimmel <[email protected]> Reviewed-by: Vadim Pasternak <[email protected]> Signed-off-by: Petr Machata <[email protected]> Reviewed-by: Wojciech Drewek <[email protected]> Link: https://patch.msgid.link/563fc7383f61809a306b9954872219eaaf3c689b.1722345311.git.petrm@nvidia.com Signed-off-by: Jakub Kicinski <[email protected]>
2024-07-31mlxsw: core_thermal: Fold two loops into oneIdo Schimmel1-3/+1
There is no need to traverse the same array twice. Do it once by folding both loops into one. Signed-off-by: Ido Schimmel <[email protected]> Reviewed-by: Vadim Pasternak <[email protected]> Signed-off-by: Petr Machata <[email protected]> Reviewed-by: Wojciech Drewek <[email protected]> Link: https://patch.msgid.link/81756744ed532aaa9249a83fc08757accfe8b07c.1722345311.git.petrm@nvidia.com Signed-off-by: Jakub Kicinski <[email protected]>
2024-07-31mlxsw: core_thermal: Remove another unnecessary checkIdo Schimmel1-2/+0
mlxsw_thermal_modules_init() allocates an array of modules and then initializes each entry by calling mlxsw_thermal_module_init() which among other things initializes the 'parent' pointer of the entry. mlxsw_thermal_modules_init() then traverses over the array again, but skips over entries that do not have their 'parent' pointer set which is impossible given the above. Therefore, remove the unnecessary check. Signed-off-by: Ido Schimmel <[email protected]> Reviewed-by: Vadim Pasternak <[email protected]> Signed-off-by: Petr Machata <[email protected]> Reviewed-by: Wojciech Drewek <[email protected]> Link: https://patch.msgid.link/fb3e8ded422a441436431d5785b900f11ffc9621.1722345311.git.petrm@nvidia.com Signed-off-by: Jakub Kicinski <[email protected]>
2024-07-31mlxsw: core_thermal: Remove unnecessary checkIdo Schimmel1-3/+0
mlxsw_thermal_modules_init() allocates an array of modules and then calls mlxsw_thermal_module_init() to initialize each entry in the array. It is therefore impossible for mlxsw_thermal_module_init() to encounter an entry that is already initialized and has its 'parent' pointer set. Remove the unnecessary check. Signed-off-by: Ido Schimmel <[email protected]> Reviewed-by: Vadim Pasternak <[email protected]> Signed-off-by: Petr Machata <[email protected]> Reviewed-by: Wojciech Drewek <[email protected]> Signed-off-by: Jakub Kicinski <[email protected]>
2024-07-31mlxsw: core_thermal: Call thermal_zone_device_unregister() unconditionallyIdo Schimmel1-8/+2
The function returns immediately if the thermal zone pointer is NULL so there is no need to check it before calling the function. Remove the check. Signed-off-by: Ido Schimmel <[email protected]> Reviewed-by: Vadim Pasternak <[email protected]> Signed-off-by: Petr Machata <[email protected]> Reviewed-by: Wojciech Drewek <[email protected]> Link: https://patch.msgid.link/0bd251aa8ce03d3c951983aa6b4300d8205b88a7.1722345311.git.petrm@nvidia.com Signed-off-by: Jakub Kicinski <[email protected]>
2024-07-31drm/xe/xe2: Enable Priority Mem ReadPallavi Mishra2-0/+7
Enable feature to allow memory reads to take a priority memory path. This will reduce latency on the read path, but may introduce read after write (RAW) hazards as read and writes will no longer be ordered. To avoid RAW hazards, SW can use the MI_MEM_FENCE command or any other MI command that generates non posted memory writes. This will ensure data is coherent in memory prior to execution of commands which read data from memory. RCS,BCS and CCS support this feature. No pattern identified in KMD that could lead to a hazard. v2: Modify commit message, enable priority mem read feature for media, modify version range, modify bspec detail (Matt Roper) v3: Rebase, fix cramped line-wrapping (jcavitt) v4: Rebase v5: Media does not support Priority Mem Read. Modify commit to reflect the same. v6: Rebase Bspec: 60298, 60237, 60187, 60188 Signed-off-by: Pallavi Mishra <[email protected]> Reviewed-by: Matt Roper <[email protected]> Acked-by: José Roberto de Souza <[email protected]> Acked-by: Carl Zhang <[email protected]> Signed-off-by: Matt Roper <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-07-31net: MAINTAINERS: Demote Qualcomm IPA to "maintained"Krzysztof Kozlowski1-1/+1
To the best of my knowledge, Alex Elder is not being paid to support Qualcomm IPA networking drivers, so drop the status from "supported" to "maintained". Signed-off-by: Krzysztof Kozlowski <[email protected]> Acked-by: Alex Elder <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-07-31net: wan: fsl_qmc_hdlc: Discard received CRCHerve Codina1-6/+18
Received frame from QMC contains the CRC. Upper layers don't need this CRC and tcpdump mentioned trailing junk data due to this CRC presence. As some other HDLC driver, simply discard this CRC. Fixes: d0f2258e79fd ("net: wan: Add support for QMC HDLC") Cc: [email protected] Signed-off-by: Herve Codina <[email protected]> Reviewed-by: Simon Horman <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-07-31net: wan: fsl_qmc_hdlc: Convert carrier_lock spinlock to a mutexHerve Codina1-3/+4
The carrier_lock spinlock protects the carrier detection. While it is held, framer_get_status() is called which in turn takes a mutex. This is not correct and can lead to a deadlock. A run with PROVE_LOCKING enabled detected the issue: [ BUG: Invalid wait context ] ... c204ddbc (&framer->mutex){+.+.}-{3:3}, at: framer_get_status+0x40/0x78 other info that might help us debug this: context-{4:4} 2 locks held by ifconfig/146: #0: c0926a38 (rtnl_mutex){+.+.}-{3:3}, at: devinet_ioctl+0x12c/0x664 #1: c2006a40 (&qmc_hdlc->carrier_lock){....}-{2:2}, at: qmc_hdlc_framer_set_carrier+0x30/0x98 Avoid the spinlock usage and convert carrier_lock to a mutex. Fixes: 54762918ca85 ("net: wan: fsl_qmc_hdlc: Add framer support") Cc: [email protected] Signed-off-by: Herve Codina <[email protected]> Reviewed-by: Simon Horman <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-07-31Merge branch 'mlx5-misc-fixes-2024-07-30'Jakub Kicinski9-11/+26
Tariq Toukan says: ==================== mlx5 misc fixes 2024-07-30 This patchset provides misc bug fixes from the team to the mlx5 core and Eth drivers. ==================== Link: https://patch.msgid.link/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-07-31net/mlx5e: Add a check for the return value from mlx5_port_set_eth_ptysShahar Shitrit1-1/+6
Since the documentation for mlx5_toggle_port_link states that it should only be used after setting the port register, we add a check for the return value from mlx5_port_set_eth_ptys to ensure the register was successfully set before calling it. Fixes: 667daedaecd1 ("net/mlx5e: Toggle link only after modifying port parameters") Signed-off-by: Shahar Shitrit <[email protected]> Reviewed-by: Carolina Jubran <[email protected]> Signed-off-by: Tariq Toukan <[email protected]> Reviewed-by: Wojciech Drewek <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-07-31net/mlx5e: Fix CT entry update leaks of modify header contextChris Mi1-0/+1
The cited commit allocates a new modify header to replace the old one when updating CT entry. But if failed to allocate a new one, eg. exceed the max number firmware can support, modify header will be an error pointer that will trigger a panic when deallocating it. And the old modify header point is copied to old attr. When the old attr is freed, the old modify header is lost. Fix it by restoring the old attr to attr when failed to allocate a new modify header context. So when the CT entry is freed, the right modify header context will be freed. And the panic of accessing error pointer is also fixed. Fixes: 94ceffb48eac ("net/mlx5e: Implement CT entry update") Signed-off-by: Chris Mi <[email protected]> Signed-off-by: Tariq Toukan <[email protected]> Reviewed-by: Wojciech Drewek <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-07-31net/mlx5e: Require mlx5 tc classifier action support for IPsec prio capabilityRahul Rameshbabu1-3/+4
Require mlx5 classifier action support when creating IPSec chains in offload path. MLX5_IPSEC_CAP_PRIO should only be set if CONFIG_MLX5_CLS_ACT is enabled. If CONFIG_MLX5_CLS_ACT=n and MLX5_IPSEC_CAP_PRIO is set, configuring IPsec offload will fail due to the mlxx5 ipsec chain rules failing to be created due to lack of classifier action support. Fixes: fa5aa2f89073 ("net/mlx5e: Use chains for IPsec policy priority offload") Signed-off-by: Rahul Rameshbabu <[email protected]> Reviewed-by: Leon Romanovsky <[email protected]> Signed-off-by: Tariq Toukan <[email protected]> Reviewed-by: Wojciech Drewek <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-07-31net/mlx5: Fix missing lock on sync reset reloadMoshe Shemesh1-1/+4
On sync reset reload work, when remote host updates devlink on reload actions performed on that host, it misses taking devlink lock before calling devlink_remote_reload_actions_performed() which results in triggering lock assert like the following: WARNING: CPU: 4 PID: 1164 at net/devlink/core.c:261 devl_assert_locked+0x3e/0x50 … CPU: 4 PID: 1164 Comm: kworker/u96:6 Tainted: G S W 6.10.0-rc2+ #116 Hardware name: Supermicro SYS-2028TP-DECTR/X10DRT-PT, BIOS 2.0 12/18/2015 Workqueue: mlx5_fw_reset_events mlx5_sync_reset_reload_work [mlx5_core] RIP: 0010:devl_assert_locked+0x3e/0x50 … Call Trace: <TASK> ? __warn+0xa4/0x210 ? devl_assert_locked+0x3e/0x50 ? report_bug+0x160/0x280 ? handle_bug+0x3f/0x80 ? exc_invalid_op+0x17/0x40 ? asm_exc_invalid_op+0x1a/0x20 ? devl_assert_locked+0x3e/0x50 devlink_notify+0x88/0x2b0 ? mlx5_attach_device+0x20c/0x230 [mlx5_core] ? __pfx_devlink_notify+0x10/0x10 ? process_one_work+0x4b6/0xbb0 process_one_work+0x4b6/0xbb0 […] Fixes: 84a433a40d0e ("net/mlx5: Lock mlx5 devlink reload callbacks") Signed-off-by: Moshe Shemesh <[email protected]> Reviewed-by: Maor Gottlieb <[email protected]> Signed-off-by: Tariq Toukan <[email protected]> Reviewed-by: Wojciech Drewek <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-07-31net/mlx5: Lag, don't use the hardcoded value of the first portMark Bloch1-1/+1
The cited commit didn't change the body of the loop as it should. It shouldn't be using MLX5_LAG_P1. Fixes: 7e978e7714d6 ("net/mlx5: Lag, use actual number of lag ports") Signed-off-by: Mark Bloch <[email protected]> Signed-off-by: Tariq Toukan <[email protected]> Reviewed-by: Wojciech Drewek <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-07-31net/mlx5: DR, Fix 'stack guard page was hit' error in dr_ruleYevgeny Kliteynik1-1/+1
This patch reduces the size of hw_ste_arr_optimized array that is allocated on stack from 640 bytes (5 match STEs + 5 action STES) to 448 bytes (2 match STEs + 5 action STES). This fixes the 'stack guard page was hit' issue, while still fitting majority of the usecases (up to 2 match STEs). Signed-off-by: Yevgeny Kliteynik <[email protected]> Reviewed-by: Alex Vesker <[email protected]> Signed-off-by: Tariq Toukan <[email protected]> Reviewed-by: Wojciech Drewek <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
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