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The Symphony board uses GPIO from expander as Ethernet PHY reset pin,
not the GPIO1_IO9.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The i2c3 clock frequency and pin configuration are already set by
imx8mm-var-som.dtsi.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The watchdog driver for MT8183 relies on DT data, so the fallback
compatible MT6589 won't work, need to update watchdog device node
to sync with watchdog dt-binding document.
Signed-off-by: Crystal Guo <[email protected]>
Acked-by: Guenter Roeck <[email protected]>
Signed-off-by: Matthias Brugger <[email protected]>
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All Purism Librem5 phones have three compatibles so they need their own
entry to fix dbts_check warnings like:
arch/arm64/boot/dts/freescale/imx8mq-librem5-r2.dt.yaml: /:
compatible: ['purism,librem5r2', 'purism,librem5', 'fsl,imx8mq'] is not valid under any of the given schemas
arch/arm64/boot/dts/freescale/imx8mq-librem5-r2.dt.yaml: /:
compatible: ['purism,librem5r2', 'purism,librem5', 'fsl,imx8mq'] is too long
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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We intend to use one header file for SERDES MUX for all
TI SoCs so rename the header file.
The exsting macros are too generic. Prefix them with SoC name.
While at that, add the missing configurations for completeness.
Fixes: b766e3b0d5f6 ("arm64: dts: ti: k3-j721e-main: Add system controller node and SERDES lane mux")
Reported-by: Peter Rosin <[email protected]>
Signed-off-by: Roger Quadros <[email protected]>
Signed-off-by: Nishanth Menon <[email protected]>
Acked-by: Peter Rosin <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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bus-width and non-removable is not used by the driver.
max-frequency should be spi-max-frequency for flash node.
Fixes: 689b937bedde ("arm64: dts: mediatek: add mt8173 elm and hana board")
Reported-by: Nicolas Boichat <[email protected]>
Signed-off-by: Hsin-Yi Wang <[email protected]>
Reviewed-by: Enric Balletbo i Serra <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Matthias Brugger <[email protected]>
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port6 of mt7530 switch (= cpu port 0) on bananapi-r2 misses pause option
which causes rx drops on running iperf.
Fixes: f4ff257cd160 ("arm: dts: mt7623: add support for Bananapi R2 (BPI-R2) board")
Signed-off-by: Frank Wunderlich <[email protected]>
Cc: [email protected]
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Matthias Brugger <[email protected]>
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Correct the property for reset GPIOs of tca6416 GPIO expander.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Matthias Brugger <[email protected]>
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GPIO_ACTIVE_x flags are not correct in the context of interrupt flags.
These are simple defines so they could be used in DTS but they will not
have the same meaning:
1. GPIO_ACTIVE_HIGH = 0 = IRQ_TYPE_NONE
2. GPIO_ACTIVE_LOW = 1 = IRQ_TYPE_EDGE_RISING
Correct the interrupt flags, assuming the author of the code wanted same
logical behavior behind the name "ACTIVE_xxx", this is:
ACTIVE_LOW => IRQ_TYPE_LEVEL_LOW
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
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Add initial support for the libretech aml-s905x-cc (Le Potato) v2
Signed-off-by: Jerome Brunet <[email protected]>
Signed-off-by: Kevin Hilman <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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Add support for the 2nd version of the libretch aml-s905x-cc.
Signed-off-by: Jerome Brunet <[email protected]>
Signed-off-by: Kevin Hilman <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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HardKernel ODROID-N2+ uses an Amlogic S922X rev. C chip capable of higher
clock speeds than the original ODROID-N2.
The rev. C support a slighly higher VDDCPU_A & VDDCPU_B voltages and supports
the same OPPs as the Amlogic A311D SoC from the same G12B family.
Suggested-by: Dongjin Kim <[email protected]>
Signed-off-by: Christian Hewitt <[email protected]>
Signed-off-by: Neil Armstrong <[email protected]>
Signed-off-by: Kevin Hilman <[email protected]>
Acked-by: Martin Blumenstingl <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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HardKernel ODROID-N2+ uses a revised Amlogic S922X v2 chip that supports
higher cpu clock speeds than the original ODROID-N2.
Signed-off-by: Christian Hewitt <[email protected]>
Signed-off-by: Neil Armstrong <[email protected]>
Signed-off-by: Kevin Hilman <[email protected]>
Acked-by: Rob Herring <[email protected]>
Acked-by: Martin Blumenstingl <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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Convert the current ODROID-N2 dts into a common dtsi in preparation
for adding ODROID-N2+ support.
Signed-off-by: Christian Hewitt <[email protected]>
Signed-off-by: Neil Armstrong <[email protected]>
Signed-off-by: Kevin Hilman <[email protected]>
Acked-by: Neil Armstrong <[email protected]>
Acked-by: Martin Blumenstingl <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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The NVIDIA Tegra234 VDK is a simulation platform for the Orin SoC. It
supports a subset of the peripherals that will be available in the final
chip and serves as a bootstrapping platform.
Reviewed-by: Jon Hunter <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
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Summit SMB3xx series is a Programmable Switching Li+ Battery Charger.
This patch adds device-tree binding for Summit SMB345, SMB347 and SMB358
chargers.
Signed-off-by: David Heidelberg <[email protected]>
Signed-off-by: Dmitry Osipenko <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
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The PMC found on Tegra234 is mostly similar to the one on Tegra194 but
supports slightly different I/O pads and wake events.
Reviewed-by: Jon Hunter <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
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The Tegra234 FUSE block is very similar to that on prior chips but not
completely compatible. Document the new compatible string.
Reviewed-by: Jon Hunter <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
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The NVIDIA Tegra234 VDK is a simulation platform for the Orin SoC. It
supports a subset of the peripherals that will be available in the final
chip and serves as a bootstrapping platform.
Reviewed-by: Jon Hunter <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
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The MISC block found on Tegra234 is mostly similar to the one on
Tegra194 but supports slightly different register sets that make
it incompatible.
Reviewed-by: Jon Hunter <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
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Add the missing compatible string for the Tegra194 MISC block.
Reviewed-by: Jon Hunter <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
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The compatible string for the Tegra210 APBMISC block was missing from
the bindings. Add it and while at it, rewrite the description of the
compatible string to make it clearer.
Reviewed-by: Jon Hunter <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
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According to Technical Update TN-RCT-S0352A/E, MSIOF1 DMA can only be
used with SYS-DMAC0 on R-Car E3.
Fixes: 62c0056f1c3eb15d ("arm64: dts: renesas: r8a774c0: Add MSIOF nodes")
Signed-off-by: Geert Uytterhoeven <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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According to Technical Update TN-RCT-S0352A/E, MSIOF1 DMA can only be
used with SYS-DMAC0 on R-Car E3.
Fixes: 8517042060b55a37 ("arm64: dts: renesas: r8a77990: Add DMA properties to MSIOF nodes")
Signed-off-by: Geert Uytterhoeven <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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V3s contains crypto engine that is compatible with A33.
Add device tree node.
Signed-off-by: Martin Cerveny <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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Allwinner V3s has crypto engine similar to that in A33.
So add compatible.
Signed-off-by: Martin Cerveny <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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When adding allwinner,sun8i-a33-crypto, I forgot to add that it needs reset.
Furthermore, there are no need to use items to list only one compatible
in compatible list.
Fixes: f81547ba7a98 ("dt-bindings: crypto: add new compatible for A33 SS")
Signed-off-by: Corentin Labbe <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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The audio codec in the A64 has some differences from the A33 codec, so
it needs its own compatible. Since the two codecs are similar, the A33
codec compatible is kept as a fallback.
Using the correct compatible fixes a channel inversion issue and cleans
up some DAPM widgets that are no longer used.
Signed-off-by: Samuel Holland <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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The sun8i-codec driver introduced a new set of DAPM widgets that more
accurately describe the hardware topology. Update the various device
trees to use the new widget names.
Signed-off-by: Samuel Holland <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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The sun8i-codec driver introduced a new set of DAPM widgets that more
accurately describe the hardware topology. Update the various device
trees to use the new widget names.
Signed-off-by: Samuel Holland <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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Allwinner R40 SoC has a video engine.
Add a node for it.
Signed-off-by: Jernej Skrabec <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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SMB347 is a battery charger controller which is found on the Nexus 7
device.
Signed-off-by: David Heidelberg <[email protected]>
Signed-off-by: Dmitry Osipenko <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
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Nexus 7 2012 has Elantech EKTF3624 touchscreen, this patch adds TS node to
the device-tree.
Signed-off-by: Dmitry Osipenko <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
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The default parent for all MMCs is PLLP, which is running at 408 MHz on
Tegra30 and 50 MHz clock can't be derived from PLLP. The maximum SDIO
clock rate is 50 MHz, but this rate isn't achievable using PLLP.
Let's switch the WiFi MMC clock parent to PLLC in order to get true 50
MHz. This patch doesn't fix any problems, it's just a minor improvement.
Signed-off-by: Dmitry Osipenko <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
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The default parent for all MMCs is PLLP, which is running at 216 MHz on
Tegra20 and 50 MHz clock can't be derived from PLLP. The maximum SDIO
clock rate is 50 MHz, but this rate isn't achievable using PLLP.
Let's switch the WiFi MMC clock parent to PLLC in order to get true 50
MHz. This patch doesn't fix any problems, it's just a minor improvement.
Signed-off-by: Dmitry Osipenko <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
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Previously 50MHz clock rate didn't work because of the wrong PINCTRL
configuration used for SDIO pins. Now the PINCTRL config is corrected
and the MMC clock rate could be bumped safely to 50MHz, increasing WiFi
TX throughput by 20 Mbit/s and allowing to hit the maximum 40 Mbit/s.
Signed-off-by: Dmitry Osipenko <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
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The low-power-mode drive was set to DIV_4 for some of PINCTRL groups,
while these groups should use DIV_1. This patch fixes the wrong PINCTRL
configurations and adds a full drive-setup for the changed configs, just
for completeness since the added values match the default configuration.
Now WiFi SDIO communication works properly using legacy signaling mode if
SDIO BUS clocked at 50MHz, which is a maximum SDIO clock rate on Tegra20.
Signed-off-by: Dmitry Osipenko <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
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This property was supposed to be upstreamed, but it was NAKed recently
in a favor to a better approach of firmware loading. It also turned
out that the firmware loading isn't really necessary because it's stored
in a non-volatile memory inside of the touchscreen controller and
previously the FW loading was needed in order to get touchscreen working,
but it actually was a TS driver problem which is resolved now. Hence
remove the unsupported property.
Signed-off-by: Dmitry Osipenko <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
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MMC core now supports binding to a specific ID, which is very handy for
embedded devices, like Acer A500, because MMC ID may change depending on
kernel version or configuration which affects MMC driver probe order.
Signed-off-by: Dmitry Osipenko <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
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MMC core now supports binding to a specific ID, which is very handy for
embedded devices, like Nexus 7, because MMC ID may change depending on
kernel version or configuration which affects MMC driver probe order.
Signed-off-by: Dmitry Osipenko <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
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Summit SMB3xx series is a Programmable Switching Li+ Battery Charger.
This patch adds device-tree binding for Summit SMB345, SMB347 and SMB358
chargers.
Signed-off-by: David Heidelberg <[email protected]>
Signed-off-by: Dmitry Osipenko <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
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The PMC found on Tegra234 is mostly similar to the one on Tegra194 but
supports slightly different I/O pads and wake events.
Signed-off-by: Thierry Reding <[email protected]>
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The Tegra234 FUSE block is very similar to that on prior chips but not
completely compatible. Document the new compatible string.
Reviewed-by: Jon Hunter <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
|
|
The NVIDIA Tegra234 VDK is a simulation platform for the Orin SoC. It
supports a subset of the peripherals that will be available in the final
chip and serves as a bootstrapping platform.
Reviewed-by: Jon Hunter <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
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The MISC block found on Tegra234 is mostly similar to the one on
Tegra194 but supports slightly different register sets that make
it incompatible.
Signed-off-by: Thierry Reding <[email protected]>
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Add the missing compatible string for the Tegra194 MISC block.
Signed-off-by: Thierry Reding <[email protected]>
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The compatible string for the Tegra210 APBMISC block was missing from
the bindings. Add it and while at it, rewrite the description of the
compatible string to make it clearer.
Signed-off-by: Thierry Reding <[email protected]>
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Populate the EEPROMs that are present on the Jetson Xavier NX developer
platform.
Signed-off-by: Jon Hunter <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
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Populate the label property for the AT24 EEPROMs on the various Jetson
platforms. Note that the name 'module' is used to identify the EEPROM
on the processor module board and the name 'system' is used to identify
the EEPROM on the main base board (which is sometimes referred to as
the carrier board).
Signed-off-by: Jon Hunter <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
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