aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)AuthorFilesLines
2017-09-28amdgpu/pp: slim down the pwr virus tables.Dave Airlie4-20324/+20284
This is what I'd call slightly overengineered, we waste 40k on storing a value that is write or end, when we could just use the register value to denote end. Remove the virus command parameter, and save text data bss dec hex filename 1412724 17982 1008 1431714 15d8a2 ../drm-next-build/drivers/gpu/drm/amd/amdgpu/amdgpu.o 1331332 17982 1008 1350322 149ab2 ../drm-next-build/drivers/gpu/drm/amd/amdgpu/amdgpu.o Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-28amdgpu/pp: move amdgpu_fuses_default into static const.Dave Airlie3-5/+3
There is no reason that this gets passed back into the function from outside the file, just reference the table directly. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-28amdgpu/pp: move PhwVega10_Magic to static const.Dave Airlie2-2/+1
This isn't used outside this file. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-28amdgpu/pp: remove ci_smc/smumgr split.Dave Airlie4-154/+71
This split serves no purpose, and we can make a bunch of functions static now. There are lots of cases of this sort of split in the powerplay code, please start cleaning them up. Ideally the function table is in the same file as all the implementations used in it. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-28drm/amdgpu/vega10: static constify channel_numberDave Airlie1-1/+1
Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-28drm/amdgpu/pp: constify some powerplay tablesDave Airlie1-7/+7
Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-28amdgpu/powerplay: constify large structDave Airlie2-4/+4
This moves this from being global data to global rodata, I'm sure it would be easy to move it to being local data. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-28amdgpu: don't ask about CHASH just default it for now.Dave Airlie1-1/+2
If we bump this up a level, we can ask about it, for now, just default to what amdgpu does. Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Dave Airlie <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-28drm/amdgpu: map compute rings by least recently used pipeAndres Rodriguez3-10/+28
This patch provides a guarantee that the first n queues allocated by an application will be on different pipes. Where n is the number of pipes available from the hardware. This helps avoid ring aliasing which can result in work executing in time-sliced mode instead of truly parallel mode. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Andres Rodriguez <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-28drm/amdgpu: add option for force enable multipipe policy for computeAndres Rodriguez3-0/+11
Useful for testing the effects of multipipe compute without recompiling. Acked-by: Felix Kuehling <[email protected]> Signed-off-by: Andres Rodriguez <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-28drm/amdgpu: use multipipe compute policy on non PL11 asicsAndres Rodriguez1-2/+12
A performance regression for OpenCL tests on Polaris11 had this feature disabled for all asics. Instead, disable it selectively on the affected asics. Acked-by: Felix Kuehling <[email protected]> Signed-off-by: Andres Rodriguez <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-28drm/amdgpu: fix vf error handlingAlex Deucher4-41/+54
The error handling for virtual functions assumed a single vf per VM and didn't properly account for bare metal. Make the error arrays per device and add locking. Reviewed-by: Gavin Wan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-26drm/amdgpu: clarify license in amdgpu_trace_points.cAlex Deucher1-0/+19
It was not clear. The rest of the driver is MIT/X11. Reviewed-by: Christian König <[email protected]> Acked-by: Dave Airlie <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-26drm/amdgpu: Add gem_prime_mmap supportSamuel Li3-0/+36
v2: drop hdp invalidate/flush. v3: honor pgoff during prime mmap. Add a barrier after cpu access. v4: drop begin/end_cpu_access() for now, revisit later. Signed-off-by: Samuel Li <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-26drm/amd/powerplay: delete dead code in smumgrRex Zhu2-119/+0
Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-26drm/amd/powerplay: delete SMUM_FIELD_MASKRex Zhu1-2/+2
repeated defining in hwmgr.h Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-26drm/amd/powerplay: delete SMUM_WAIT_INDIRECT_FIELDRex Zhu3-13/+2
repeated defining in hwmgr.h use PHM_WAIT_INDIRECT_FIELD instand. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-26drm/amd/powerplay: delete SMUM_READ_FIELDRex Zhu4-7/+5
repeated defining in hwmgr.h Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-26drm/amd/powerplay: delete SMUM_SET_FIELDRex Zhu2-11/+6
repeated defining in hwmgr.h Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-26drm/amd/powerplay: delete SMUM_READ_VFPF_INDIRECT_FIELDRex Zhu6-14/+9
repeated defining in hwmgr.h Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-26drm/amd/powerplay: delete SMUM_WRITE_VFPF_INDIRECT_FIELDRex Zhu4-29/+23
repeated defining in hwmgr.h Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-26drm/amd/powerplay: delete SMUM_WRITE_FIELDRex Zhu4-11/+8
the macro is as same as PHM_WRITE_FIELD Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-26drm/amd/powerplay: delete SMU_WRITE_INDIRECT_FIELDRex Zhu3-21/+6
the macro is as same as PHM_WRITE_INDIRECT_FIELD Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-26drm/amd/powerplay: move macros to hwmgr.hRex Zhu6-22/+22
the macro is not relevant to SMU, so rename SMU_WAIT_FIELD_UNEQUAL to PHM_WAIT_FIELD_UNEQUAL and move to hwmgr.h Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-26drm/amd/powerplay: move PHM_WAIT_VFPF_INDIRECT_FIELD to hwmgr.hRex Zhu6-23/+25
the macro is not relevant to SMU, so move to hwmgr.h and rename to PHM_WAIT_VFPF_INDIRECT_FIELD Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-26drm/amd/powerplay: move SMUM_WAIT_VFPF_INDIRECT_FIELD_UNEQUAL to hwmgr.hRex Zhu5-18/+22
the macro is not relevant to SMU, so move to hwmgr.h and rename to PHM_WAIT_VFPF_INDIRECT_FIELD_UNEQUAL Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-26drm/amd/powerplay: move SMUM_WAIT_INDIRECT_FIELD_UNEQUAL to hwmgr.hRex Zhu4-12/+16
the macro is not relevent to SMU, so move to hwmgr.h and rename to PHM_WAIT_INDIRECT_FIELD_UNEQUAL Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-26drm/amd/powerplay: add new helper functions in hwmgr.hRex Zhu5-9/+50
Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-26drm/amd/powerplay: use SMU_IND_INDEX/DATA_11 pairRex Zhu2-3/+3
in VFPF macros to support virtualization Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-26drm/amd/powerplay: refine powerplay code.Rex Zhu22-425/+339
delete struct smumgr, put smu backend function table in struct hwmgr Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-26drm/amd/powerplay: delete dead code in hwmgr.hRex Zhu1-11/+0
Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-26drm/amd/powerplay: refine interface in struct pp_smumgr_funcRex Zhu32-1248/+1225
unify to use struct hwmgr as function parameter in smumgr. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-26drm/amdgpu: simplify pinning into visible VRAMChristian König1-15/+8
Just set the CPU access required flag when we pin it. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-26drm/amdgpu:fix firmware memoryleak(v2)Monk Liu6-0/+37
this fix memory leak due to request_firmware after driver unloaded v2: release gmc firmware for gmc6/7/8 as well Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-26drm/amdgpu:fix uvd ring fini routine(v2)Monk Liu1-0/+4
fix missing finish uvd enc_ring. v2: since the adev pointer check in already in ring_fini so drop the check outsider Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-26drm/amdgpu/sriov:alloc KIQ MQD in VRAM(v2)Monk Liu1-1/+6
this way after KIQ MQD released in drv unloading, CPC can still let KIQ access this MQD thus RLCV SAVE_VF will not fail v2: always use VRAM domain for KIQ MQD no matter BM or SRIOV Signed-off-by: Monk Liu <[email protected]> Acked-by: Alex Deucher <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-26drm/amdgpu:unmap KCQ in gfx hw_fini(v2)Monk Liu2-0/+115
v2: move kcq_disable out of SRIOV, make it genearal Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-26drm/amdgpu:halt when vm faultMonk Liu2-0/+13
only with this way we can debug the VMC page fault issue Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-26drm/amdgpu: Add copy_pte_num_dw member in amdgpu_vm_pte_funcsYong Zhao7-1/+15
Use it to replace the hard coded value in amdgpu_vm_bo_update_mapping(). Signed-off-by: Yong Zhao <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-26drm/amdgpu: Fix a bug in amdgpu_fill_buffer()Yong Zhao8-6/+30
When max_bytes is not 8 bytes aligned and bo size is larger than max_bytes, the last 8 bytes in a ttm node may be left unchanged. For example, on pre SDMA 4.0, max_bytes = 0x1fffff, and the bo size is 0x200000, the problem will happen. In order to fix the problem, we separately store the max nums of PTEs/PDEs a single operation can set in amdgpu_vm_pte_funcs structure, rather than inferring it from bytes limit of SDMA constant fill, i.e. fill_max_bytes. Together with the fix, we replace the hard code value "10" in amdgpu_vm_bo_update_mapping() with the corresponding values from structure amdgpu_vm_pte_funcs. Signed-off-by: Yong Zhao <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-26drm/amdgpu: Correct bytes limit for SDMA 3.0 copy and fillYong Zhao1-2/+2
Signed-off-by: Yong Zhao <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-26drm/amdgpu: use 2MB fragment size for GFX6,7 and 8Christian König3-3/+3
Use 2MB fragment size by default for older hardware generations as well. Signed-off-by: Christian König <[email protected]> Acked-by: John Bridgman <[email protected]> Reviewed-by: Roger He <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-26drm/amdgpu: Fix driver reloading failureXiangliang.Yu1-0/+2
SRIOV doesn't implement PMC capability of PCIe, so it can't update power state by reading PMC register. Currently, amdgpu driver doesn't disable pci device when removing driver, the enable_cnt of pci device will not be decrease to 0. When reloading driver, pci_enable_device will do nothing as enable_cnt is not zero. And power state will not be updated as PMC is not support. So current_state of pci device is not D0 state and pci_enable_msi return fail. Add pci_disable_device when remmoving driver to fix the issue. Signed-off-by: Xiangliang.Yu <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-26drm/amd/powerplay: refine phm_register_thermal_interrupt interfaceRex Zhu1-3/+3
currently, not all asics implement this callback function so not return error to avoid powerplay initialize failed in those asices Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-26drm/amd/amdgpu: add vega10/raven mmhub/athub golden settingsEvan Quan1-0/+23
Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Junwei Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-26drm/amd/powerplay: change alert temperature rangeEric Huang1-2/+2
Change to more meaningful range that triggers thermal interrupts. Signed-off-by: Eric Huang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-26drm/amd/powerplay: implement register thermal interrupt for Vega10Eric Huang1-0/+33
Signed-off-by: Eric Huang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-26drm/amd/powerplay: add register thermal interrupt in hwmgr_hw_initEric Huang2-1/+80
Signed-off-by: Eric Huang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-26drm/amdgpu: add cgs query info of pci bus devfnEric Huang2-0/+4
Signed-off-by: Eric Huang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-09-26drm/amd/amdgpu: Partial revert of iova debugfsTom St Denis1-77/+13
We discovered that on some devices even with iommu enabled you can access all of system memory through the iommu translation. Therefore, we revert the read method to the translation only service and drop the write method completely. Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Christan König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
Powered by cgit, Gruvboxed by Blaster4385.