aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)AuthorFilesLines
2021-03-18arm64: dts: qcom: sm8250: split spi pinctrl configDmitry Baryshkov2-240/+66
As discussed on linux-arm-msm list, start splitting sm8250 pinctrl settings into generic and board-specific parts. The first part to receive such treatment is the spi, so split spi pinconf to the board device tree. Reviewed-by: Douglas Anderson <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2021-03-18arm64: dts: ti: k3-am64-evm/sk: Add OSPI flash DT nodeVignesh Raghavendra2-0/+72
Both AM64 EVM and SK have a 512Mb S28HS512T Octal SPI NOR flash. Add DT node for the same. Signed-off-by: Vignesh Raghavendra <[email protected]> Signed-off-by: Nishanth Menon <[email protected]> Reviewed-by: Pratyush Yadav <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2021-03-18arm64: dts: ti: k3-am64-main: Add OSPI nodeVignesh Raghavendra1-0/+25
AM64 SoC has a single Octal SPI (OSPI) instance under Flash SubSystem (FSS). Add DT entry for the same. Signed-off-by: Vignesh Raghavendra <[email protected]> Signed-off-by: Nishanth Menon <[email protected]> Reviewed-by: Pratyush Yadav <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2021-03-18arm64: dts: ti: k3-am64-main: Add ADC nodesVignesh Raghavendra3-0/+26
AM64 SoC has a single ADC IP with 8 channels. Add DT node for the same. Default usecase is to control ADC from non Linux core on the system on AM642 GP EVM, therefore mark the node as reserved in k3-am642-evm.dts file. ADC lines are not pinned out on AM642 SK board, therefore disable the node in k3-am642-sk.dts file. Signed-off-by: Vignesh Raghavendra <[email protected]> Signed-off-by: Nishanth Menon <[email protected]> Reviewed-by: Lokesh Vutla <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2021-03-17arm64: dts: broadcom: bcm4908: add Ethernet TX irqRafał Miłecki1-2/+3
This hardware supports two interrupts, one per DMA channel (RX and TX). Signed-off-by: Rafał Miłecki <[email protected]> Signed-off-by: Florian Fainelli <[email protected]>
2021-03-17arm64: dts: ti: k3-am642-evm: Add USB supportAswath Govindraju1-0/+18
AM64 EVM board has a micro USB 2.0 AB connector and the USB0_VBUS is connected with a resistor divider in between. USB0_DRVVBUS pin is muxed between USB0_DRVVBUS and GPIO1_79 signals. Add the corresponding properties and set the pinmux mode for USB subsystem in the evm dts file. Signed-off-by: Aswath Govindraju <[email protected]> Signed-off-by: Nishanth Menon <[email protected]> Reviewed-by: Kishon Vijay Abraham I <[email protected]> Acked-by: Roger Quadros <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2021-03-17arm64: dts: ti: k3-am64-main: Add DT node for USB subsystemAswath Govindraju1-0/+30
Add DT node for the single USB subsystem in main dtsi file. Signed-off-by: Aswath Govindraju <[email protected]> Signed-off-by: Nishanth Menon <[email protected]> Reviewed-by: Kishon Vijay Abraham I <[email protected]> Acked-by: Roger Quadros <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2021-03-16arm64: dts: qcom: sdm845-db845c: Enable ov8856 sensor and connect to ISPRobert Foss1-2/+17
Enable camss & ov8856 DT nodes. Signed-off-by: Robert Foss <[email protected]> Reviewed-by: Andrey Konovalov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2021-03-16arm64: dts: qcom: sdm845-db845c: Configure regulators for camss nodeRobert Foss1-0/+4
Add regulator to camss device tree node. Signed-off-by: Robert Foss <[email protected]> Reviewed-by: Andrey Konovalov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2021-03-16arm64: dts: qcom: sdm845: Add CAMSS ISP nodeRobert Foss1-0/+135
Add the camss dt node for sdm845. Signed-off-by: Robert Foss <[email protected]> Reviewed-by: Andrey Konovalov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2021-03-16arm64: dts: renesas: r8a77980: Fix vin4-7 endpoint bindingVladimir Barinov1-8/+8
This fixes the bindings in media framework: The CSI40 is endpoint number 2 The CSI41 is endpoint number 3 Signed-off-by: Vladimir Barinov <[email protected]> Reviewed-by: Niklas Söderlund <[email protected]> Signed-off-by: Niklas Söderlund <[email protected]> Link: https://lore.kernel.org/r/[email protected] Fixes: 3182aa4e0bf4d0ee ("arm64: dts: renesas: r8a77980: add CSI2/VIN support") Signed-off-by: Geert Uytterhoeven <[email protected]>
2021-03-15arm64: dts: juno: Enable more SMMUsRobin Murphy3-1/+8
Now that PCI inbound window restrictions are handled generically between the of_pci resource parsing and the IOMMU layer, and described in the Juno DT, we can finally enable the PCIe SMMU without the risk of DMA mappings inadvertently allocating unusable addresses. Similarly, the relevant support for IOMMU mappings for peripheral transfers has been hooked up in the pl330 driver for ages, so we can happily enable the DMA SMMU without that breaking anything either. Link: https://lore.kernel.org/r/a730070d718cb119f77c8ca1782a0d4189bfb3e7.1614965598.git.robin.murphy@arm.com Signed-off-by: Robin Murphy <[email protected]> Signed-off-by: Sudeep Holla <[email protected]>
2021-03-15arm64: dts: juno: Describe PCI dma-rangesRobin Murphy1-0/+4
The PLDA root complex on Juno relies on an address-based lookup table to generate AXI attributes for inbound PCI transactions, and as such will not pass any transaction not matching any programmed address range. The standard firmware configuration programs 3 entries covering the GICv2m MSI doorbell and the 2 DRAM regions, so add a "dma-ranges" property to describe those usable inbound windows. Link: https://lore.kernel.org/r/720d0a9a42e33148fcac45cd39a727093a32bf32.1614965598.git.robin.murphy@arm.com Signed-off-by: Robin Murphy <[email protected]> Signed-off-by: Sudeep Holla <[email protected]>
2021-03-15ARM: dts: imx7d-mba7: Remove unsupported PCI propertiesFabio Estevam1-2/+0
disable-gpio' and 'power-on-gpio' are not valid properties according to Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt. Remove the unsupported properties. Signed-off-by: Fabio Estevam <[email protected]> Reviewed-by: Bruno Thomsen <[email protected]> Reviewed-by: Matthias Schiffer <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-03-15ARM: dts: imx6qdl-gw*: Remove unnecessary #address-cells/#size-cellsTim Harvey12-24/+0
Remove the unnecessary #address-cells/#size-cells to avoid warnings from W=1 build like this: arch/arm/boot/dts/imx6qdl-gw52xx.dtsi:33.12-78.4: Warning (avoid_unnecessary_addr_size): /gpio-keys: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property Signed-off-by: Tim Harvey <[email protected]> [fabio: Make the warning messages more succint] Signed-off-by: Fabio Estevam <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-03-15ARM: dts: imx6dl-plybas: Fix gpio-keys W=1 warningsFabio Estevam1-4/+2
Remove the unnecessary #address-cells/#size-cells and rename the node names to fix the following W=1 dtc warnings: arch/arm/boot/dts/imx6dl-plybas.dts:26.13-30.5: Warning (unit_address_vs_reg): /gpio_keys/button@20: node has a unit name, but no reg or ranges property arch/arm/boot/dts/imx6dl-plybas.dts:32.13-36.5: Warning (unit_address_vs_reg): /gpio_keys/button@21: node has a unit name, but no reg or ranges property arch/arm/boot/dts/imx6dl-plybas.dts:20.12-37.4: Warning (avoid_unnecessary_addr_size): /gpio_keys: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property Signed-off-by: Fabio Estevam <[email protected]> Reviewed-by: Oleksij Rempel <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-03-15ARM: dts: imx: bx50v3: Define GPIO line namesIan Ray3-0/+15
Define GPIO line names for b450v3, b650v3, and b850v3. Signed-off-by: Ian Ray <[email protected]> Signed-off-by: Sebastian Reichel <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-03-15ARM: dts: imx: bx50v3: i2c GPIOs are open drainSebastian Reichel1-6/+6
Explicitly mark I2C GPIOs as open drain to fix the following kernel message being printed: enforced open drain please flag it properly in DT/ACPI DSDT/board file Signed-off-by: Sebastian Reichel <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-03-15ARM: dts: imx6q-ba16: improve PHY informationSebastian Reichel1-0/+12
Add PHY voltage supply information fixing the following kernel message: 2188000.ethernet supply phy not found, using dummy regulator Also add PHY clock information to avoid depending on the bootloader programming correct values. The bootloader also sets some reserved registers in the PHY as advised by Qualcomm, which is not supported by the bindings/kernel driver, so the reset GPIO has not been added intentionally. Signed-off-by: Sebastian Reichel <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-03-15ARM: dts: imx6q-ba16: add USB OTG VBUS enable GPIOSebastian Reichel1-0/+9
Add VBUS regulator GPIO information, so that USB OTG port can also be used in host mode. Signed-off-by: Sebastian Reichel <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-03-15ARM: dts: ls1021a: mark crypto engine dma coherentHoria Geantă1-0/+1
Crypto engine (CAAM) on LS1021A platform is configured HW-coherent, mark accordingly the DT node. Signed-off-by: Horia Geantă <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-03-15ARM: dts: colibri-imx6ull: Change drive strength for usdhc2Philippe Schenker1-6/+6
The current setting reflects about 86 Ohms of source-impedance on the SDIO signals where the WiFi board is hooked up. PCB traces are routed with 50 Ohms impedance and there are no serial resistors on those traces. This commit changes the source-impedance to 52 Ohms to better match our hardware design. The impedances given in this commit message refer to 3.3V operation. Signed-off-by: Philippe Schenker <[email protected]> Reviewed-by: Fabio Estevam <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-03-15ARM: dts: imx6ql-pfla02: Move "hog" pins into corresponded pin groupsAlexander Shiyan1-13/+17
Move the "hog" pins to the corresponding pin groups for SPI, ENET, PMIC, LEDs, so that these pins can be used for different purposes when the respective drivers are disabled. Signed-off-by: Alexander Shiyan <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-03-15ARM: dts: imx6qdl-phytec-pbab01: Select synchronous mode for AUDMUXAlexander Shiyan1-2/+3
Board uses 4-wire synchronous mode for audio, so add SYN bit for PTCR AUDMUX registers. Signed-off-by: Alexander Shiyan <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-03-15ARM: dts: imx6qdl-ts7970: Drop redundant "fsl,mode" optionAlexander Shiyan1-1/+0
The operating mode is used for the AC97 interface only, so lets drop the excess fsl,mode item from SSI node. Signed-off-by: Alexander Shiyan <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-03-15ARM: dts: imx53-qsb: Describe the esdhc1 card detect pinFabio Estevam1-0/+2
The micro SD card slot uses GPIO3_13 as card detect pin, so describe it in the devicetree. This was noticed when converting imx53-qsb board to driver model in U-Boot as the micro SD card was not getting detected. Signed-off-by: Fabio Estevam <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-03-15arm64: dts: freescale: Add support EQOS MAC on phyBOARD-Pollux-i.MX8MPMarek Vasut1-0/+44
The board has both MACs routed out, enable the EQOS. Signed-off-by: Marek Vasut <[email protected]> Cc: Dong Aisheng <[email protected]> Cc: Heiko Schocher <[email protected]> Cc: NXP Linux Team <[email protected]> Cc: Peng Fan <[email protected]> Cc: Teresa Remmet <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-03-15arm64: dts: imx8mp: add eqos node and aliasMarek Vasut1-0/+23
Add EQOS GMAC node per Documentation/devicetree/bindings/net/imx-dwmac.txt , leave out the nvmem entries as that is not yet available, so the MAC has to be passed in via DT by the bootloader. Signed-off-by: Marek Vasut <[email protected]> Cc: Dong Aisheng <[email protected]> Cc: Heiko Schocher <[email protected]> Cc: NXP Linux Team <[email protected]> Cc: Peng Fan <[email protected]> Cc: Teresa Remmet <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-03-15arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini EDIMM2.2 Starter KitJagan Teki2-0/+98
Engicam EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive Evaluation Board. Genaral features: - LCD 7" C.Touch - microSD slot - Ethernet 1Gb - Wifi/BT - 2x LVDS Full HD interfaces - 3x USB 2.0 - 1x USB 3.0 - HDMI Out - Mini PCIe - MIPI CSI - 2x CAN - Audio Out i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini from Engicam. i.Core MX8M Mini needs to mount on top of this Evaluation board for creating complete i.Core MX8M Mini EDIMM2.2 Starter Kit. PCIe, DSI, CSI nodes will add it into imx8mm-engicam-edimm2.2.dtsi once Mainline Linux supported. Add support for it. Signed-off-by: Matteo Lisi <[email protected]> Signed-off-by: Jagan Teki <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-03-15arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini C.TOUCH 2.0Jagan Teki2-0/+98
Engicam C.TOUCH 2.0 is an EDIMM compliant general purpose Carrier board. Genaral features: - Ethernet 10/100 - Wifi/BT - USB Type A/OTG - Audio Out - CAN - LVDS panel connector i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini from Engicam. i.Core MX8M Mini needs to mount on top of this Carrier board for creating complete i.Core MX8M Mini C.TOUCH 2.0 board. Add support for it. Signed-off-by: Matteo Lisi <[email protected]> Signed-off-by: Jagan Teki <[email protected]> Reviewed-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-03-15arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini SoMJagan Teki1-0/+232
i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini from Engicam. General features: - NXP i.MX8M Mini - Up to 2GB LDDR4 - 8/16GB eMMC - Gigabit Ethernet - USB 2.0 Host/OTG - PCIe Gen2 interface - I2S - MIPI DSI to LVDS - rest of i.MX8M Mini features i.Core MX8M Mini needs to mount on top of Engicam baseboards for creating complete platform solutions. Add support for it. Signed-off-by: Matteo Lisi <[email protected]> Signed-off-by: Jagan Teki <[email protected]> Reviewed-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-03-15arm64: dts: imx8qxp: correct usdhc clock-names sequencePeng Fan1-9/+9
Per dt-bindings, the clock-names sequence should be ipg ahb per to pass dtbs_check. Signed-off-by: Peng Fan <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-03-15arm64: dts: imx8mm-nitrogen-r2: add audioAdrien Grassein1-0/+85
Add audio description and pin muxing. Signed-off-by: Adrien Grassein <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-03-15arm64: dts: imx8mm-nitrogen-r2: add FlexSPIAdrien Grassein1-0/+17
Add FlexSPI description an pin muxing. Signed-off-by: Adrien Grassein <[email protected]> Reviewed-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-03-15arm64: dts: imx8mm-nitrogen-r2: add PWMsAdrien Grassein1-0/+51
Add description for the four PWMs. Signed-off-by: Adrien Grassein <[email protected]> Reviewed-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-03-15arm64: dts: imx8mm-nitrogen-r2: rework UART 2Adrien Grassein1-2/+0
Remove useless clocks in UART 2 Signed-off-by: Adrien Grassein <[email protected]> Reviewed-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-03-15arm64: dts: imx8mm-nitrogen-r2: add UARTsAdrien Grassein1-0/+48
Add description and pin muxing for UARTs. Signed-off-by: Adrien Grassein <[email protected]> Reviewed-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-03-15arm64: dts: imx8mm-nitrogen-r2: add USB supportAdrien Grassein1-0/+42
Add description of USB. usbotg2 seems to not working on all boards (including ones from variscite). Signed-off-by: Adrien Grassein <[email protected]> Reviewed-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-03-15arm64: dts: imx8mm-nitrogen-r2: rework USDHC1Adrien Grassein1-0/+9
Add VMMC and VQMMC description for USDHC1 (eMMC). There are comming directly from the alimentation stage, so add the vref_3V3 fixed regulator. Signed-off-by: Adrien Grassein <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-03-15arm64: dts: imx8mm-nitrogen-r2: add wifi/bt chipAdrien Grassein1-0/+38
Add usdhc3 description which corresponds to the wifi/bt chip Signed-off-by: Adrien Grassein <[email protected]> Reviewed-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-03-15arm64: dts: librem5-devkit: Move headphone detection to sound cardGuido Günther1-10/+11
This allows for automatic output source switching in userspace. Enable the pullup on the GPIO to actually make it trigger and mark it as active-high since detection is reversed otherwise. Signed-off-by: Guido Günther <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-03-15arm64: dts: librem5-devkit: Add mux for built-in vs headset micGuido Günther1-4/+21
Add mux so we can select either headset or built-in microphone input. Signed-off-by: Guido Günther <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-03-15arm64: dts: librem5-devkit: "Drop Line In Jack"Guido Günther1-3/+1
The SGTL500s LINEINL and LINEINR are N/C. Signed-off-by: Guido Günther <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-03-15arm64: dts: librem5-devkit: Add speaker amplifierGuido Günther1-2/+19
Wire up the amplifier that drives the builtin speaker. Signed-off-by: Guido Günther <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-03-15arm64: dts: librem5-devkit: Use a less generic codec nameGuido Günther1-1/+1
The codec is currently named after the chip but it should be named like the device itself since otherwise it's impossible to distinguish it from other devices using the same codec (e.g. in alsa's UCM). Signed-off-by: Guido Günther <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-03-15arm64: dts: imx8mq-librem5-r2: set nearlevel to 120Martin Kepplinger1-1/+1
On Birch I can never reach 220 and hence the display would never turn off. Tests suggest 120 to be a good threshold value for all Birch devices. Signed-off-by: Martin Kepplinger <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-03-15arm64: dts: librem5: protect some partitions of the nor-flashAngus Ainslie1-0/+19
These sections should be read only as they contain important data. Signed-off-by: Angus Ainslie <[email protected]> Signed-off-by: Martin Kepplinger <[email protected]> Reviewed-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-03-15arm64: dts: librem5: Drop assigned-clocks from SAI2Guido Günther1-2/+0
IMX8MQ_AUDIO_PLL1 and IMX8MQ_AUDIO_PLL2 are setup to the same rates right on the clock controller. Signed-off-by: Guido Günther <[email protected]> Signed-off-by: Martin Kepplinger <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-03-15arm64: dts: imx8mq-librem5-devkit: Drop buck3 startup-ramp-delayGuido Günther1-1/+0
The PMIC driver now sets appropriate default delays. Signed-off-by: Guido Günther <[email protected]> Signed-off-by: Martin Kepplinger <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-03-15arm64: dts: imx8mn-beacon: Enable SDR104 on WiFi SDIO interfaceAdam Ford1-1/+5
Enable 100Mhz and 200MHz pinmux and corrsesponding voltage supplies to enable SDR104 on usdhc1 connecting the WiFi chip. Signed-off-by: Adam Ford <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
Powered by cgit, Gruvboxed by Blaster4385.