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2013-08-07MAINTAINERS: delete Srinidhi from ux500Linus Walleij1-1/+0
Srinidhi's mail address is now bouncing and he has requested me to delete this entry. Acked-by: Srinidhi Kasagar <[email protected]> Signed-off-by: Linus Walleij <[email protected]> Signed-off-by: Kevin Hilman <[email protected]>
2013-08-07nfsd: Fix SP4_MACH_CRED negotiation in EXCHANGE_IDWeston Andros Adamson2-4/+3
- don't BUG_ON() when not SP4_NONE - calculate recv and send reserve sizes correctly Signed-off-by: Weston Andros Adamson <[email protected]> Signed-off-by: J. Bruce Fields <[email protected]>
2013-08-07nfsd4: Fix MACH_CRED NULL dereferenceJ. Bruce Fields1-0/+2
Fixes a NULL-dereference on attempts to use MACH_CRED protection over auth_sys. Signed-off-by: J. Bruce Fields <[email protected]>
2013-08-07i2c: mv64xxx: Document the newly introduced allwinner compatibleMaxime Ripard1-1/+1
Signed-off-by: Maxime Ripard <[email protected]> Signed-off-by: Wolfram Sang <[email protected]>
2013-08-07ALSA: 6fire: fix DMA issues with URB transfer_buffer usageJussi Kivilinna2-6/+34
Patch fixes 6fire not to use stack as URB transfer_buffer. URB buffers need to be DMA-able, which stack is not. Furthermore, transfer_buffer should not be allocated as part of larger device structure because DMA coherency issues and patch fixes this issue too. Cc: [email protected] Signed-off-by: Jussi Kivilinna <[email protected]> Tested-by: Torsten Schenk <[email protected]> Signed-off-by: Takashi Iwai <[email protected]>
2013-08-07ARM: vexpress/TC2: implement PM suspend methodNicolas Pitre1-1/+18
Similar to power_down(), except that for a suspend, the firmware mailbox address has to be set prior entering low power mode. The residency argument is not used yet, so the last man always shuts down the cluster for now. Signed-off-by: Nicolas Pitre <[email protected]> Acked-by: Pawel Moll <[email protected]>
2013-08-07ARM: vexpress/TC2: basic PM supportNicolas Pitre3-0/+336
This is the MCPM backend for the Virtual Express A15x2 A7x3 CoreTile aka TC2. This provides cluster management for SMP secondary boot and CPU hotplug. Signed-off-by: Nicolas Pitre <[email protected]> Acked-by: Pawel Moll <[email protected]> Reviewed-by: Lorenzo Pieralisi <[email protected]> [PM: made it drive SCC registers directly and provide base for SPC] Signed-off-by: Pawel Moll <[email protected]>
2013-08-07ARM: vexpress: Add SCC to V2P-CA15_A7's device treePawel Moll2-0/+39
SCC (Serial Configuration Controller) is used to set initial conditions for the test chip (TC2). Its registers are also mapped in normal address space and used to obtain runtime information and for power management. Signed-off-by: Pawel Moll <[email protected]>
2013-08-07ARM: vexpress/TC2: add Serial Power Controller (SPC) supportLorenzo Pieralisi2-0/+204
The TC2 versatile express core tile integrates a logic block that provides the interface between the dual cluster test-chip and the M3 microcontroller that carries out power management. The logic block, called Serial Power Controller (SPC), contains several memory mapped registers to control among other things low-power states, wake-up irqs and per-CPU jump addresses registers. This patch provides a driver that enables run-time control of features implemented by the SPC power management control logic with an API to be used by different subsystem drivers on top. The SPC control logic is required to be programmed very early in the boot process to reset secondary CPUs on the TC2 testchip, set-up jump addresses and wake-up IRQs for power management. Hence, waiting for core changes to be made in the device core code to enable early registration of platform devices, the driver puts in place an early init scheme that allows kernel drivers to initialize the SPC driver directly from the components requiring it, if their initialization routine is called before this driver init function during the boot process. Device tree bindings documentation for the SPC component is also provided. Cc: Olof Johansson <[email protected]> Cc: Amit Kucheria <[email protected]> Cc: Jon Medhurst <[email protected]> Signed-off-by: Achin Gupta <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]> Signed-off-by: Sudeep KarkadaNagesha <[email protected]> Acked-by: Pawel Moll <[email protected]> [ np: moved from drivers/mfd/ to drivers/platform/vexpress/ ] Signed-off-by: Nicolas Pitre <[email protected]> [ PM: moved again to arch/arm/mach-vexpress, requested by Olof ] [ PM: removed useless printk, from Olof ] [ PM: made the driver SPC-only ] Signed-off-by: Pawel Moll <[email protected]>
2013-08-07drm/i915: do not disable backlight on vgaswitcheroo switch offJani Nikula1-0/+11
On muxed systems, the other vgaswitcheroo client may depend on i915 to handle the backlight. We began switching off the backlight since commit a261b246ebd552fd5d5a8ed84cc931bb821c427f Author: Daniel Vetter <[email protected]> Date: Thu Jul 26 19:21:47 2012 +0200 drm/i915: disable all crtcs at suspend time breaking backlight on discreet graphics in (some) muxed systems. Keep the backlight on when the state is changed through vgaswitcheroo. Note: The alternative would be to add a quirk table to achieve the same based on system identifiers, but AFAICS it would asymptotically approach effectively the same as this patch as more IDs are added, but with the maintenance burden of the quirk table. Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=55311 Tested-by: Fede <[email protected]> Tested-by: Aximab <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=59785 Tested-by: sfievet <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Cc: [email protected] Signed-off-by: Daniel Vetter <[email protected]>
2013-08-07drm/i915: Don't call encoder's get_config unless encoder is activeVille Syrjälä1-1/+3
The SDVO code tries to compare the encoder's and crtc's idea of the pixel_multiplier. Normally they have to match, but when transitioning to DPMS off, we turn off the pipe before reading out the pipe_config, so the pixel_multiplier in the pipe_config will be 0, whereas the encoder will still have its pixel_multiplier set to whatever value we were using when the display was active. This leads to a warning from intel_modeset_check_state(). WARNING: CPU: 1 PID: 2846 at drivers/gpu/drm/i915/intel_sdvo.c:1378 intel_sdvo_get_config+0x158/0x160() SDVO pixel multiplier mismatch, port: 0, encoder: 1 Modules linked in: snd_hda_codec_idt snd_hda_intel snd_hda_codec snd_hwdep CPU: 1 PID: 2846 Comm: Xorg Not tainted 3.11.0-rc3-00208-gbe1e8d7-dirty #19 Hardware name: Apple Computer, Inc. Macmini1,1/Mac-F4208EC8, BIOS MM11.88Z.0055.B03.0604071521 04/07/06 00000000 00000000 ef0afa54 c1597bbb c1737ea4 ef0afa84 c10392ca c1737e6c ef0afab0 00000b1e c1737ea4 00000562 c12dfbe8 c12dfbe8 ef0afb14 00000000 f697ec00 ef0afa9c c103936e 00000009 ef0afa94 c1737e6c ef0afab0 ef0afadc Call Trace: [<c1597bbb>] dump_stack+0x41/0x56 [<c10392ca>] warn_slowpath_common+0x7a/0xa0 [<c103936e>] warn_slowpath_fmt+0x2e/0x30 [<c12dfbe8>] intel_sdvo_get_config+0x158/0x160 [<c12c3220>] check_crtc_state+0x1e0/0xb10 [<c12cdc7d>] intel_modeset_check_state+0x29d/0x7c0 [<c12dfe5c>] intel_sdvo_dpms+0x5c/0xa0 [<c12985de>] drm_mode_obj_set_property_ioctl+0x40e/0x420 [<c1298625>] drm_mode_connector_property_set_ioctl+0x35/0x40 [<c1289294>] drm_ioctl+0x3e4/0x540 [<c10fc1a2>] do_vfs_ioctl+0x72/0x570 [<c10fc72f>] SyS_ioctl+0x8f/0xa0 [<c159b7fa>] sysenter_do_call+0x12/0x22 ---[ end trace 7ce940aff1366d60 ]--- Fix the problem by skipping the encoder get_config() function for inactive encoders. Tested-by: Linus Torvalds <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2013-08-07drm/i915: avoid brightness overflow when doing scaleAaron Lu1-2/+5
Some card's max brightness level is pretty large, e.g. on Acer Aspire 4732Z, the max level is 989910. If user space set a large enough level then the current scale done in intel_panel_set_backlight will cause an integer overflow and the scaled level will be mistakenly small, leaving user with an almost black screen. This patch fixes this problem. Signed-off-by: Aaron Lu <[email protected]> [danvet: Add a comment to explain what's going on.] Signed-off-by: Daniel Vetter <[email protected]>
2013-08-07drm/i915: update last_vblank when disabling the power wellPaulo Zanoni1-0/+18
The DRM layer keeps track of our vblanks and it assumes our vblank counters only go back to zero when they overflow. The problem is that when we disable the power well our counters also go to zero, but it doesn't mean they did overflow. So on this patch we grab the lock and update last_vblank so the DRM layer won't think our counters overflowed. This patch fixes the following intel-gpu-tools test: ./kms_flip --run-subtest blocking-absolute-wf_vblank Regression introduced by the following commit: commit bf51d5e2cda5d36d98e4b46ac7fca9461e512c41 Author: Paulo Zanoni <[email protected]> Date: Wed Jul 3 17:12:13 2013 -0300 drm/i915: switch disable_power_well default value to 1 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66808 Signed-off-by: Paulo Zanoni <[email protected]> [danvet: Added a comment that this might be better done in drm_vblank_post_modeset in general.] Signed-off-by: Daniel Vetter <[email protected]>
2013-08-07drm/i915: fix gen4 digital port hotplug definitionsDaniel Vetter1-3/+9
Apparently Bspec is wrong in this case here even for gm45. Note that Bspec is horribly misguided on i965g/gm, so we don't have any other data points besides that it seems to make machines work better. With this changes all the bits in PORT_HOTPLUG_STAT for the digital ports are ordered the same way. This seems to agree with what register dumps from the hpd storm handling code shows, where the LIVE bit and the short/long pulse STATUS bits light up at the same time with this enumeration (but no with the one from Bspec). Also tested on my gm45 which has two DP+ ports, and everything seems to still work as expected. References: http://www.mail-archive.com/[email protected]/msg23054.html Cc: Egbert Eich <[email protected]> Cc: Jan Niggemann <[email protected]> Tested-by: Jan Niggemann <[email protected]> [danvet: Add a big warning that Bspec seems to be wrong for these bits, suggested by Jani.] Acked-by: Jani Nikula <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2013-08-07drm/ast: invalidate page tables when pinning a BODave Airlie1-0/+1
same fix as cirrus and mgag200. Cc: [email protected] Signed-off-by: Dave Airlie <[email protected]>
2013-08-07drm/mgag200: Invalidate page tables when pinning a BOEgbert Eich1-0/+1
When a BO gets pinned the placement may get changed. If the memory is mapped into user space and user space has already accessed the mapped range the page tables are set up but now point to the wrong memory. Set bo.mdev->dev_mapping in mgag200_bo_create() to make sure that ttm_bo_unmap_virtual() called from ttm_bo_handle_move_mem() will take care of this. v2: Don't call ttm_bo_unmap_virtual() in mgag200_bo_pin(), fix comment. Signed-off-by: Egbert Eich <[email protected]> Cc: [email protected] Signed-off-by: Dave Airlie <[email protected]>
2013-08-07drm/cirrus: Invalidate page tables when pinning a BOMichal Srb1-0/+1
This is a cirrus version of Egbert Eich's patch for mgag200. Without bo.bdev->dev_mapping set, the ttm_bo_unmap_virtual_locked called from ttm_bo_handle_move_mem returns with no effect. If any application accessed the memory before it was moved, it will access wrong memory next time. This causes crashes when changing resolution down. Signed-off-by: Michal Srb <[email protected]> Cc: [email protected] Signed-off-by: Dave Airlie <[email protected]>
2013-08-06Merge branch 'for-3.11-fixes' of ↵Linus Torvalds1-0/+1
git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata Pull libata fix from Tejun Heo: "Just the addition of MODULE_DEVICE_TABLE() for a platform driver" * 'for-3.11-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata: pata_imx: expose module alias for loading from device-tree
2013-08-06Merge branch 'for-3.11-fixes' of ↵Linus Torvalds1-1/+3
git://git.kernel.org/pub/scm/linux/kernel/git/tj/cgroup Pull cgroup fix from Tejun Heo: "Fix for a minor memory leak bug in the cgroup init failure path" * 'for-3.11-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/cgroup: cgroup: fix a leak when percpu_ref_init() fails
2013-08-06Merge branch 'for-3.11-fixes' of ↵Linus Torvalds1-10/+34
git://git.kernel.org/pub/scm/linux/kernel/git/tj/wq Pull two workqueue fixes from Tejun Heo: "A lockdep notation update so that nested work_on_cpu() invocations don't lead to spurious lockdep warnings and fix for an unbound attr bug which made what's shown in sysfs deviate from the actual ones. Both patches have pretty limited scope" * 'for-3.11-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/wq: workqueue: copy workqueue_attrs with all fields workqueue: allow work_on_cpu() to be called recursively
2013-08-06Merge branch 'x86-urgent-for-linus' of ↵Linus Torvalds4-8/+19
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull misc x86 fixes from Peter Anvin. * 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86, amd, microcode: Fix error path in apply_microcode_amd() x86, fpu: correct the asm constraints for fxsave, unbreak mxcsr.daz x86, efi: correct call to free_pages x86/iommu/vt-d: Expand interrupt remapping quirk to cover x58 chipset
2013-08-06printk: Fix return of braille_register_console()Steven Rostedt1-1/+2
Some of my configs I test with have CONFIG_A11Y_BRAILLE_CONSOLE set. When I started testing against v3.11-rc4 my console went bonkers. Using ktest to bisect the issue, it came down to: commit bbeddf52a "printk: move braille console support into separate braille.[ch] files" Looking into the patch I found the problem. It's with the return of braille_register_console(). As anything other than NULL is considered a failure. But for those of us that have CONFIG_A11Y_BRAILLE_CONSOLE set but do not define a "brl" or "brl=" on the command line, we still may want a console that those with sight can still use. Return NULL (success) if "brl" or "brl=" is not on the console line. Signed-off-by: Steven Rostedt <[email protected]> Acked-by: Joe Perches <[email protected]> Cc: Andrew Morton <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
2013-08-06Revert "ptrace: PTRACE_DETACH should do flush_ptrace_hw_breakpoint(child)"Oleg Nesterov1-1/+0
This reverts commit fab840fc2d542fabcab903db8e03589a6702ba5f. This commit even has the test-case to prove that the tracee can be killed by SIGTRAP if the debugger does not remove the breakpoints before PTRACE_DETACH. However, this is exactly what wineserver deliberately does, set_thread_context() calls PTRACE_ATTACH + PTRACE_DETACH just for PTRACE_POKEUSER(DR*) in between. So we should revert this fix and document that PTRACE_DETACH should keep the breakpoints. Reported-by: Felipe Contreras <[email protected]> Signed-off-by: Oleg Nesterov <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
2013-08-06Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds4-3/+13
Pull MIPS fixes from Ralf Baechle: "Two platform-specific fixes plus a fix for oprofile which was calling smp_processor_id() in preemptible code" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: MIPS: BMIPS: fix hardware interrupt routing for boot CPU != 0 MIPS: oprofile: Fix BUG due to smp_processor_id() in preemptible code. MIPS: PNX833x: PNX8335_PCI_ETHERNET_INT depends on CONFIG_SOC_PNX8335
2013-08-06Merge branch 'for-linus' of ↵Linus Torvalds9-12/+31
git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux Pull s390 fixes from Martin Schwidefsky: "Enable LZ4 compression for the kernel image, add the machine id for the new zBC12 model, fix an issue with hanging dasd devices, correct a Kconfig dependency, fix a compile error in the perf module with CONFIG_KVM=n and fix the find_next_bit_left primitive for the PCI base layer" * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux: s390/dasd: fix hanging devices after path events s390/perf: fix compile error (undefined reference sie_exit) s390/bitops: fix find_next_bit_left s390: add support for IBM zBC12 machine s390/Kconfig: select 'TTY' when 'S390_GUEST' is enabled s390: add support for LZ4-compressed kernel
2013-08-06userns: unshare_userns(&cred) should not populate cred on failureOleg Nesterov1-4/+9
unshare_userns(new_cred) does *new_cred = prepare_creds() before create_user_ns() which can fail. However, the caller expects that it doesn't need to take care of new_cred if unshare_userns() fails. We could change the single caller, sys_unshare(), but I think it would be more clean to avoid the side effects on failure, so with this patch unshare_userns() does put_cred() itself and initializes *new_cred only if create_user_ns() succeeeds. Cc: [email protected] Signed-off-by: Oleg Nesterov <[email protected]> Reviewed-by: Andy Lutomirski <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
2013-08-06Merge remote-tracking branch 'regmap/fix/disable' into regmap-linusMark Brown1-0/+1
2013-08-06regmap: Add missing header for !CONFIG_REGMAP stubsMateusz Krawczuk1-0/+1
regmap.h requires linux/err.h if CONFIG_REGMAP is not defined. Without it I get error. CC drivers/media/platform/exynos4-is/fimc-reg.o In file included from drivers/media/platform/exynos4-is/fimc-reg.c:14:0: include/linux/regmap.h: In function ‘regmap_write’: include/linux/regmap.h:525:10: error: ‘EINVAL’ undeclared (first use in this function) include/linux/regmap.h:525:10: note: each undeclared identifier is reported only once for each function it appears in Signed-off-by: Mateusz Krawczuk <[email protected]> Signed-off-by: Kyungmin Park <[email protected]> Signed-off-by: Mark Brown <[email protected]> Cc: [email protected]
2013-08-06PCI: mvebu: Adapt to the new device tree layoutThomas Petazzoni1-36/+109
The new device tree layout encodes the window's target ID and attribute in the PCIe controller node's ranges property. This allows to parse such entries to obtain such information and use the recently introduced MBus API to create the windows, instead of using the current name based scheme. Cc: [email protected] Acked-by: Bjorn Helgaas <[email protected]> Signed-off-by: Thomas Petazzoni <[email protected]> Tested-by: Andrew Lunn <[email protected]> Tested-by: Sebastian Hesselbarth <[email protected]> Signed-off-by: Jason Cooper <[email protected]>
2013-08-06bus: mvebu-mbus: Add devicetree bindingEzequiel Garcia1-0/+276
Introduce the devicetree binding for the mvebu MBus driver avaiable in the mvebu SoCs (Armada 370/XP, Kirkwood, Dove, ...). This binding provides an accurate model of the SoC address space, and allows to declare the address and size of the decoding windows the MBus needs to access the peripherals, together with the target ID and attribute for those windows. The binding is composed of two required nodes: one for the MBus bus and one for the MBus controller. Cc: [email protected] Signed-off-by: Ezequiel Garcia <[email protected]> Tested-by: Andrew Lunn <[email protected]> Tested-by: Sebastian Hesselbarth <[email protected]> Acked-by: Rob Herring <[email protected]> Signed-off-by: Jason Cooper <[email protected]>
2013-08-06ARM: kirkwood: Relocate PCIe device tree nodesEzequiel Garcia12-136/+163
Now that mbus has been added to the device tree, it's possible to move the PCIe nodes out of the ocp node, placing it directly below the mbus. This is a more accurate representation of the hardware. Moving the PCIe nodes, we now need to introduce an extra cell to encode the window target ID and attribute. Since this depends on the PCIe port, we split the ranges translation entries, to correspond to each MBus window. In addition, we encode the PCIe memory and I/O apertures in the MBus node, according to the MBus DT binding specification. The choice made is 0xe0000000-0xf0000000 for memory space, and 0xf200000-0xf2100000 for I/O space. These apertures can be changed in each per-board DT file. Signed-off-by: Ezequiel Garcia <[email protected]> Tested-by: Andrew Lunn <[email protected]> Tested-by: Sebastian Hesselbarth <[email protected]> Signed-off-by: Jason Cooper <[email protected]>
2013-08-06ARM: kirkwood: Introduce MBUS_IDEzequiel Garcia1-0/+2
This macro is used to define window's target ID and attribute cells for the MBus ranges entries. Signed-off-by: Ezequiel Garcia <[email protected]> Tested-by: Andrew Lunn <[email protected]> Tested-by: Sebastian Hesselbarth <[email protected]> Signed-off-by: Jason Cooper <[email protected]>
2013-08-06ARM: kirkwood: Introduce MBus DT nodeEzequiel Garcia1-0/+10
Add a minimal MBus node, just to allow the MBus driver to probe. Follow-up patches will migrate the rest of the nodes appropriately. Signed-off-by: Ezequiel Garcia <[email protected]> Tested-by: Andrew Lunn <[email protected]> Tested-by: Sebastian Hesselbarth <[email protected]> Signed-off-by: Jason Cooper <[email protected]>
2013-08-06ARM: kirkwood: Use the preprocessor on device tree filesEzequiel Garcia34-58/+58
Signed-off-by: Ezequiel Garcia <[email protected]> Tested-by: Andrew Lunn <[email protected]> Tested-by: Sebastian Hesselbarth <[email protected]> Signed-off-by: Jason Cooper <[email protected]>
2013-08-06ARM: kirkwood: Split DT and legacy MBus initializationEzequiel Garcia2-4/+5
This commit replaces the legacy MBus initialization with the new DT-based in Kirkwood. For boards that are not yet converted to DT, we keep the legacy initialization. Signed-off-by: Ezequiel Garcia <[email protected]> Tested-by: Andrew Lunn <[email protected]> Tested-by: Sebastian Hesselbarth <[email protected]> Signed-off-by: Jason Cooper <[email protected]>
2013-08-06ARM: mvebu: Relocate Armada 370/XP PCIe device tree nodesEzequiel Garcia9-542/+612
Now that mbus has been added to the device tree, it's possible to move the PCIe nodes out of internal registers, placing it directly below the mbus. This is a more accurate representation of the hardware. Moving the PCIe nodes, we now need to introduce an extra cell to encode the window target ID and attribute. Since this depends on the PCIe port, we split the ranges translation entries, to correspond to each MBus window. Signed-off-by: Thomas Petazzoni <[email protected]> Signed-off-by: Ezequiel Garcia <[email protected]> Tested-by: Andrew Lunn <[email protected]> Tested-by: Sebastian Hesselbarth <[email protected]> Signed-off-by: Jason Cooper <[email protected]>
2013-08-06ARM: mvebu: Relocate Armada 370/XP DeviceBus device tree nodesEzequiel Garcia4-138/+140
Now that mbus has been added to the device tree, it's possible to move the DeviceBus out of internal registers, placing it directly below the mbus. This is a more accurate representation of the hardware. Signed-off-by: Ezequiel Garcia <[email protected]> Tested-by: Andrew Lunn <[email protected]> Tested-by: Sebastian Hesselbarth <[email protected]> Signed-off-by: Jason Cooper <[email protected]>
2013-08-06ARM: mvebu: Add BootROM to Armada 370/XP device treeEzequiel Garcia8-6/+22
In order to access the SoC BootROM, we need to declare a mapping (through a ranges property). The mbus driver will use this property to allocate a suitable address decoding window. Signed-off-by: Ezequiel Garcia <[email protected]> Tested-by: Andrew Lunn <[email protected]> Tested-by: Sebastian Hesselbarth <[email protected]> Signed-off-by: Jason Cooper <[email protected]>
2013-08-06ARM: mvebu: Add MBus to Armada 370/XP device treeEzequiel Garcia9-16/+23
The Armada 370/XP SoC family has a completely configurable address space handled by the MBus controller. This patch introduces the device tree layout of MBus, making the 'soc' node as mbus-compatible. Since every peripheral/controller is a child of this 'soc' node, this makes all of them sit behind the mbus, thus describing the hardware accurately. A translation entry has been added for the internal-regs mapping. This can't be done in the common armada-370-xp.dtsi because A370 and AXP have different addressing width. Signed-off-by: Ezequiel Garcia <[email protected]> Tested-by: Andrew Lunn <[email protected]> Tested-by: Sebastian Hesselbarth <[email protected]> Signed-off-by: Jason Cooper <[email protected]>
2013-08-06ARM: mvebu: Use the preprocessor on Armada 370/XP device tree filesEzequiel Garcia10-10/+10
Signed-off-by: Ezequiel Garcia <[email protected]> Tested-by: Andrew Lunn <[email protected]> Tested-by: Sebastian Hesselbarth <[email protected]> Signed-off-by: Jason Cooper <[email protected]>
2013-08-06ARM: mvebu: Initialize MBus using the DT bindingEzequiel Garcia1-33/+1
Now that the mbus device tree binding has been introduced, we can switch over to it. Also, and since the initialization of the mbus driver is quite fundamental for the system to work properly, this patch adds a BUG() in case mbus fails to initialize. Signed-off-by: Ezequiel Garcia <[email protected]> Tested-by: Andrew Lunn <[email protected]> Tested-by: Sebastian Hesselbarth <[email protected]> Signed-off-by: Jason Cooper <[email protected]>
2013-08-06ARM: mvebu: Remove the harcoded BootROM window allocationEzequiel Garcia1-1/+24
The address decoding window to access the BootROM should not be allocated programatically, but instead declared in the device tree. Signed-off-by: Ezequiel Garcia <[email protected]> Tested-by: Andrew Lunn <[email protected]> Tested-by: Sebastian Hesselbarth <[email protected]> Signed-off-by: Jason Cooper <[email protected]>
2013-08-06bus: mvebu-mbus: Factorize Armada 370/XP data structuresThomas Petazzoni1-11/+3
These structures were only different in the mapping tables. Now that those tables have been removed, it doesn't make any sense to keep different structures. Signed-off-by: Thomas Petazzoni <[email protected]> Tested-by: Andrew Lunn <[email protected]> Tested-by: Sebastian Hesselbarth <[email protected]> Signed-off-by: Jason Cooper <[email protected]>
2013-08-06bus: mvebu-mbus: Update main descriptionThomas Petazzoni1-7/+3
After replacing the MBus name-based by the new ID-based API let's fix the general description of the driver at the beginning of the file. Signed-off-by: Thomas Petazzoni <[email protected]> Tested-by: Andrew Lunn <[email protected]> Tested-by: Sebastian Hesselbarth <[email protected]> Signed-off-by: Jason Cooper <[email protected]>
2013-08-06bus: mvebu-mbus: Remove name -> target, attribute mapping tablesThomas Petazzoni1-143/+7
This tables were used together with the name-based MBus window creation API. Since that's has been removed, we can also remove the tables. Signed-off-by: Thomas Petazzoni <[email protected]> Tested-by: Andrew Lunn <[email protected]> Tested-by: Sebastian Hesselbarth <[email protected]> Signed-off-by: Jason Cooper <[email protected]>
2013-08-06bus: mvebu-mbus: Remove the no longer used name-based APIThomas Petazzoni2-43/+0
Now that every user of the deprecated name-based API has been converted to using the ID-based API, let's remove the former one. Signed-off-by: Thomas Petazzoni <[email protected]> Tested-by: Andrew Lunn <[email protected]> Tested-by: Sebastian Hesselbarth <[email protected]> Signed-off-by: Jason Cooper <[email protected]>
2013-08-06PCI: mvebu: Check valid base address before port setupEzequiel Garcia1-0/+2
This driver does not fail to probe when it cannot obtain a port base address. Therefore, add a check for NULL base address before setting up the port, which prevents a kernel panic in such cases. Signed-off-by: Ezequiel Garcia <[email protected]> Tested-by: Andrew Lunn <[email protected]> Tested-by: Sebastian Hesselbarth <[email protected]> Signed-off-by: Jason Cooper <[email protected]>
2013-08-06PCI: mvebu: Adapt to the new device tree layoutThomas Petazzoni1-29/+84
The new device tree layout encodes the window's target ID and attribute in the PCIe controller node's ranges property. This allows to parse such entries to obtain such information and use the recently introduced MBus API to create the windows, instead of using the current name based scheme. Acked-by: Bjorn Helgaas <[email protected]> Signed-off-by: Thomas Petazzoni <[email protected]> Tested-by: Andrew Lunn <[email protected]> Tested-by: Sebastian Hesselbarth <[email protected]> Signed-off-by: Jason Cooper <[email protected]>
2013-08-06bus: mvebu-mbus: Add new API for the PCIe memory and IO apertureEzequiel Garcia2-0/+53
We add two optional properties to the MBus DT binding, to encode the PCIe memory and IO aperture. This allows such information to be retrieved by -for instance- the pci driver to allocate the MBus decoding windows. Correspondingly, and in order to retrieve this information, we add two new APIs. Signed-off-by: Ezequiel Garcia <[email protected]> Tested-by: Andrew Lunn <[email protected]> Tested-by: Sebastian Hesselbarth <[email protected]> Signed-off-by: Jason Cooper <[email protected]>
2013-08-06bus: mvebu-mbus: Add static window allocation to the DT bindingEzequiel Garcia1-1/+126
This patch adds static window allocation to the device tree binding. Each first-child of the mbus-compatible node, with a suitable 'ranges' property, declaring an address translation, will trigger an address decoding window allocation. Signed-off-by: Ezequiel Garcia <[email protected]> Tested-by: Andrew Lunn <[email protected]> Tested-by: Sebastian Hesselbarth <[email protected]> Signed-off-by: Jason Cooper <[email protected]>
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