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2022-05-21perf regs x86: Fix arch__intr_reg_mask() for the hybrid platformKan Liang1-0/+12
The X86 specific arch__intr_reg_mask() is to check whether the kernel and hardware can collect XMM registers. But it doesn't work on some hybrid platform. Without the patch on ADL-N: $ perf record -I? available registers: AX BX CX DX SI DI BP SP IP FLAGS CS SS R8 R9 R10 R11 R12 R13 R14 R15 The config of the test event doesn't contain the PMU information. The kernel may fail to initialize it on the correct hybrid PMU and return the wrong non-supported information. Add the PMU information into the config for the hybrid platform. The same register set is supported among different hybrid PMUs. Checking the first available one is good enough. With the patch on ADL-N: $ perf record -I? available registers: AX BX CX DX SI DI BP SP IP FLAGS CS SS R8 R9 R10 R11 R12 R13 R14 R15 XMM0 XMM1 XMM2 XMM3 XMM4 XMM5 XMM6 XMM7 XMM8 XMM9 XMM10 XMM11 XMM12 XMM13 XMM14 XMM15 Fixes: 6466ec14aaf44ff1 ("perf regs x86: Add X86 specific arch__intr_reg_mask()") Reported-by: Ammy Yi <[email protected]> Signed-off-by: Kan Liang <[email protected]> Acked-by: Ian Rogers <[email protected]> Cc: Ingo Molnar <[email protected]> Cc: Jiri Olsa <[email protected]> Cc: Kan Liang <[email protected]> Cc: Namhyung Kim <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Xing Zhengjun <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
2022-05-21perf test: Fix "all PMU test" to skip hv_24x7/hv_gpci tests on powerpcAthira Rajeev1-0/+10
"perf all PMU test" picks the input events from "perf list --raw-dump pmu" list and runs "perf stat -e" for each of the event in the list. In case of powerpc, the PowerVM environment supports events from hv_24x7 and hv_gpci PMU which is of example format like below: - hv_24x7/CPM_ADJUNCT_INST,domain=?,core=?/ - hv_gpci/event,partition_id=?/ The value for "?" needs to be filled in depending on system and respective event. CPM_ADJUNCT_INST needs have core value and domain value. hv_gpci event needs partition_id. Similarly, there are other events for hv_24x7 and hv_gpci having "?" in event format. Hence skip these events on powerpc platform since values like partition_id, domain is specific to system and event. Fixes: 3d5ac9effcc640d5 ("perf test: Workload test of all PMUs") Signed-off-by: Athira Jajeev <[email protected]> Acked-by: Ian Rogers <[email protected]> Cc: Disha Goel <[email protected]> Cc: Jiri Olsa <[email protected]> Cc: Kajol Jain <[email protected]> Cc: [email protected] Cc: Madhavan Srinivasan <[email protected]> Cc: Michael Ellerman <[email protected]> Cc: Nageswara R Sastry <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
2022-05-21Revert "ACPICA: executer/exsystem: Warn about sleeps greater than 10 ms"Rafael J. Wysocki1-11/+0
Commit 6eaf08770ee8 ("ACPICA: executer/exsystem: Warn about sleeps greater than 10 ms") made acpi_ex_system_do_sleep() log a warning for sleep times greater than 10 ms, but such sleep times are used in power management AML because of the PCI specification requirements. This results with logging warnings that cannot really be acted on in any useful way which is annoying and these warnings show up in the logs on many production systems, so revert commit 6eaf08770ee8. Signed-off-by: Rafael J. Wysocki <[email protected]>
2022-05-21io_uring: cleanup handling of the two task_work listsJens Axboe1-25/+37
Rather than pass in a bool for whether or not this work item needs to go into the priority list or not, provide separate helpers for it. For most use cases, this also then gets rid of the branch for non-priority task work. While at it, rename the prior_task_list to prio_task_list. Prior is a confusing name for it, as it would seem to indicate that this is the previous task_work list. prio makes it clear that this is a priority task_work list. Signed-off-by: Jens Axboe <[email protected]>
2022-05-21EDAC/xgene: Fix typo processsors -> processorsJulia Lawall1-1/+1
Spelling mistake (triple letters) in comment. Detected with the help of Coccinelle. Signed-off-by: Julia Lawall <[email protected]> Signed-off-by: Borislav Petkov <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-05-21mtip32xx: fix typo in commentJulia Lawall1-1/+1
Spelling mistake (triple letters) in comment. Detected with the help of Coccinelle. Signed-off-by: Julia Lawall <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jens Axboe <[email protected]>
2022-05-21blk-mq: fix typo in commentJulia Lawall1-1/+1
Spelling mistake (triple letters) in comment. Detected with the help of Coccinelle. Signed-off-by: Julia Lawall <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jens Axboe <[email protected]>
2022-05-21drivers: i2c: thunderx: Allow driver to work with ACPI defined TWSI controllersPiyush Malgujar1-0/+1
Due to i2c->adap.dev.fwnode not being set, ACPI_COMPANION() wasn't properly found for TWSI controllers. Signed-off-by: Szymon Balcerak <[email protected]> Signed-off-by: Piyush Malgujar <[email protected]> Signed-off-by: Wolfram Sang <[email protected]>
2022-05-21i2c: ismt: Provide a DMA buffer for Interrupt Cause LoggingMika Westerberg1-0/+14
Before sending a MSI the hardware writes information pertinent to the interrupt cause to a memory location pointed by SMTICL register. This memory holds three double words where the least significant bit tells whether the interrupt cause of master/target/error is valid. The driver does not use this but we need to set it up because otherwise it will perform DMA write to the default address (0) and this will cause an IOMMU fault such as below: DMAR: DRHD: handling fault status reg 2 DMAR: [DMA Write] Request device [00:12.0] PASID ffffffff fault addr 0 [fault reason 05] PTE Write access is not set To prevent this from happening, provide a proper DMA buffer for this that then gets mapped by the IOMMU accordingly. Signed-off-by: Mika Westerberg <[email protected]> Reviewed-by: From: Andy Shevchenko <[email protected]> Signed-off-by: Wolfram Sang <[email protected]>
2022-05-21i2c: mt7621: fix missing clk_disable_unprepare() on error in mtk_i2c_probe()Yang Yingliang1-2/+8
Fix the missing clk_disable_unprepare() before return from mtk_i2c_probe() in the error handling case. Fixes: d04913ec5f89 ("i2c: mt7621: Add MediaTek MT7621/7628/7688 I2C driver") Signed-off-by: Yang Yingliang <[email protected]> Reviewed-by: Stefan Roese <[email protected]> Signed-off-by: Wolfram Sang <[email protected]>
2022-05-20Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds8-19/+56
Pull kvm fixes from Paolo Bonzini: "ARM: - Correctly expose GICv3 support even if no irqchip is created so that userspace doesn't observe it changing pointlessly (fixing a regression with QEMU) - Don't issue a hypercall to set the id-mapped vectors when protected mode is enabled (fix for pKVM in combination with CPUs affected by Spectre-v3a) x86 (five oneliners, of which the most interesting two are): - a NULL pointer dereference on INVPCID executed with paging disabled, but only if KVM is using shadow paging - an incorrect bsearch comparison function which could truncate the result and apply PMU event filtering incorrectly. This one comes with a selftests update too" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: KVM: x86/mmu: fix NULL pointer dereference on guest INVPCID KVM: x86: hyper-v: fix type of valid_bank_mask KVM: Free new dirty bitmap if creating a new memslot fails KVM: eventfd: Fix false positive RCU usage warning selftests: kvm/x86: Verify the pmu event filter matches the correct event selftests: kvm/x86: Add the helper function create_pmu_event_filter kvm: x86/pmu: Fix the compare function used by the pmu event filter KVM: arm64: Don't hypercall before EL2 init KVM: arm64: vgic-v3: Consistently populate ID_AA64PFR0_EL1.GIC KVM: x86/mmu: Update number of zapped pages even if page list is stable
2022-05-20Merge tag 'clk-fixes-for-linus' of ↵Linus Torvalds4-15/+22
git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk fixes from Stephen Boyd: "Three clk driver fixes to close out the release - Fix a divider calculation breaking boot on Broadcom bcm2835 - Fix HDMI output on Tanix TX6 mini board by reverting a patch - Fix clk_set_rate_range() calls on at91 by considering the range while calculating the divisor" * tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: clk: at91: generated: consider range when calculating best rate Revert "clk: sunxi-ng: sun6i-rtc: Add support for H6" clk: bcm2835: fix bcm2835_clock_choose_div
2022-05-20Merge tag 'drm-fixes-2022-05-21' of git://anongit.freedesktop.org/drm/drmLinus Torvalds14-19/+102
Pull drm fixes from Dave Airlie: "Few final fixes for 5.18, one amdgpu, core dp mst leak fix, dma-buf two fixes, and i915 has a few fixes, one for a regression on older GM45 chipsets, dma-buf: - ioctl userspace use fix - fix dma-buf sysfs name generation core: - dp/mst leak fix amdgpu: - suspend/resume regression fix i915: - fix for #5806: GPU hangs and display artifacts on Intel GM45 - reject DMC with out-of-spec MMIO - correctly mark guilty contexts on GuC reset" * tag 'drm-fixes-2022-05-21' of git://anongit.freedesktop.org/drm/drm: drm/i915: Use i915_gem_object_ggtt_pin_ww for reloc_iomap drm/amd: Don't reset dGPUs if the system is going to s2idle drm/dp/mst: fix a possible memory leak in fetch_monitor_name() dma-buf: fix use of DMA_BUF_SET_NAME_{A,B} in userspace i915/guc/reset: Make __guc_reset_context aware of guilty engines drm/i915/dmc: Add MMIO range restrictions dma-buf: ensure unique directory name for dmabuf stats
2022-05-21Merge tag 'drm-intel-fixes-2022-05-20' of ↵Dave Airlie8-16/+74
git://anongit.freedesktop.org/drm/drm-intel into drm-fixes - fix for #5806: GPU hangs and display artifacts on 5.18-rc3 on Intel GM45 - reject DMC with out-of-spec MMIO (Cc: stable) - correctly mark guilty contexts on GuC reset. Signed-off-by: Dave Airlie <[email protected]> From: Joonas Lahtinen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-05-21Merge tag 'drm-misc-fixes-2022-05-20' of ↵Dave Airlie3-2/+11
git://anongit.freedesktop.org/drm/drm-misc into drm-fixes Fix for a memory leak in dp_mst, a (userspace) build fix for DMA_BUF_SET_NAME defines and a directory name generation fix for dmabuf stats Signed-off-by: Dave Airlie <[email protected]> From: Maxime Ripard <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/20220520072408.cpjzy2taugagvrh7@houat
2022-05-20perf: Fix sys_perf_event_open() race against selfPeter Zijlstra1-0/+14
Norbert reported that it's possible to race sys_perf_event_open() such that the looser ends up in another context from the group leader, triggering many WARNs. The move_group case checks for races against itself, but the !move_group case doesn't, seemingly relying on the previous group_leader->ctx == ctx check. However, that check is racy due to not holding any locks at that time. Therefore, re-check the result after acquiring locks and bailing if they no longer match. Additionally, clarify the not_move_group case from the move_group-vs-move_group race. Fixes: f63a8daa5812 ("perf: Fix event->ctx locking") Reported-by: Norbert Slusarek <[email protected]> Signed-off-by: Peter Zijlstra (Intel) <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
2022-05-20Merge tag 'gpio-fixes-for-v5.18' of ↵Linus Torvalds2-2/+9
git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux Pull gpio fixes from Bartosz Golaszewski: - fix bitops logic in gpio-vf610 - return an error if the user tries to use inverted polarity in gpio-mvebu * tag 'gpio-fixes-for-v5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux: gpio: mvebu/pwm: Refuse requests with inverted polarity gpio: gpio-vf610: do not touch other bits when set the target bit
2022-05-20Merge tag 'mmc-v5.18-rc4-2' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc Pull MMC fix from Ulf Hansson: "MMC core: - Fix busy polling for MMC_SEND_OP_COND again" * tag 'mmc-v5.18-rc4-2' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: mmc: core: Fix busy polling for MMC_SEND_OP_COND again
2022-05-20Merge tag 'ceph-for-5.18-rc8' of https://github.com/ceph/ceph-clientLinus Torvalds2-185/+129
Pull ceph fix from Ilya Dryomov: "A fix for a nasty use-after-free, marked for stable" * tag 'ceph-for-5.18-rc8' of https://github.com/ceph/ceph-client: libceph: fix misleading ceph_osdc_cancel_request() comment libceph: fix potential use-after-free on linger ping and resends
2022-05-20Merge tag 'riscv-for-linus-5.18-rc8' of ↵Linus Torvalds2-2/+2
git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull RISC-V fixes from Palmer Dabbelt: - fix the fu540-c000 device tree to avoid a schema check failure on the DMA node name - fix typo in the PolarFire SOC device tree * tag 'riscv-for-linus-5.18-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: riscv: dts: microchip: fix gpio1 reg property typo riscv: dts: sifive: fu540-c000: align dma node name with dtschema
2022-05-20Merge tag 'arm64-fixes' of ↵Linus Torvalds3-15/+39
git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 fixes from Will Deacon: "Three arm64 fixes for -rc8/final. The MTE and stolen time fixes have been doing the rounds for a little while, but review and testing feedback was ongoing until earlier this week. The kexec fix showed up on Monday and addresses a failure observed under Qemu. Summary: - Add missing write barrier to publish MTE tags before a pte update - Fix kexec relocation clobbering its own data structures - Fix stolen time crash if a timer IRQ fires during CPU hotplug" * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: arm64: mte: Ensure the cleared tags are visible before setting the PTE arm64: kexec: load from kimage prior to clobbering arm64: paravirt: Use RCU read locks to guard stolen_time
2022-05-20hwmon: (pmbus/ltc2978) Add chip specific write_byte_dataMårten Lindahl1-0/+12
Several of the manuals for devices supported by this driver describes the need for a minimum wait time before the chip is ready to receive next command. This wait time is already implemented in the driver as a ltc_wait_ready function with a driver defined wait time of 100 ms, and is considered for specific devices before reading/writing data on the pmbus. Since this driver uses the default pmbus_regulator_ops for the enable/ disable/is_enabled functions we should add a driver specific callback for write_byte_data to prevent bypassing the wait time recommendations for the following devices: ltc3880/ltc3882/ltc3883/ltc3884/ltc3886/ ltc3887/ltc3889/ltm4664/ltm4675/ltm4676/ltm4677/ltm4678/ltm4680/ltm4686/ ltm4700/ltc7880. Signed-off-by: Mårten Lindahl <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Guenter Roeck <[email protected]>
2022-05-20hwmon: (pmbus) Use _pmbus_read_byte_data with callbackMårten Lindahl1-23/+23
Some of the pmbus core functions uses pmbus_read_byte_data, which does not support driver callbacks for chip specific write operations. This could potentially influence some specific regulator chips that for example need a time delay before each data access. Lets use _pmbus_read_byte_data with callback check. Signed-off-by: Mårten Lindahl <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Guenter Roeck <[email protected]>
2022-05-20hwmon: (pmbus) Introduce and use write_byte_data callbackMårten Lindahl2-3/+23
Some of the pmbus core functions uses pmbus_write_byte_data, which does not support driver callbacks for chip specific write operations. This could potentially influence some specific regulator chips that for example need a time delay before each data access. Lets add support for driver callback with _pmbus_write_byte_data. Signed-off-by: Mårten Lindahl <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Guenter Roeck <[email protected]>
2022-05-20hwmon: (asus-ec-sensors) add doc entry for PRIME X470-PROEugene Shalygin1-0/+1
Add PRIME X470-PRO to the list of supported boards. Signed-off-by: Eugene Shalygin <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Guenter Roeck <[email protected]>
2022-05-20hwmon: (asus-ec-sensors) add PRIME X470-PRO boardEugene Shalygin1-0/+43
This board is supposed to be handled by the asus-wmi-sensors driver, but due to a buggy WMI implementation the driver and the official ASUS software make the BIOS hang together with fan controls [1, 2]. This driver complements values provided by the SIO chip and does not freeze the BIOS, as tested by a user [2]. [1] https://github.com/electrified/asus-wmi-sensors/blob/master/README.md [2] https://github.com/zeule/asus-ec-sensors/issues/12 Signed-off-by: Eugene Shalygin <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Guenter Roeck <[email protected]>
2022-05-20hwmon: (asus-ec-sensors) add support for board familiesEugene Shalygin1-5/+35
DSDT code for AMD 400-series chipset shows that sensor addresses differ for this generation from those for the AMD 500-series boards. Signed-off-by: Eugene Shalygin <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Guenter Roeck <[email protected]>
2022-05-20hwmon: (asus-ec-sensors) implement locking via the ACPI global lockEugene Shalygin2-26/+101
For some board models ASUS uses the global ACPI lock to guard access to the hardware, so do we. Signed-off-by: Eugene Shalygin <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Guenter Roeck <[email protected]>
2022-05-20hwmon: (asus-ec-sensors) introduce ec_board_info struct for board dataEugene Shalygin1-89/+123
We need to keep some more information about the current board than just the sensors set, and with more boards to add the dmi id array grows quickly. Our probe code is always the same so let's switch to a custom test code and a custom board info array. That allows us to omit board vendor string (ASUS uses two strings that differ in case) in the board info and use case-insensitive comparison, and also do not duplicate sensor definitions for such board variants as " (WI-FI)" when sensors are identical to the base variant. Also saves a quarter of the module size by replacing big dmi_system_id structs with smaller ones. Signed-off-by: Eugene Shalygin <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Guenter Roeck <[email protected]>
2022-05-20hwmon: (occ) Delay hwmon registration until user requestEddie James5-90/+156
Instead of registering the hwmon device at probe time, use the existing "occ_active" sysfs file to control when the driver polls the OCC for sensor data and registers with hwmon. The reason for this change is that the SBE, which is the device by which the driver communicates with the OCC, cannot handle communications during certain system state transitions, resulting in unrecoverable system errors. Signed-off-by: Eddie James <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Guenter Roeck <[email protected]>
2022-05-20hwmon: (nct6775) Split core and platform driverZev Weiss6-1433/+1526
This splits the nct6775 driver into an interface-independent core and a separate platform driver that wraps inb/outb port I/O (or asuswmi methods) around that core. Signed-off-by: Zev Weiss <[email protected]> Tested-by: Renze Nicolai <[email protected]> Link: https://lore.kernel.org/r/[email protected] Tested-by: Oleksandr Natalenko <[email protected]> Signed-off-by: Guenter Roeck <[email protected]>
2022-05-20hwmon: (nct6775) Convert S_I* permissions macros to octalZev Weiss1-95/+64
Checkpatch has been warning about these for a while; the octal versions are both more comprehensible and more concise. Signed-off-by: Zev Weiss <[email protected]> Link: https://lore.kernel.org/r/[email protected] Tested-by: Oleksandr Natalenko <[email protected]> Signed-off-by: Guenter Roeck <[email protected]>
2022-05-20hwmon: (nct6775) Add read-only modeZev Weiss1-6/+12
When enabled, all write bits are removed from the modes of all sysfs attribute files. This provides a bit of infrastructure for the upcoming i2c version of this driver, which should generally avoid writes to device registers so as not to interfere with simultaneous use of the device via the LPC interface. Signed-off-by: Zev Weiss <[email protected]> Reviewed-by: Joel Stanley <[email protected]> Link: https://lore.kernel.org/r/[email protected] Tested-by: Oleksandr Natalenko <[email protected]> Signed-off-by: Guenter Roeck <[email protected]>
2022-05-20hwmon: (nct6775) Rearrange attr-group initializationZev Weiss1-42/+42
We now track the number of attribute groups in nct6775_data, as a measure to simplify handling differences in the set of enabled attribute groups between nct6775 drivers (platform & i2c). As a side effect, we also reduce the amount of IS_ERR()/PTR_ERR() boilerplate a bit. Signed-off-by: Zev Weiss <[email protected]> Reviewed-by: Joel Stanley <[email protected]> Link: https://lore.kernel.org/r/[email protected] Tested-by: Oleksandr Natalenko <[email protected]> Signed-off-by: Guenter Roeck <[email protected]>
2022-05-20hwmon: (nct6775) Convert register access to regmap APIZev Weiss1-315/+662
This replaces the nct6775_data->{read,write}_value function pointers with a regmap. The major difference is that the regmap access functions may fail, and hence require checking at each call site. While the existing WMI register-access code had potential failure paths, they were masked by the fact that the read_value() function returned the register value directly, and hence squashed errors undetectably by simply returning zero, and while the write_value() functions were capable of reporting errors, all callers ignored them. This improves the robustness of the existing code, and also prepares the driver for an i2c version to be added soon, for which register accesses are much more likely to actually fail. The conversion of the register-access call sites is largely mechanical (reading a register now returns the value via an out-param pointer, and returned errors must be checked for and propagated to callers), though the nct6775_write_fan_div() function is refactored slightly to avoid duplicating nearly identical (and now lengthier) code in each switch case. Signed-off-by: Zev Weiss <[email protected]> Reviewed-by: Joel Stanley <[email protected]> Link: https://lore.kernel.org/r/[email protected] Tested-by: Oleksandr Natalenko <[email protected]> Signed-off-by: Guenter Roeck <[email protected]>
2022-05-20hwmon: (dell-smm) Warn if SMM call took a very long time to executeArmin Wolf1-0/+6
If a particular SMM call takes a very long time to execute, the user might experience audio problems. Print a warning if a particular SMM call took over 0.250 seconds to execute, so the user can check whether or not possible audio problems are caused by this driver. Signed-off-by: Armin Wolf <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Guenter Roeck <[email protected]>
2022-05-20hwmon: (dell-smm) Cleanup init codeArmin Wolf1-6/+3
The default values for i8k_fan_mult and i8k_fan_max should be assigend only if the values specified as module params or in DMI are invalid/missing. Signed-off-by: Armin Wolf <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Guenter Roeck <[email protected]>
2022-05-20hwmon: (dell-smm) Avoid unnecessary SMM calls during initArmin Wolf1-23/+14
When the driver tries to detect the fan multiplier during module initialisation, it issues one SMM call for each fan. Those SMM calls are however redundant and also try to query fans which may not be present. Fix that by detecting the fan multiplier during hwmon initialisation when no extra SMM calls are needed. Also dont assume the last nominal speed entry to be the biggest and instead check all entries. Signed-off-by: Armin Wolf <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Guenter Roeck <[email protected]>
2022-05-20hwmon: (lm75) Add Atmel AT30TS74 supportPeter Rosin2-0/+15
Atmel (now Microchip) AT30TS74 is an LM75 compatible sensor. Add it. Signed-off-by: Peter Rosin <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Guenter Roeck <[email protected]>
2022-05-20dt-bindings: hwmon: Add Atmel AT30TS74Peter Rosin1-0/+1
Document the Atmel (now Microchip) AT30TS74 which is an LM75 based temperature sensor. Acked-by: Rob Herring <[email protected]> Signed-off-by: Peter Rosin <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Guenter Roeck <[email protected]>
2022-05-20hwmon: (tmp401) Fix incorrect return value of tmp401_init_clientCamel Guo1-1/+1
When ti,n-factor, ti,beta-compentation are not defined in devicetree, of_property_read_u32|s32 returns -EINVAL. In this case, tmp401_init_client should return 0 instead of simply pass ret to its caller. Signed-off-by: Camel Guo <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Guenter Roeck <[email protected]>
2022-05-20hwmon: (pmbus/max16601) Add MAX16602 supportAtif Ofluoglu3-7/+18
Adding another MAX16602 chip support to MAX16601 driver Tested with MAX16602 works as expected. Signed-off-by: Atif Ofluoglu <[email protected]> Signed-off-by: Guenter Roeck <[email protected]>
2022-05-20hwmon: (aquacomputer_d5next) Add support for Aquacomputer FarbwerkJack Doan4-8/+38
Extend aquacomputer_d5next driver to expose hardware temperature sensors of the Aquacomputer Farbwerk RGB controller, which communicates through a proprietary USB HID protocol. Four temperature sensors are available. Additionally, serial number and firmware version are exposed through debugfs. Also, add Jack Doan to MAINTAINERS for this driver. Signed-off-by: Jack Doan <[email protected]> Signed-off-by: Aleksa Savic <[email protected]> Link: https://lore.kernel.org/r/YmTcrq8Gzel0zYYD@jackdesk Signed-off-by: Guenter Roeck <[email protected]>
2022-05-20hwmon: (dell-smm) Update Documentation regarding firmware bugsArmin Wolf1-0/+2
When adding the Inspiron 3505 to the fan type blacklist, the Documentation was not updated to mention the firmware bug on this machine. Fix that. Fixes: 6ba463edccb9 (hwmon: (dell-smm) Add Inspiron 3505 to fan type blacklist) Signed-off-by: Armin Wolf <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Guenter Roeck <[email protected]>
2022-05-20hwmon: (jc42) Add support for S-34TS04AOleksandr Shamray1-0/+6
S-34TS04A is a JC42 compatible 2-wire serial EEPROM with temperature sensor from Seiko Instruments/ABLIC. Signed-off-by: Oleksandr Shamray <[email protected]> Reviewed-by: Vadim Pasternak <[email protected]> Signed-off-by: Guenter Roeck <[email protected]>
2022-05-20hwmon: (tmp401) Add support of three advanced featuresCamel Guo1-1/+43
tmp401 driver supports TMP401, TMP411 and TMP43X temperature sensors. According to their datasheet: - all of them support extended temperature range feature; - TMP411 and TPM43X support n-factor correction feature; - TMP43X support beta compensation feature. In order to support setting them during bootup, this commit reads ti,extended-range-enable, ti,n-factor and ti,beta-compensation and set the corresponding registers during probing. Signed-off-by: Camel Guo <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Guenter Roeck <[email protected]>
2022-05-20dt-bindings: hwmon: Add TMP401, TMP411 and TMP43xCamel Guo2-0/+106
Document the TMP401, TMP411 and TMP43x device devicetree bindings Reviewed-by: Rob Herring <[email protected]> Reviewed-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Camel Guo <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Guenter Roeck <[email protected]>
2022-05-20Merge branch 'for-next/esr-elx-64-bit' into for-next/coreCatalin Marinas27-140/+147
* for-next/esr-elx-64-bit: : Treat ESR_ELx as a 64-bit register. KVM: arm64: uapi: Add kvm_debug_exit_arch.hsr_high KVM: arm64: Treat ESR_EL2 as a 64-bit register arm64: Treat ESR_ELx as a 64-bit register arm64: compat: Do not treat syscall number as ESR_ELx for a bad syscall arm64: Make ESR_ELx_xVC_IMM_MASK compatible with assembly
2022-05-20Merge branch 'for-next/kselftest' into for-next/coreCatalin Marinas42-116/+2761
* for-next/kselftest: (32 commits) : arm64 kselftest updates. kselftest/arm64: Explicitly build no BTI tests with BTI disabled kselftest/arm64: bti: force static linking selftests/arm64: Use switch statements in mte_common_util.c selftests/arm64: Remove casts to/from void in check_tags_inclusion selftests/arm64: Check failures to set tags in check_tags_inclusion selftests/arm64: Allow zero tags in mte_switch_mode() selftests/arm64: Log errors in verify_mte_pointer_validity() kselftest/arm64: Fix ABI header directory location selftests/arm64: Fix O= builds for the floating point tests selftests/arm64: Clean the fp helper libraries selftests/arm64: Define top_srcdir for the fp tests selftests/arm64: Use TEST_GEN_PROGS_EXTENDED in the FP Makefile kselftest/arm64: fix array_size.cocci warning selftests/arm64: Add a testcase for handling of ZA on clone() kselftest/arm64: Add SME support to syscall ABI test kselftest/arm64: Add coverage for the ZA ptrace interface kselftest/arm64: Add streaming SVE to SVE ptrace tests kselftest/arm64: signal: Add SME signal handling tests kselftest/arm64: Add stress test for SME ZA context switching kselftest/arm64: signal: Handle ZA signal context in core code ...
2022-05-20Merge branch 'for-next/sysreg-gen' into for-next/coreCatalin Marinas19-220/+784
* for-next/sysreg-gen: (32 commits) : Automatic system register definition generation. arm64/sysreg: Generate definitions for FAR_ELx arm64/sysreg: Generate definitions for DACR32_EL2 arm64/sysreg: Generate definitions for CSSELR_EL1 arm64/sysreg: Generate definitions for CPACR_ELx arm64/sysreg: Generate definitions for CONTEXTIDR_ELx arm64/sysreg: Generate definitions for CLIDR_EL1 arm64/sve: Generate ZCR definitions arm64/sme: Generate defintions for SVCR arm64/sme: Generate SMPRI_EL1 definitions arm64/sme: Automatically generate SMPRIMAP_EL2 definitions arm64/sme: Automatically generate SMIDR_EL1 defines arm64/sme: Automatically generate defines for SMCR arm64/sysreg: Support generation of RAZ fields arm64/sme: Remove _EL0 from name of SVCR - FIXME sysreg.h arm64/sme: Standardise bitfield names for SVCR arm64/sme: Drop SYS_ from SMIDR_EL1 defines arm64/fp: Rename SVE and SME LEN field name to _WIDTH arm64/fp: Make SVE and SME length register definition match architecture arm64/sysreg: fix odd line spacing arm64/sysreg: improve comment for regs without fields ...
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