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2017-01-27drm/amdgpu/virt: use kiq to access registers (v2)Xiangliang Yu4-0/+75
For virtualization, it is must for driver to use KIQ to access registers when it is out of GPU full access mode. v2: agd: rebase Signed-off-by: Xiangliang Yu <[email protected]> Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Monk Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amdgpu/virt: add runtime flagXiangliang Yu1-0/+4
Add new flag to define gpu runtime that is out of full gpu access. Signed-off-by: Xiangliang Yu <[email protected]> Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amdgpu/gfx8: implement emit_rreg/wreg functionXiangliang Yu2-0/+38
Implement emit_rreg/wreg function for kiq ring. Signed-off-by: Xiangliang Yu <[email protected]> Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amdgpu/ring: add two interfaces to support r/w registers with kiqXiangliang Yu2-0/+4
During virtual runtime, need to send command to kiq ring to read/write GPU registers. Add two interface to support the two actions. Signed-off-by: Xiangliang Yu <[email protected]> Signed-off-by: Monk Linu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amdgpu:invoke CSA functions (v2)Monk Liu3-0/+40
Make sure the CSA is mapped. v2: agd: rebase. Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amdgpu:add new file for SRIOVMonk Liu3-1/+98
for SRIOV usage, CSA is only used per device and each VM will map on it. Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amdgpu:new field members for SRIOVMonk Liu2-0/+8
and implement CSA functions in this file Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amd/amdgpu: add check that shadow page tables are GPU-accessibleNicolai Hähnle1-3/+6
Skip amdgpu_gem_va_update_vm otherwise. Also clean up the check for the non-shadow page tables using the new helper function. This fixes a crash with the stack trace: amdgpu_gem_va_update_vm -> amdgpu_vm_update_page_directory -> amdgpu_ttm_bind -> amdgpu_gtt_mgr_alloc v2: actually check bo->shadow instead of just checking bo twice Signed-off-by: Nicolai Hähnle <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amd/amdgpu: add check that shadow page directory is GPU-accessibleNicolai Hähnle1-3/+8
Skip amdgpu_gem_va_update_vm when shadow the page directory is swapped out. Clean up the check for non-shadow BOs as well using the new helper function. This fixes a crash with the stack trace: amdgpu_gem_va_update_vm -> amdgpu_vm_update_page_directory -> amdgpu_ttm_bind -> amdgpu_gtt_mgr_alloc Signed-off-by: Nicolai Hähnle <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amd/amdgpu: add amdgpu_bo_gpu_accessible helper functionNicolai Hähnle1-0/+9
Signed-off-by: Nicolai Hähnle <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amd/amdgpu: move eviction counting to amdgpu_bo_move_notifyNicolai Hähnle2-4/+4
This catches evictions of shadow page tables from the GART. Since shadow page tables are always stored in system memory, amdgpu_bo_move is never called for them. This fixes a crash during command submission that occurs when only a shadow page table and no other BOs were evicted since the last submission. Fixes: 1baa439fb2f4e586 ("drm/amdgpu: allocate shadow for pd/pt bo V2") Signed-off-by: Nicolai Hähnle <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/ttm: add evict parameter to ttm_bo_driver::move_notifyNicolai Hähnle10-8/+22
Ensure that the driver can listen to evictions even when they don't take the path through ttm_bo_driver::move. This is crucial for amdgpu, which relies on an eviction counter to skip re-binding page tables when possible. Signed-off-by: Nicolai Hähnle <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amdgpu: refine vce3.0 initialize.Rex Zhu2-18/+35
1. disable vce cg when vce hw initialize. 2. initizlize vce clock to 10KHz fo dgpu, so no need to set bypass clock to vce. Change-Id: I934c2c4820cc95c1bfa2fa41ff0f40a0d3cd1c40 Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amdgpu: extend profiling mode.Rex Zhu6-26/+154
in profiling mode, powerplay will fix power state as stable as possible.and disable gfx cg and LBPW feature. profile_standard: as a prerequisite, ensure power and thermal sustainable, set clocks ratio as close to the highest clock ratio as possible. profile_min_sclk: fix mclk as profile_normal, set lowest sclk profile_min_mclk: fix sclk as profile_normal, set lowest mclk profile_peak: set highest sclk and mclk, power and thermal not sustainable profile_exit: exit profile mode. enable gfx cg/lbpw feature. Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amd/powerplay: refine DIDT feature in Powerplay.Rex Zhu2-49/+179
Updating SQ DIDT settings and block mask so SQ uses PCC on Polaris11. Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amd/powerplay: add new smu message.Rex Zhu1-0/+3
Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amd/powerplay: Configuring DIDT blocks only SQ enabled on Polaris11.Rex Zhu1-9/+12
following firmware's request. Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amdgpu: fix bug return invalid value to sysfs.Rex Zhu1-1/+1
Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amdgpu: add get clockgating_state method for vce v3Huang Rui2-4/+37
Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amdgpu: add get clockgating_state method for uvd v5&v6Huang Rui3-4/+63
Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amdgpu: add get clockgating_state method for vi commonHuang Rui1-0/+27
Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amdgpu: add get clockgating_state method for sdma v3Huang Rui1-0/+17
Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amdgpu: add get clockgating_state method for gmc v8Huang Rui1-0/+16
Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amdgpu: add get clockgating_state method for gfx v8Huang Rui1-0/+40
Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amdgpu: add parse clock gating stateHuang Rui2-0/+39
Suggested-by: Felix Kuehling <[email protected]> Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Cc: William Lewis <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amdgpu: introduce an interface to get clock gating status dynamicallyHuang Rui4-0/+19
Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amdgpu: remove detect_hw_virtualization interfaceXiangliang Yu3-4/+4
Call detection function driectly, so remove the interface. V2: ci and si also need to call the detect function. Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Monk Liu <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Xiangliang Yu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amdgpu/vi: move virtualization detection forwardXiangliang Yu1-11/+13
Move the detection forward into vi_set_ip_blocks function, then add ip blocks virtualization need if device is VF. V2: add ip blocks according to asic type. Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Monk Liu <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Xiangliang Yu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amdgpu/virt: rename fieldes of virtualization structureXiangliang Yu6-14/+14
Use acronym to rename fields to make easy to spell out. Signed-off-by: Xiangliang Yu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amdgpu/gfx8: add support kernel interface queue(KIQ)Xiangliang Yu3-2/+620
KIQ is queue-memory based initialization method: setup KIQ queue firstly, then send command to KIQ to setup other queues, without accessing registers. For virtualization, need KIQ to access virtual function registers when running on guest mode. V2: use amdgpu_bo_create/free_kernel to allocate BO. Signed-off-by: Monk Liu <[email protected]> Signed-off-by: Xiangliang Yu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amdgpu: PCI I/O bar can be disabledAmber Lin1-2/+2
PCI I/O bar can be disabled in VBIOS to save the resource. It is often disabled in large aperture VBIOS. Don't call it an error. Signed-off-by: Amber Lin <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amd/powerplay: change function name to make code more readableRex Zhu5-7/+6
Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amd/powerplay: refine smumgr codeRex Zhu8-104/+61
1. delete asic_smum_init functions, export asic private functions to smumgr directly, make code more readable. 2. create asic private data in asic_init_func. Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amd/powerplay: fix memory leak in smu7_hwmgrRex Zhu5-19/+25
add pp_smu7_thermal_fini function to free related data when smu7_hwmgr_fini. Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amd/powerplay: fix memory leak in cz_hwmgr.cRex Zhu1-2/+9
Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amd/powerplay: not free hwmgr/smumgr in asic private functions.Rex Zhu2-4/+2
struct smumgr/hwmgr will be freed on amd_powerplay_destory and if we free them in one of asic private functions, other private date may not be freed. for example: power state and power table in hwmgr. Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amd/powerplay: not use module parameter in powerplay.Rex Zhu2-5/+3
Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amd/powerplay: refine powerplay interface.Rex Zhu10-479/+518
v2: add pp_check function to check pp_instance valid. 1. powerplay export two new interface to amdgpu, amd_powerplay_create/amd_powerplay_destroy. 2. create pp_instance/smumgr/hwmgr/eventmgr in early init, destroy them when lata_fini. 3. in sw_init, create and init asic private smumgr data, and free them when sw_fini. 4. in hw_init, create and init asic private hwmgr data, and free them when hw_fini. 5. export powerplay state: PP_DPM_DISABLED. when user disabled powerplay or hwmgr/eventmgr init failed, powerplay return this state to amdgpu. Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amdgpu: use same enter/exit safe mode for gfx_8.Rex Zhu1-94/+1
Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amd/powerplay: add profiling mode in dpm levelRex Zhu5-4/+24
In some case, App need to run under max stable clock. so export profiling mode: GFX CG was disabled. and user can select the max stable clock of the device. Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amdgpu: delete dead definitions of dpm_ip_funcsRex Zhu3-26/+0
Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amdgpu: delete dead module parameter:amdgpu_powerplay.Rex Zhu2-5/+0
Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amd/powerplay: fix issue can't load another smu firmware.Rex Zhu1-0/+1
need to release failed smu firmware before load another firmware. Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amd/powerplay: refine code in cz_smumgr.cRex Zhu1-66/+70
cz_smu_init will be called in sw_init. so it should not touch other blocks's firmware as they were not ready. Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amd/powerplay: fix bug dpm level unexpectly be reset to auto.Rex Zhu2-2/+5
Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amd/powerplay: Unify dpm level definesRex Zhu7-59/+45
Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amd/powerplay: delete dpm code for Cz/St.Rex Zhu6-3657/+2
The powerplay implementation has been the default for a while now. Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amd/powerplay: update all printk to pr_* on smumgrHuang Rui10-45/+45
Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amd/powerplay: update all printk to pr_* on hwmgrHuang Rui7-43/+43
Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-01-27drm/amd/powerplay: update all printk to pr_* on eventmgrHuang Rui1-1/+1
Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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