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2015-02-20Merge branch 'for-3.20' of git://git.infradead.org/users/kbusch/linux-nvme ↵Jens Axboe4-213/+414
into for-linus Merge 3.20 NVMe changes from Keith.
2015-02-20blk-throttle: check stats_cpu before reading it from sysfsThadeu Lima de Souza Cascardo1-0/+3
When reading blkio.throttle.io_serviced in a recently created blkio cgroup, it's possible to race against the creation of a throttle policy, which delays the allocation of stats_cpu. Like other functions in the throttle code, just checking for a NULL stats_cpu prevents the following oops caused by that race. [ 1117.285199] Unable to handle kernel paging request for data at address 0x7fb4d0020 [ 1117.285252] Faulting instruction address: 0xc0000000003efa2c [ 1137.733921] Oops: Kernel access of bad area, sig: 11 [#1] [ 1137.733945] SMP NR_CPUS=2048 NUMA PowerNV [ 1137.734025] Modules linked in: bridge stp llc kvm_hv kvm binfmt_misc autofs4 [ 1137.734102] CPU: 3 PID: 5302 Comm: blkcgroup Not tainted 3.19.0 #5 [ 1137.734132] task: c000000f1d188b00 ti: c000000f1d210000 task.ti: c000000f1d210000 [ 1137.734167] NIP: c0000000003efa2c LR: c0000000003ef9f0 CTR: c0000000003ef980 [ 1137.734202] REGS: c000000f1d213500 TRAP: 0300 Not tainted (3.19.0) [ 1137.734230] MSR: 9000000000009032 <SF,HV,EE,ME,IR,DR,RI> CR: 42008884 XER: 20000000 [ 1137.734325] CFAR: 0000000000008458 DAR: 00000007fb4d0020 DSISR: 40000000 SOFTE: 0 GPR00: c0000000003ed3a0 c000000f1d213780 c000000000c59538 0000000000000000 GPR04: 0000000000000800 0000000000000000 0000000000000000 0000000000000000 GPR08: ffffffffffffffff 00000007fb4d0020 00000007fb4d0000 c000000000780808 GPR12: 0000000022000888 c00000000fdc0d80 0000000000000000 0000000000000000 GPR16: 0000000000000000 0000000000000000 0000000000000000 0000000000000000 GPR20: 000001003e120200 c000000f1d5b0cc0 0000000000000200 0000000000000000 GPR24: 0000000000000001 c000000000c269e0 0000000000000020 c000000f1d5b0c80 GPR28: c000000000ca3a08 c000000000ca3dec c000000f1c667e00 c000000f1d213850 [ 1137.734886] NIP [c0000000003efa2c] .tg_prfill_cpu_rwstat+0xac/0x180 [ 1137.734915] LR [c0000000003ef9f0] .tg_prfill_cpu_rwstat+0x70/0x180 [ 1137.734943] Call Trace: [ 1137.734952] [c000000f1d213780] [d000000005560520] 0xd000000005560520 (unreliable) [ 1137.734996] [c000000f1d2138a0] [c0000000003ed3a0] .blkcg_print_blkgs+0xe0/0x1a0 [ 1137.735039] [c000000f1d213960] [c0000000003efb50] .tg_print_cpu_rwstat+0x50/0x70 [ 1137.735082] [c000000f1d2139e0] [c000000000104b48] .cgroup_seqfile_show+0x58/0x150 [ 1137.735125] [c000000f1d213a70] [c0000000002749dc] .kernfs_seq_show+0x3c/0x50 [ 1137.735161] [c000000f1d213ae0] [c000000000218630] .seq_read+0xe0/0x510 [ 1137.735197] [c000000f1d213bd0] [c000000000275b04] .kernfs_fop_read+0x164/0x200 [ 1137.735240] [c000000f1d213c80] [c0000000001eb8e0] .__vfs_read+0x30/0x80 [ 1137.735276] [c000000f1d213cf0] [c0000000001eb9c4] .vfs_read+0x94/0x1b0 [ 1137.735312] [c000000f1d213d90] [c0000000001ebb38] .SyS_read+0x58/0x100 [ 1137.735349] [c000000f1d213e30] [c000000000009218] syscall_exit+0x0/0x98 [ 1137.735383] Instruction dump: [ 1137.735405] 7c6307b4 7f891800 409d00b8 60000000 60420000 3d420004 392a63b0 786a1f24 [ 1137.735471] 7d49502a e93e01c8 7d495214 7d2ad214 <7cead02a> e9090008 e9490010 e9290018 And here is one code that allows to easily reproduce this, although this has first been found by running docker. void run(pid_t pid) { int n; int status; int fd; char *buffer; buffer = memalign(BUFFER_ALIGN, BUFFER_SIZE); n = snprintf(buffer, BUFFER_SIZE, "%d\n", pid); fd = open(CGPATH "/test/tasks", O_WRONLY); write(fd, buffer, n); close(fd); if (fork() > 0) { fd = open("/dev/sda", O_RDONLY | O_DIRECT); read(fd, buffer, 512); close(fd); wait(&status); } else { fd = open(CGPATH "/test/blkio.throttle.io_serviced", O_RDONLY); n = read(fd, buffer, BUFFER_SIZE); close(fd); } free(buffer); exit(0); } void test(void) { int status; mkdir(CGPATH "/test", 0666); if (fork() > 0) wait(&status); else run(getpid()); rmdir(CGPATH "/test"); } int main(int argc, char **argv) { int i; for (i = 0; i < NR_TESTS; i++) test(); return 0; } Reported-by: Ricardo Marin Matinata <[email protected]> Signed-off-by: Thadeu Lima de Souza Cascardo <[email protected]> Cc: [email protected] Signed-off-by: Jens Axboe <[email protected]>
2015-02-21Merge branches 'pnp', 'pm-cpuidle' and 'pm-cpufreq'Rafael J. Wysocki4-48/+56
* pnp: PNP: Switch from __check_region() to __request_region() * pm-cpuidle: cpuidle: powernv: Avoid endianness conversions while parsing DT cpuidle: powernv: Read target_residency value of idle states from DT if available * pm-cpufreq: cpufreq: s3c: remove last use of resume_clocks callback cpufreq: s3c: remove incorrect __init annotations
2015-02-21Merge branches 'acpi-ec', 'acpi-soc', 'acpi-video' and 'acpi-resources'Rafael J. Wysocki4-6/+30
* acpi-ec: ACPI / EC: Remove non-standard log emphasis * acpi-soc: ACPI / LPSS: Deassert resets for SPI host controllers on Braswell ACPI / LPSS: Always disable I2C host controllers Revert "ACPI / LPSS: Remove non-existing clock control from Intel Lynxpoint I2C" * acpi-video: ACPI / video: Disable native backlight on Samsung Series 9 laptops * acpi-resources: ACPI / resources: Change pr_info() to pr_debug() for debug information
2015-02-20Merge tag 'for_linux-3.20-rc1' of ↵Linus Torvalds7-27/+74
git://git.kernel.org/pub/scm/linux/kernel/git/jwessel/kgdb Pull kgdb/kdb updates from Jason Wessel: "KGDB/KDB New: - KDB: improved searching - No longer enter debug core on panic if panic timeout is set KGDB/KDB regressions / cleanups - fix pdf doc build errors - prevent junk characters on kdb console from printk levels" * tag 'for_linux-3.20-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/jwessel/kgdb: kgdb, docs: Fix <para> pdfdocs build errors debug: prevent entering debug mode on panic/exception. kdb: Const qualifier for kdb_getstr's prompt argument kdb: Provide forward search at more prompt kdb: Fix a prompt management bug when using | grep kdb: Remove stack dump when entering kgdb due to NMI kdb: Avoid printing KERN_ levels to consoles kdb: Fix off by one error in kdb_cpu() kdb: fix incorrect counts in KDB summary command output
2015-02-20MIPS: sead3: Corrected get_c0_perfcount_intNiklas Cassel1-1/+1
Commit e9de688dac65 ("irqchip: mips-gic: Support local interrupts") updated several platforms. This is a copy paste error. Signed-off-by: Niklas Cassel <[email protected]> Reviewed-by: Andrew Bresticker <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/9245/ Signed-off-by: Ralf Baechle <[email protected]>
2015-02-20MIPS: mm: Remove dead macro definitionsAndreas Ruprecht2-16/+0
In commit c441d4a54c6e ("MIPS: mm: Only build one microassembler that is suitable"), the Makefile at arch/mips/mm was rewritten to only build the "right" microassembler file, depending on whether CONFIG_CPU_MICROMIPS is set or not. In the files, however, there are still preprocessor definitions depending on CONFIG_CPU_MICROMIPS. The #ifdef around them can now never evaluate to true, so let's remove them altogether. This inconsistency was found using the undertaker-checkpatch tool. Signed-off-by: Andreas Ruprecht <[email protected]> Reviewed-by: Maciej W. Rozycki <[email protected]> Cc: [email protected] Cc: [email protected] Cc: Valentin Rothberg <[email protected]> Cc: Paul Bolle <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/9267/ Signed-off-by: Ralf Baechle <[email protected]>
2015-02-20Merge tag 'for-linus-3.20-1' of git://git.code.sf.net/p/openipmi/linux-ipmiLinus Torvalds4-125/+110
Pull IPMI driver updates from Corey Minyard: "Some minor fixes and cleanups, nothing big. In for-next for a while and I've done some extensive beating on the driver since I have it working in qemu and can do creatively cruel things to it" * tag 'for-linus-3.20-1' of git://git.code.sf.net/p/openipmi/linux-ipmi: ipmi: Fix a memory ordering issue ipmi: Remove uses of return value of seq_printf ipmi: Use is_visible callback for conditional sysfs entries ipmi: Free ipmi_recv_msg messages from the linked list on close ipmi: avoid gcc warning ipmi: Update timespec usage to timespec64 ipmi: Cleanup DEBUG_TIMING ifdef usage drivers:char:ipmi: Remove unneeded FIXME comment in the file,ipmi_si_intf.c char: ipmi: Remove obsolete cleanup for clientdata ipmi: Remove a FIXME for slab conversion
2015-02-20Merge branch 'next' into for-linusDmitry Torokhov887-6168/+9094
Second round of updates for 3.20.
2015-02-20Merge branches 'core', 'cxgb4', 'iser', 'mlx4', 'mlx5', 'ocrdma', 'odp', ↵Roland Dreier62-556/+1204
'qib' and 'srp' into for-next
2015-02-20IB/qib: Add blank line after declarationMike Marciniszyn17-6/+67
Upstream checkpatch now requires this. Reviewed-by: Dennis Dalessandro <[email protected]> Signed-off-by: Mike Marciniszyn <[email protected]> Signed-off-by: Roland Dreier <[email protected]>
2015-02-20IB/qib: Fix checkpatch warningsMike Marciniszyn15-44/+42
Signed-off-by: Mike Marciniszyn <[email protected]> Signed-off-by: Roland Dreier <[email protected]>
2015-02-20i2c: ocores: rework clk code to handle NULL cookieWolfram Sang1-14/+21
For, !HAVE_CLK the clk API returns a NULL cookie. Rework the initialization code to handle that. If clk_get_rate() delivers 0, we use the fallback mechanisms. The patch is pretty easy when ignoring white space issues (git diff -b). Suggested-by: Russell King <[email protected]> Signed-off-by: Wolfram Sang <[email protected]> Tested-by: Max Filippov <[email protected]>
2015-02-20MIPS: OCTEON: irq: add CIB and other fixesDavid Daney2-269/+823
- Use of_irq_init() to initialize interrupt controllers - Get rid of some unlikely() - Add CIB to support SATA and other interrupts - Add support for CIU SUM2 interrupt sources Signed-off-by: David Daney <[email protected]> Signed-off-by: Leonid Rosenboim <[email protected]> Signed-off-by: Aleksey Makarov <[email protected]> Signed-off-by: Peter Swain <[email protected]> Cc: [email protected] Cc: [email protected] Cc: Rob Herring <[email protected]> Cc: Pawel Moll <[email protected]> Cc: Mark Rutland <[email protected]> Cc: Ian Campbell <[email protected]> Cc: Kumar Gala <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/8947/ Signed-off-by: Ralf Baechle <[email protected]>
2015-02-20MIPS: OCTEON: Don't do acknowledge operations for level triggered irqs.David Daney1-2/+43
The acknowledge bits don't exist for level triggered irqs, so setting them causes the simulator to terminate. Signed-off-by: David Daney <[email protected]> Signed-off-by: Leonid Rosenboim <[email protected]> Signed-off-by: Aleksey Makarov <[email protected]> Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/8946/ Signed-off-by: Ralf Baechle <[email protected]>
2015-02-20MIPS: OCTEON: More OCTEONIII supportChandrakala Chavva4-2/+326
Read clock rate from the correct CSR. Don't clear COP0_DCACHE for OCTEONIII. Signed-off-by: Chandrakala Chavva <[email protected]> Signed-off-by: Aleksey Makarov <[email protected]> Signed-off-by: David Daney <[email protected]> Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/8945/ Signed-off-by: Ralf Baechle <[email protected]>
2015-02-20MIPS: OCTEON: Remove setting of processor specific CVMCTL icache bits.Chad Reese1-20/+0
CN38XX pass 1 required icache prefetching to be turned off. This chip never reached production and is long dead. Other processor specific icache settings are done by the bootloader. Remove these bits from the kernel. Signed-off-by: Chad Reese <[email protected]> Signed-off-by: Aleksey Makarov <[email protected]> Cc: [email protected] Cc: [email protected] Cc: David Daney <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/8944/ Signed-off-by: Ralf Baechle <[email protected]>
2015-02-20MIPS: OCTEON: Core-15169 Workaround and general CVMSEG cleanup.David Daney2-6/+17
Signed-off-by: David Daney <[email protected]> Signed-off-by: Aleksey Makarov <[email protected]> Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/8943/ Signed-off-by: Ralf Baechle <[email protected]>
2015-02-20MIPS: OCTEON: Update octeon-model.h code for new SoCs.David Daney5-27/+90
Add coverage for OCTEON III models. Signed-off-by: David Daney <[email protected]> Signed-off-by: Aleksey Makarov <[email protected]> Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/8942/ Signed-off-by: Ralf Baechle <[email protected]>
2015-02-20MIPS: OCTEON: Implement DCache errata workaround for all CN6XXXDavid Daney3-4/+8
Make messages refer to all CN6XXX. Signed-off-by: David Daney <[email protected]> Signed-off-by: Aleksey Makarov <[email protected]> Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/8941/ Signed-off-by: Ralf Baechle <[email protected]>
2015-02-20MIPS: OCTEON: Add little-endian support to asm/octeon/octeon.hDavid Daney1-30/+105
Also update union octeon_cvmemctl with new OCTEON II fields. [[email protected]: use __BITFIELD_FIELD] Signed-off-by: David Daney <[email protected]> Signed-off-by: Aleksey Makarov <[email protected]> Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/8940/ Signed-off-by: Ralf Baechle <[email protected]>
2015-02-20MIPS: OCTEON: Implement the core-16057 workaroundDavid Daney1-0/+22
Disable ICache prefetch for certian Octeon II processors. Signed-off-by: David Daney <[email protected]> Signed-off-by: Aleksey Makarov <[email protected]> Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/8938/ Signed-off-by: Ralf Baechle <[email protected]>
2015-02-20MIPS: OCTEON: Delete unused COP2 saving codeAleksey Makarov1-26/+0
Commit 2c952e06e4f5 ("MIPS: Move cop2 save/restore to switch_to()") removes assembler code to store COP2 registers. Commit a36d8225bceb ("MIPS: OCTEON: Enable use of FPU") mistakenly restores it Fixes: a36d8225bceb ("MIPS: OCTEON: Enable use of FPU") Signed-off-by: Aleksey Makarov <[email protected]> Cc: [email protected] Cc: [email protected] Cc: David Daney <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/8937/ Signed-off-by: Ralf Baechle <[email protected]>
2015-02-20MIPS: OCTEON: Use correct instruction to read 64-bit COP0 registerChandrakala Chavva1-3/+3
Use dmfc0/dmtc0 instructions for reading CvmMemCtl COP0 register, its a 64-bit wide. Signed-off-by: Chandrakala Chavva <[email protected]> Signed-off-by: Aleksey Makarov <[email protected]> Cc: [email protected] Cc: [email protected] Cc: David Daney <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/8936/ Signed-off-by: Ralf Baechle <[email protected]>
2015-02-20MIPS: OCTEON: Save and restore CP2 SHA3 stateDavid Daney3-11/+35
Allocate new save space, and then save/restore the registers if OCTEON III. Signed-off-by: David Daney <[email protected]> Signed-off-by: Aleksey Makarov <[email protected]> Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/8935/ Signed-off-by: Ralf Baechle <[email protected]>
2015-02-20MIPS: OCTEON: Fix FP context save.David Daney1-12/+7
It wasn't being saved on task switch. Signed-off-by: David Daney <[email protected]> Signed-off-by: Aleksey Makarov <[email protected]> Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/8934/ Signed-off-by: Ralf Baechle <[email protected]>
2015-02-20MIPS: OCTEON: Save/Restore wider multiply registers in OCTEON III CPUsDavid Daney4-32/+150
The wide multiplier is twice as wide, so we need to save twice as much state. Detect the multiplier type (CPU type) at start up and install model specific handlers. [[email protected]: conflict resolution, support for old compilers] Signed-off-by: David Daney <[email protected]> Signed-off-by: Leonid Rosenboim <[email protected]> Signed-off-by: Aleksey Makarov <[email protected]> Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/8933/ Signed-off-by: Ralf Baechle <[email protected]>
2015-02-20thermal: exynos: fix: Check if data->tmu_read callback is present before readLukasz Majewski1-1/+1
The exynos_tmu_data() function should on entrance test not only for valid data pointer, but also for data->tmu_read one. It is important, since afterwards it is dereferenced to get temperature code. Signed-off-by: Lukasz Majewski <[email protected]> Tested-by: Abhilash Kesavan <[email protected]> Signed-off-by: Zhang Rui <[email protected]>
2015-02-20MIPS: boot: Provide more uImage optionsMarkos Chandras2-2/+55
Allow more compression algorithms as well as uncompressed uImage.bin to be generated. An uncompressed image might be useful to rule out problems in the decompression code in the bootloader or even speed up the boot process at the expense of a bigger uImage file. Signed-off-by: Markos Chandras <[email protected]> Cc: James Hogan <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/9271/ Signed-off-by: Ralf Baechle <[email protected]>
2015-02-20MIPS: Remove unneeded #ifdef __KERNEL__ from asm/processor.hDavid Daney1-6/+0
Signed-off-by: David Daney <[email protected]> Signed-off-by: Aleksey Makarov <[email protected]> Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/8737/ Signed-off-by: Ralf Baechle <[email protected]>
2015-02-20MIPS: ip22-gio: Remove legacy suspend/resume supportLars-Peter Clausen2-26/+0
There are currently no gio device drivers that implement suspend/resume and this patch removes the bus specific legacy suspend and resume callbacks. This will allow us to eventually remove struct bus_type legacy suspend and resume support altogether. gio device drivers wanting to implement suspend and resume can use dev PM ops which will work out of the box without further modifications necessary. Signed-off-by: Lars-Peter Clausen <[email protected]> Acked-by: Thomas Bogendoerfer <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/8920/ Signed-off-by: Ralf Baechle <[email protected]>
2015-02-20mips: pci: Add ifdef around pci_proc_domainZubair Lutfullah Kakakhel1-0/+2
Without these, there are multiple definitions of pci_proc_domain() and pci_domain_nr() if linux/pci.h and asm/pci.h are included. Add #ifdefs around them Signed-off-by: Zubair Lutfullah Kakakhel <[email protected]> Reviewed-by: Markos Chandras <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/8670/ Signed-off-by: Ralf Baechle <[email protected]>
2015-02-20MIPS: Alchemy: Fix cpu clock calculationManuel Lauss1-0/+2
The current code uses bits 0-6 of the sys_cpupll register to calculate core clock speed. However this is only valid on Au1300, on all earlier models the hardware only uses bits 0-5 to generate core clock. This fixes clock calculation on the MTX1 (Au1500), where bit 6 of cpupll is set as well, which ultimately lead the code to calculate a bogus cpu core clock and also uart base clock down the line. Signed-off-by: Manuel Lauss <[email protected]> Reported-by: John Crispin <[email protected]> Tested-by: Bruno Randolf <[email protected]> Cc: [email protected] [v3.17+] Cc: Linux-MIPS <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/9279/ Signed-off-by: Ralf Baechle <[email protected]>
2015-02-20MIPS: Alchemy: remove declaration for set_cpuspecManuel Lauss1-1/+0
set_cpuspec() has been dropped with commit 074cf656700ddd1d2bd7f815f78e785418beb898 ("MIPS: Alchemy: remove cpu_table.") in late 2008. Signed-off-by: Manuel Lauss <[email protected]> Cc: Linux-MIPS <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/9150/ Signed-off-by: Ralf Baechle <[email protected]>
2015-02-20MIPS: Alchemy: preset loops_per_jiffy based on CPU clockManuel Lauss2-0/+9
This was lost during the rewrite of clock framework support. Signed-off-by: Manuel Lauss <[email protected]> Cc: Linux-MIPS <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/9149/ Signed-off-by: Ralf Baechle <[email protected]>
2015-02-20MIPS: Alchemy: fix Au1000/Au1500 LRCLK calculationManuel Lauss1-5/+14
The Au1000 and Au1500 calculate the LRCLK a bit differently than newer models: a single bit in MEM_STCFG0 selects if pclk is divided by 4 or 5. Signed-off-by: Manuel Lauss <[email protected]> Cc: Linux-MIPS <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/9148/ Signed-off-by: Ralf Baechle <[email protected]>
2015-02-20MIPS: Add set/clear CP0 macros for PageGrain registerSteven J. Hill3-4/+5
Build set and clear macros for the PageGrain register. Signed-off-by: Steven J. Hill <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/9289/ Signed-off-by: Ralf Baechle <[email protected]>
2015-02-20ARM: 8305/1: DMA: Fix kzalloc flags in __iommu_alloc_buffer()Alexandre Courbot1-1/+1
There doesn't seem to be any valid reason to allocate the pages array with the same flags as the buffer itself. Doing so can eventually lead to the following safeguard in mm/slab.c's cache_grow() to be hit: if (unlikely(flags & GFP_SLAB_BUG_MASK)) { pr_emerg("gfp: %un", flags & GFP_SLAB_BUG_MASK); BUG(); } This happens when buffers are allocated with __GFP_DMA32 or __GFP_HIGHMEM. Fix this by allocating the pages array with GFP_KERNEL to follow what is done elsewhere in this file. Using GFP_KERNEL in __iommu_alloc_buffer() is safe because atomic allocations are handled by __iommu_alloc_atomic(). Signed-off-by: Alexandre Courbot <[email protected]> Cc: Arnd Bergmann <[email protected]> Cc: Marek Szyprowski <[email protected]> Acked-by: Marek Szyprowski <[email protected]> Acked-by: Will Deacon <[email protected]> Signed-off-by: Russell King <[email protected]>
2015-02-20Merge branch 'overlayfs-next' of ↵Al Viro7-319/+517
git://git.kernel.org/pub/scm/linux/kernel/git/mszeredi/vfs into for-next
2015-02-20Infiniband: Fix potential NULL d_inode dereferenceDavid Howells2-2/+2
Code that does this: if (!(d_unhashed(tmp) && tmp->d_inode)) { ... simple_unlink(parent->d_inode, tmp); } is broken because: !(d_unhashed(tmp) && tmp->d_inode) is equivalent to: !d_unhashed(tmp) || !tmp->d_inode so it is possible to get into simple_unlink() with tmp->d_inode == NULL. simple_unlink(), however, assumes tmp->d_inode cannot be NULL. I think that what was meant is this: !d_unhashed(tmp) && tmp->d_inode and that the logical-not operator or the final close-bracket was misplaced. Signed-off-by: David Howells <[email protected]> cc: Bryan O'Sullivan <[email protected]> cc: Roland Dreier <[email protected]> Signed-off-by: Al Viro <[email protected]>
2015-02-20posix_acl: fix reference leaks in posix_acl_createOmar Sandoval1-5/+9
get_acl gets a reference which we must release in the error cases. Reviewed-by: Christoph Hellwig <[email protected]> Signed-off-by: Omar Sandoval <[email protected]> Signed-off-by: Al Viro <[email protected]>
2015-02-20autofs4: Wrong format for printing dentryRasmus Villemoes1-1/+1
%pD for struct file*, %pd for struct dentry*. Fixes: a455589f181e ("assorted conversions to %p[dD]") Signed-off-by: Rasmus Villemoes <[email protected]> Signed-off-by: Al Viro <[email protected]>
2015-02-20coredump: Fix typo in commentBastien Nocera1-1/+1
Signed-off-by: Bastien Nocera <[email protected]> Signed-off-by: Al Viro <[email protected]>
2015-02-20fs/aio.c: Remove duplicate function name in pr_debug messagesKinglong Mee1-3/+3
Have defined pr_fmt as below in fs/aio.c, so remove duplicate function name in pr_debug message. #define pr_fmt(fmt) "%s: " fmt, __func__ Signed-off-by: Kinglong Mee <[email protected]> Signed-off-by: Al Viro <[email protected]>
2015-02-20configfs: Fix potential NULL d_inode dereferenceDavid Howells1-1/+1
Code that does this: if (!(d_unhashed(dentry) && dentry->d_inode)) { ... simple_unlink(parent->d_inode, dentry); } is broken because: !(d_unhashed(dentry) && dentry->d_inode) is equivalent to: !d_unhashed(dentry) || !dentry->d_inode so it is possible to get into simple_unlink() with dentry->d_inode == NULL. simple_unlink(), however, assumes dentry->d_inode cannot be NULL. I think that what was meant is this: !d_unhashed(dentry) && dentry->d_inode and that the logical-not operator or the final close-bracket was misplaced. Signed-off-by: David Howells <[email protected]> cc: Joel Becker <[email protected]> Signed-off-by: Al Viro <[email protected]>
2015-02-20hypfs: switch to read_iter/write_iterAl Viro1-27/+24
Signed-off-by: Al Viro <[email protected]>
2015-02-20x86/mm/ASLR: Avoid PAGE_SIZE redefinition for UML subarchJiri Kosina2-2/+0
Commit f47233c2d34 ("x86/mm/ASLR: Propagate base load address calculation") causes PAGE_SIZE redefinition warnings for UML subarch builds. This is caused by added includes that were leftovers from previous patch versions are are not actually needed (especially page_types.h inlcude in module.c). Drop those stray includes. Reported-by: kbuild test robot <[email protected]> Signed-off-by: Jiri Kosina <[email protected]> Cc: Borislav Petkov <[email protected]> Cc: H. Peter Anvin <[email protected]> Cc: Kees Cook <[email protected]> Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Ingo Molnar <[email protected]>
2015-02-20don't bother with most of the bad_file_ops methodsAl Viro1-147/+0
Only ->open() should be there (always failing, of course). We never replace ->f_op of an already opened struct file, so there's no way for any of those methods to be called. Signed-off-by: Al Viro <[email protected]>
2015-02-19clk: Only recalculate the rate if neededTomeu Vizoso1-1/+4
We don't really need to recalculate the effective rate of a clock when a per-user clock is removed, if the constraints of the later aren't limiting the requested rate. This was causing problems with clocks that never had a rate set before, as rate_req would be zero. Though this could be considered a bug in the implementation of those clocks, this should be checked somewhere else. Fixes: 1c8e600440c7 ("clk: Add rate constraints to clocks") Cc: Thierry Reding <[email protected]> Cc: Peter De Schrijver <[email protected]> Signed-off-by: Tomeu Vizoso <[email protected]> Signed-off-by: Michael Turquette <[email protected]>
2015-02-19ipmi: Fix a memory ordering issueCorey Minyard1-4/+10
From a locking point of view it is safe to check waiting_msg without a lock, but there is a memory ordering issue that causes it to possibly not be set right when viewed from another processor. We are already claiming a lock right after that, move the check to inside the lock to enforce the memory ordering. Signed-off-by: Corey Minyard <[email protected]>
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