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2017-01-25MIPS: Octeon: Avoid empty-body warningArnd Bergmann1-10/+5
gcc-6 reports a harmless build warning: arch/mips/cavium-octeon/dma-octeon.c: In function 'octeon_dma_alloc_coherent': arch/mips/cavium-octeon/dma-octeon.c:179:3: error: suggest braces around empty body in an 'else' statement [-Werror=empty-body] We can fix this by rearranging the code slightly using the IS_ENABLED() macro. Signed-off-by: Arnd Bergmann <[email protected]> Cc: Hans-Christian Noren Egtvedt <[email protected]> Cc: Vineet Gupta <[email protected]> Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/15048 Signed-off-by: Ralf Baechle <[email protected]>
2017-01-25MIPS: Loongson64: Fix empty-body warning in dma_allocArnd Bergmann1-14/+6
A new gcc warning shows up for this old code with gcc-6: arch/mips/loongson64/common/dma-swiotlb.c: In function 'loongson_dma_alloc_coherent': arch/mips/loongson64/common/dma-swiotlb.c:35:2: error: suggest braces around empty body in an 'else' statement [-Werror=empty-body] The code can be easily restructured to look more readable and avoid the warning at the same time. Signed-off-by: Arnd Bergmann <[email protected]> Cc: Robin Murphy <[email protected]> Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/15047/ Signed-off-by: Ralf Baechle <[email protected]>
2017-01-25MIPS: ralink: Remove unused rt*_wdt_reset functionsArnd Bergmann3-31/+0
All pointers to these functions were removed, so now they produce warnings: arch/mips/ralink/rt305x.c:92:13: error: 'rt305x_wdt_reset' defined but not used [-Werror=unused-function] This removes the functions. If we need them again, the patch can be reverted later. Fixes: f576fb6a0700 ("MIPS: ralink: cleanup the soc specific pinmux data") Signed-off-by: Arnd Bergmann <[email protected]> Cc: John Crispin <[email protected]> Cc: Colin Ian King <[email protected]> Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/15044/ Signed-off-by: Ralf Baechle <[email protected]>
2017-01-25MIPS: ralink: Fix request_mem_region error handlingArnd Bergmann2-4/+4
request_mem_region returns a NULL pointer on error, comparing it against a number results in a warning: arch/mips/ralink/of.c: In function 'plat_of_remap_node': arch/mips/ralink/of.c:45:15: error: ordered comparison of pointer with integer zero [-Werror=extra] arch/mips/ralink/irq.c: In function 'intc_of_init': arch/mips/ralink/irq.c:167:15: error: ordered comparison of pointer with integer zero [-Werror=extra] Signed-off-by: Arnd Bergmann <[email protected]> Cc: John Crispin <[email protected]> Cc: Tobias Wolf <[email protected]> Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/15045/ Signed-off-by: Ralf Baechle <[email protected]>
2017-01-25MIPS: ralink: Remove unused timer functionsArnd Bergmann1-14/+0
The functions were originally used for the module unload path, but are not referenced any more and just cause warnings: arch/mips/ralink/timer.c:104:13: error: 'rt_timer_disable' defined but not used [-Werror=unused-function] arch/mips/ralink/timer.c:74:13: error: 'rt_timer_free' defined but not used [-Werror=unused-function] Cc: Paul Gortmaker <[email protected]> Fixes: 62ee73d284e7 ("MIPS: ralink: Make timer explicitly non-modular") Signed-off-by: Arnd Bergmann <[email protected]> Cc: Paul Gortmaker <[email protected]> Cc: John Crispin <[email protected]> Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/15041/ Signed-off-by: Ralf Baechle <[email protected]>
2017-01-25MIPS: Lantiq: Fix another request_mem_region() return code checkArnd Bergmann1-2/+2
Hauke already fixed a couple of them, but one instance remains that checks for a negative integer when it should check for a NULL pointer: arch/mips/lantiq/xway/sysctrl.c: In function 'ltq_soc_init': arch/mips/lantiq/xway/sysctrl.c:473:19: error: ordered comparison of pointer with integer zero [-Werror=extra] Fixes: 6e807852676a ("MIPS: Lantiq: Fix check for return value of request_mem_region()") Signed-off-by: Arnd Bergmann <[email protected]> Cc: John Crispin <[email protected]> Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/15043/ Signed-off-by: Ralf Baechle <[email protected]>
2017-01-25MIPS: Alchemy: Remove duplicate initializerArnd Bergmann1-1/+0
We get a harmless warning about a duplicate initalizer for the i2c board info structure: arch/mips/alchemy/board-gpr.c:239:11: error: initialized field overwritten [-Werror=override-init] As both initializers have the identical value, we can simply drop the second one. Signed-off-by: Arnd Bergmann <[email protected]> Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/15046/ Signed-off-by: Ralf Baechle <[email protected]>
2017-01-25MIPS: 'make -s' should be silentArnd Bergmann1-2/+2
A clean mips64 build produces no output except for two lines: Checking missing-syscalls for N32 Checking missing-syscalls for O32 On other architectures, there is no output at all, so let's do the same here for the sake of build testing. The 'kecho' macro is used to print the message on a normal build but skip it with 'make -s'. Fixes: e48ce6b8df5b ("[MIPS] Simplify missing-syscalls for N32 and O32") Signed-off-by: Arnd Bergmann <[email protected]> Cc: Paul Burton <[email protected]> Cc: Matt Redfearn <[email protected]> Cc: Huacai Chen <[email protected]> Cc: Maarten ter Huurne <[email protected]> Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/15040/ Signed-off-by: Ralf Baechle <[email protected]>
2017-01-25MIPS: VDSO: avoid duplicate CAC_BASE definitionArnd Bergmann1-2/+4
vdso.h includes <spaces.h> implicitly after defining CONFIG_32BITS. This defeats the override in mach-ip27/spaces.h, leading to a build error that shows up in kernelci.org: In file included from arch/mips/include/asm/mach-ip27/spaces.h:29:0, from arch/mips/include/asm/page.h:12, from arch/mips/vdso/vdso.h:26, from arch/mips/vdso/gettimeofday.c:11: arch/mips/include/asm/mach-generic/spaces.h:28:0: error: "CAC_BASE" redefined [-Werror] #define CAC_BASE _AC(0x80000000, UL) An earlier patch tried to make the second definition conditional, but that patch had the #ifdef in the wrong place, and would lead to another warning: arch/mips/include/asm/io.h: In function 'phys_to_virt': arch/mips/include/asm/io.h:138:9: error: cast to pointer from integer of different size [-Werror=int-to-pointer-cast] For all I can tell, there is no other reason than vdso32 to ever include this file with CONFIG_32BITS set, and the vdso itself should never refer to the base addresses as it is running in user space, so adding an #ifdef here is safe. Link: https://patchwork.kernel.org/patch/9418187/ Fixes: 3ffc17d8768b ("MIPS: Adjust MIPS64 CAC_BASE to reflect Config.K0") Signed-off-by: Arnd Bergmann <[email protected]> Cc: Paul Burton <[email protected]> Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/15039/ Signed-off-by: Ralf Baechle <[email protected]>
2017-01-24MIPS: Fix modversionsArnd Bergmann6-9/+43
kernelci.org reports tons of build warnings for linux-next: 35 WARNING: "memcpy" [fs/fat/msdos.ko] has no CRC! 35 WARNING: "__copy_user" [fs/fat/fat.ko] has no CRC! 32 WARNING: EXPORT symbol "memset" [vmlinux] version generation failed, symbol will not be versioned. 32 WARNING: EXPORT symbol "copy_page" [vmlinux] version generation failed, symbol will not be versioned. 32 WARNING: EXPORT symbol "clear_page" [vmlinux] version generation failed, symbol will not be versioned. 32 WARNING: EXPORT symbol "__strncpy_from_user_nocheck_asm" [vmlinux] version generation failed, symbol will not be versioned. The problem here is mainly the missing asm/asm-prototypes.h header file that is supposed to include the prototypes for each symbol that is exported from an assembler file. A second problem is that the asm/uaccess.h header contains some but not all the necessary declarations for the user access helpers. Finally, the vdso build is broken once we add asm/asm-prototypes.h, so we have to fix this at the same time by changing the vdso header. My approach here is to just not look for exported symbols in the VDSO assembler files, as the symbols cannot be exported anyway. Fixes: 576a2f0c5c6d ("MIPS: Export memcpy & memset functions alongside their definitions") Signed-off-by: Arnd Bergmann <[email protected]> Cc: Al Viro <[email protected]> Cc: James Hogan <[email protected]> Cc: Maciej W. Rozycki <[email protected]> Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/15038/ Patchwork: https://patchwork.linux-mips.org/patch/15069/ Signed-off-by: Ralf Baechle <[email protected]>
2017-01-24MIPS: Update ip27_defconfig for SCSI_DH changeArnd Bergmann1-1/+1
Since linux-4.3, SCSI_DH is a bool symbol, causing a warning in kernelci.org: arch/mips/configs/ip27_defconfig:136:warning: symbol value 'm' invalid for SCSI_DH This updates the defconfig to have the feature built-in. Fixes: 086b91d052eb ("scsi_dh: integrate into the core SCSI code") Signed-off-by: Arnd Bergmann <[email protected]> Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/15001/ Signed-off-by: Ralf Baechle <[email protected]>
2017-01-24MIPS: Update lemote2f_defconfig for CPU_FREQ_STAT changeArnd Bergmann1-1/+1
Since linux-4.8, CPU_FREQ_STAT is a bool symbol, causing a warning in kernelci.org: arch/mips/configs/lemote2f_defconfig:42:warning: symbol value 'm' invalid for CPU_FREQ_STAT This updates the defconfig to have the feature built-in. Fixes: 1aefc75b2449 ("cpufreq: stats: Make the stats code non-modular") Signed-off-by: Arnd Bergmann <[email protected]> Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/15000/ Signed-off-by: Ralf Baechle <[email protected]>
2017-01-24MIPS: Update defconfigs for NF_CT_PROTO_DCCP/UDPLITE changeArnd Bergmann7-12/+12
In linux-4.10-rc, NF_CT_PROTO_UDPLITE and NF_CT_PROTO_DCCP are bool symbols instead of tristate, and kernelci.org reports a bunch of warnings for this, like: arch/mips/configs/malta_kvm_guest_defconfig:63:warning: symbol value 'm' invalid for NF_CT_PROTO_UDPLITE arch/mips/configs/malta_defconfig:62:warning: symbol value 'm' invalid for NF_CT_PROTO_DCCP arch/mips/configs/malta_defconfig:63:warning: symbol value 'm' invalid for NF_CT_PROTO_UDPLITE arch/mips/configs/ip22_defconfig:70:warning: symbol value 'm' invalid for NF_CT_PROTO_DCCP arch/mips/configs/ip22_defconfig:71:warning: symbol value 'm' invalid for NF_CT_PROTO_UDPLITE This changes all the MIPS defconfigs with these symbols to have them built-in. Fixes: 9b91c96c5d1f ("netfilter: conntrack: built-in support for UDPlite") Fixes: c51d39010a1b ("netfilter: conntrack: built-in support for DCCP") Signed-off-by: Arnd Bergmann <[email protected]> Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/14999/ Signed-off-by: Ralf Baechle <[email protected]>
2017-01-24MIPS: BMIPS: Add support SPI device nodesJaedon Shin16-6/+478
Adds SPI device nodes to BCM7xxx MIPS based SoCs. Signed-off-by: Jaedon Shin <[email protected]> Reviewed-by: Florian Fainelli <[email protected]> Cc: Kevin Cernekee <[email protected]> Cc: Rob Herring <[email protected]> Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/14990/ Signed-off-by: Ralf Baechle <[email protected]>
2017-01-24MIPS: Fix printk continuations in cpu-bugs64.cJames Hogan1-12/+12
64-bit pre-r6 kernels output the following broken printk continuation lines during boot: Checking for the multiply/shift bug... no. Checking for the daddiu bug... no. Checking for the daddi bug... no. Fix the printk continuations in cpu-bugs64.c to use pr_cont to restore the correct output: Checking for the multiply/shift bug... no. Checking for the daddiu bug... no. Checking for the daddi bug... no. Signed-off-by: James Hogan <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/14916/ Signed-off-by: Ralf Baechle <[email protected]>
2017-01-03MIPS: zboot: Consolidate compiler flag filtering.Ralf Baechle1-1/+1
Al Viro noticed that we were using two different methods to filter out flags from KBUILD_CFLAGS. Signed-off-by: Ralf Baechle <[email protected]> Reported-by: Al Viro <[email protected]>
2017-01-03MIPS: ralink: Fix incorrect assignment on ralink_socColin Ian King1-1/+1
ralink_soc sould be assigned to RT3883_SOC, replace incorrect comparision with assignment. Signed-off-by: Colin Ian King <[email protected]> Fixes: 418d29c87061 ("MIPS: ralink: Unify SoC id handling") Cc: John Crispin <[email protected]> Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/14903/ Signed-off-by: Ralf Baechle <[email protected]>
2017-01-03MIPS: sc-mips: L2 cache is inclusive of L1 dcache for CM3Paul Burton1-0/+1
In systems with CM3 & higher, the L2 cache is inclusive of the L1 dcache. Indicate this such that cpu_has_inclusive_pcaches evaluates true and we avoid some unnecessary cache ops during DMA cache maintenance. Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/14018/ Signed-off-by: Ralf Baechle <[email protected]>
2017-01-03MIPS: c-r4k: Treat physically indexed dcaches as not aliasingPaul Burton1-0/+4
Physically indexed caches cannot suffer from virtual aliasing, so clear the MIPS_CACHE_ALIASES bit in order to ensure we don't do extra work avoiding aliasing that cannot happen. Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/14017/ Signed-off-by: Ralf Baechle <[email protected]>
2017-01-03MIPS: c-r4k: Treat I6400 dcache as though physically indexedPaul Burton1-1/+1
The L1 data cache in I6400 CPUs is indexed by physical address bits if an entry for the address is present in the DTLB early enough in the pipelined execution of a memory access instruction. If an entry is not present then it's indexed by virtual address bits, but hardware will check in a later pipeline stage when a DTLB entry has been created whether the virtual address bits used match the physical address bits, and if not will transparently restart the memory access instruction. This means that although it isn't always physically indexed, it appears so to software & we can treat the I6400 L1 data cache as being physically indexed in order to avoid considering aliasing. Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/14016/ Signed-off-by: Ralf Baechle <[email protected]>
2017-01-03MIPS: Loongson1B: Change the OSC clock nameKelvin Cheung1-1/+1
This patch changes the OSC clock name to "osc_clk" as expected by all clock users. Signed-off-by: Kelvin Cheung <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/13903/ Signed-off-by: Ralf Baechle <[email protected]>
2017-01-03MIPS: Netlogic: Fix assembler warning from smpboot.SPaul Burton1-2/+2
The netlogic platform can be built for either MIPS32 or MIPS64, and when built for MIPS32 (as by nlm_xlr_defconfig) the use of the dla pseudo-instruction leads to warnings such as the following from recent versions of the GNU assembler: arch/mips/netlogic/common/smpboot.S: Assembler messages: arch/mips/netlogic/common/smpboot.S:62: Warning: dla used to load 32-bit register; recommend using la instead arch/mips/netlogic/common/smpboot.S:63: Warning: dla used to load 32-bit register; recommend using la instead Avoid these warnings by using the PTR_LA macro to make use of the appropriate la or dla pseudo-instruction for the build. Signed-off-by: Paul Burton <[email protected]> Fixes: 66d29985fab8 ("MIPS: Netlogic: Merge some of XLR/XLP wakup code") Cc: James Hogan <[email protected]> Cc: Jayachandran C <[email protected]> Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/14185/ Signed-off-by: Ralf Baechle <[email protected]>
2017-01-03MIPS: Export {copy, clear}_page functions alongside their definitionsPaul Burton4-25/+6
Now that EXPORT_SYMBOL can be used from assembly source, move the EXPORT_SYMBOL invocations for the copy_page & clear_page functions to be alongside their definitions. With this change there are no longer any symbols exported from mips_ksyms.c so remove the file. Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/14515/ Signed-off-by: Ralf Baechle <[email protected]>
2017-01-03MIPS: Export memcpy & memset functions alongside their definitionsPaul Burton4-24/+19
Now that EXPORT_SYMBOL can be used from assembly source, move the EXPORT_SYMBOL invocations for the memcpy & memset functions & variants thereof to be alongside their definitions. Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/14514/ Signed-off-by: Ralf Baechle <[email protected]>
2017-01-03MIPS: Export string functions alongside their definitionsPaul Burton4-24/+10
Now that EXPORT_SYMBOL can be used from assembly source, move the EXPORT_SYMBOL invocations for the strlen*, strnlen* & strncpy* functions to be alongside their definitions. Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/14513/ Signed-off-by: Ralf Baechle <[email protected]>
2017-01-03MIPS: Export csum functions alongside their definitionsPaul Burton2-8/+6
Now that EXPORT_SYMBOL can be used from assembly source, move the EXPORT_SYMBOL invocations for the csum_partial_* functions to be alongside their definitions. Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/14512/ Signed-off-by: Ralf Baechle <[email protected]>
2017-01-03MIPS: Export invalid_pte_table alongside its definitionPaul Burton2-2/+2
It's unclear to me why this wasn't always the case, but move the EXPORT_SYMBOL invocation for invalid_pte_table to be alongside its definition. Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/14511/ Signed-off-by: Ralf Baechle <[email protected]>
2017-01-03MIPS: Export _mcount alongside its definitionPaul Burton2-4/+3
Now that EXPORT_SYMBOL can be used from assembly source, move the EXPORT_SYMBOL invocation for _mcount to be alongside its definition. Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/14525/ Signed-off-by: Ralf Baechle <[email protected]>
2017-01-03MIPS: Export _save_fp & _save_msa alongside their definitionsPaul Burton3-8/+5
Now that EXPORT_SYMBOL can be used from assembly source, move the EXPORT_SYMBOL invocations for _save_fp & _save_msa to be alongside their definitions. Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/14509/ Signed-off-by: Ralf Baechle <[email protected]>
2017-01-03MIPS: End asm function prologue macros with .insnPaul Burton1-4/+6
When building a kernel targeting a microMIPS ISA, recent GNU linkers will fail the link if they cannot determine that the target of a branch or jump is microMIPS code, with errors such as the following: mips-img-linux-gnu-ld: arch/mips/built-in.o: .text+0x542c: Unsupported jump between ISA modes; consider recompiling with interlinking enabled. mips-img-linux-gnu-ld: final link failed: Bad value or: ./arch/mips/include/asm/uaccess.h:1017: warning: JALX to a non-word-aligned address Placing anything other than an instruction at the start of a function written in assembly appears to trigger such errors. In order to prepare for allowing us to follow function prologue macros with an EXPORT_SYMBOL invocation, end the prologue macros (LEAD, NESTED & FEXPORT) with a .insn directive. This ensures that the start of the function is marked as code, which always makes sense for functions & safely prevents us from hitting the link errors described above. Signed-off-by: Paul Burton <[email protected]> Reviewed-by: Maciej W. Rozycki <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/14508/ Signed-off-by: Ralf Baechle <[email protected]>
2017-01-03MIPS: tlbex: Clear ISA bit when writing to handle_tlb{l,m,s}Paul Burton1-3/+3
When generating TLB exception handling code we write to memory reserved at the handle_tlbl, handle_tlbm & handle_tlbs symbols. Up until now the ISA bit has always been clear simply because the assembly code reserving the space for those functions places no instructions in them. In preparation for marking all LEAF functions as containing code, explicitly clear the ISA bit when calculating the addresses at which to write TLB exception handling code. Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/14507/ Signed-off-by: Ralf Baechle <[email protected]>
2017-01-03MIPS: Use generic asm/export.hPaul Burton1-0/+1
Include export.h in the list of generic headers used by the MIPS architecture for use by later patches. Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/14506/ Signed-off-by: Ralf Baechle <[email protected]>
2017-01-03OF: Prevent unaligned access in of_alias_scan()Paul Burton1-1/+1
When allocating a struct alias_prop, of_alias_scan() only requested that it be aligned on a 4 byte boundary. The struct contains pointers which leads to us attempting 64 bit writes on 64 bit systems, and if the CPU doesn't support unaligned memory accesses then this causes problems - for example on some MIPS64r2 CPUs including the "mips64r2-generic" QEMU emulated CPU it will trigger an address error exception. Fix this by requesting alignment for the struct alias_prop allocation matching that which the compiler expects, using the __alignof__ keyword. Signed-off-by: Paul Burton <[email protected]> Acked-by: Rob Herring <[email protected]> Reviewed-by: Grant Likely <[email protected]> Cc: Frank Rowand <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/14306/ Signed-off-by: Ralf Baechle <[email protected]>
2017-01-03MIPS: IRQ: Remove useless i8259_of_init() prototype.Ralf Baechle1-1/+0
Signed-off-by: Ralf Baechle <[email protected]>
2017-01-03MIPS: uprobes: Remove __weak attribute from arch_uprobe_copy_ixol.Marcin Nowakowski1-1/+1
Arch-specific implementation of arch_uprobe_copy_ixol is expected to override the weak implementation in generic code. As currently both implementations are marked as weak, it is up to the linker to chose one. Remove the __weak attribute from MIPS code to make sure the correct version is used. Fixes: 40e084a506eb ("MIPS: Add uprobes support.") Signed-off-by: Marcin Nowakowski <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/14660/ Signed-off-by: Ralf Baechle <[email protected]>
2017-01-03MIPS: ralink: Cosmetic change to prom_init().John Crispin1-5/+4
Over the years the code has been changed various times leading to argc/argv being defined in a different function to where we actually use the variables. Clean this up by moving them to prom_init_cmdline(). Signed-off-by: John Crispin <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/14902/ Signed-off-by: Ralf Baechle <[email protected]>
2017-01-03MIPS: ralink: Add missing symbol for highmem support.John Crispin1-0/+1
MT7621 has highmem. this was previously not working as the required symbol was not selected in the Kconfig file. Signed-off-by: John Crispin <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/14901/ Signed-off-by: Ralf Baechle <[email protected]>
2017-01-03MIPS: ralink: Add missing clk_round_rate().John Crispin1-0/+6
As we dont use the common clock api yet we need to add this stub to allow building drivers that use the API. Signed-off-by: John Crispin <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/14900/ Signed-off-by: Ralf Baechle <[email protected]>
2017-01-03MIPS: ralink: Fix a typo in the pinmux setup.John Crispin1-9/+9
There is a typo inside the pinmux setup code. The function is really called utif and not util. This was recently discovered when people were trying to make the UTIF interface work. Signed-off-by: John Crispin <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/14899/ Signed-off-by: Ralf Baechle <[email protected]>
2017-01-03MIPS: ralink: Add missing pinmux.John Crispin2-3/+12
The mt7620 has a pin that can be used to generate an external reference clock. The pinmux setup was missing the definition of said pin. This patch adds it. Signed-off-by: John Crispin <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/14898/ Signed-off-by: Ralf Baechle <[email protected]>
2017-01-03MIPS: ralink: Add missing I2C and I2S clocks.John Crispin4-0/+10
This patch adds two additional clocks required by the audio interface of the SoCs. Signed-off-by: John Crispin <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/14897/ Signed-off-by: Ralf Baechle <[email protected]>
2017-01-03MIPS: ralink: MT7621 does not set its SoC type.John Crispin1-1/+1
The code does not set the SoC type properly. This went unnoticed until now as the SoC does not share any of the driver code with the other SoCs, until we made the mmc driver work. Signed-off-by: John Crispin <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/14896/ Signed-off-by: Ralf Baechle <[email protected]>
2017-01-03MIPS: Add cacheinfo supportJustin Chen2-1/+86
Add cacheinfo support for MIPS architectures. Use information from the cpuinfo_mips struct to populate the cacheinfo struct. This allows an architecture agnostic approach, however this also means if cache information is not properly populated within the cpuinfo_mips struct, there is nothing we can do. (I.E. c-r3k.c) Signed-off-by: Justin Chen <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/14650/ Signed-off-by: Ralf Baechle <[email protected]>
2017-01-03MIPS: generic/kexec: add support for a DTB passed in a separate bufferMarcin Nowakowski2-0/+45
Signed-off-by: Marcin Nowakowski <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/14615/ Signed-off-by: Ralf Baechle <[email protected]>
2017-01-03MIPS: kexec: add debug info about the new kexec'ed imageMarcin Nowakowski1-0/+22
Print details of the new kexec image loaded. Based on the original code from commit 221f2c770e10d ("arm64/kexec: Add pr_debug output") Signed-off-by: Marcin Nowakowski <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/14614/ Signed-off-by: Ralf Baechle <[email protected]>
2017-01-03MIPS: kexec: Do not reserve invalid crashkernel memory on bootMarcin Nowakowski1-0/+5
Do not reserve memory for the crashkernel if the commandline argument points to a wrong location. This can happen if the location is specified wrong or if the same commandline is reused when starting the crashkernel - in the latter case the reserved memory would point to the location from which the crashkernel is executing. Signed-off-by: Marcin Nowakowski <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/14612/ Signed-off-by: Ralf Baechle <[email protected]>
2017-01-03MIPS: fix mem=X@Y commandline processingMarcin Nowakowski1-0/+4
When a memory offset is specified through the commandline, add the memory in range PHYS_OFFSET:Y as reserved memory area. Otherwise the bootmem allocator is initialised with low page equal to min_low_pfn = PHYS_OFFSET, and in free_all_bootmem will process pages starting from min_low_pfn instead of PFN(Y). Signed-off-by: Marcin Nowakowski <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/14613/ Signed-off-by: Ralf Baechle <[email protected]>
2017-01-03MIPS: relocate: Optionally relocate the DTBMarcin Nowakowski1-2/+36
If the DTB is located in the target memory area for the relocated kernel it needs to be relocated as well before kernel relocation takes place. After copying the DTB use the new plat_fdt_relocated() API from the relocated kernel to ensure the relocated kernel updates any information that it may have cached about the location of the DTB. plat_fdt_relocated is declared as a weak symbol so that platforms that do not require it do not need to implement the method. Signed-off-by: Marcin Nowakowski <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/14616/ Signed-off-by: Ralf Baechle <[email protected]>
2017-01-03MIPS: platform: Allow for DTB to be moved during kernel relocationMarcin Nowakowski2-0/+26
Add plat_fdt_relocated(void*) API to allow the kernel relocation code to update platform's information about the DTB location if the DTB had to be moved due to being placed in a location used by the relocated kernel. Signed-off-by: Marcin Nowakowski <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/14611/ Signed-off-by: Ralf Baechle <[email protected]>
2017-01-03MIPS: Use early_init_fdt_reserve_self to protect DTB locationMarcin Nowakowski2-0/+11
early_init_fdt_reserve_self is used to tell the boot memory allocator that a memory is occupied by the DTB, so add it in the MIPS init code to ensure information about the DTB is added to the boot memory array. Signed-off-by: Marcin Nowakowski <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/14610/ Signed-off-by: Ralf Baechle <[email protected]>
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