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Build a DT for the Malta platform into the kernel, load it & probe
devices from it. The DT is essentially empty at this point, devices
will be added in further patches.
[[email protected]: Fixed conflicts.]
Signed-off-by: Paul Burton <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: Rob Herring <[email protected]>
Cc: Pawel Moll <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: Ian Campbell <[email protected]>
Cc: Kumar Gala <[email protected]>
Cc: Andrew Bresticker <[email protected]>
Cc: [email protected]
Cc: Markos Chandras <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/10119/
Signed-off-by: Ralf Baechle <[email protected]>
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A later patch in this series will include mips-cm.h but does not require
errno.h. This leads to a build failure with ENODEV undeclared. Include
errno.h from mips-cm.h to pull in the appropriate definition and avoid
the build failure.
Signed-off-by: Paul Burton <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: Rob Herring <[email protected]>
Cc: Pawel Moll <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: Ian Campbell <[email protected]>
Cc: Kumar Gala <[email protected]>
Cc: James Hogan <[email protected]>
Cc: [email protected]
Patchwork: http://patchwork.linux-mips.org/patch/10113/
Signed-off-by: Ralf Baechle <[email protected]>
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Add definitions for the GICEX field in the GCR_GIC_STATUS register to
mips-cm.h for use in a later patch.
Signed-off-by: Paul Burton <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: Rob Herring <[email protected]>
Cc: Pawel Moll <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: Ian Campbell <[email protected]>
Cc: Kumar Gala <[email protected]>
Cc: James Hogan <[email protected]>
Cc: [email protected]
Patchwork: http://patchwork.linux-mips.org/patch/10112/
Signed-off-by: Ralf Baechle <[email protected]>
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This commit introduces BPF ASM helpers for MIPS and MIPS64 kernels.
The purpose of this patch is to twofold:
1) We are now able to handle negative offsets instead of either
falling back to the interpreter or to simply not do anything and
bail out.
2) Optimize reads from the packet header instead of calling the C
helpers
Because of this patch, we are now able to get rid of quite a bit of
code in the JIT generation process by using MIPS optimized assembly
code. The new assembly code makes the test_bpf testsuite happy with
all 60 test passing successfully compared to the previous
implementation where 2 tests were failing.
Doing some basic analysis in the results between the old
implementation and the new one we can obtain the following
summary running current mainline on an ER8 board (+/- 30us delta is
ignored to prevent noise from kernel scheduling or IRQ latencies):
Summary: 22 tests are faster, 7 are slower and 47 saw no improvement
with the most notable improvement being the tcpdump tests. The 7 tests
that seem to be a bit slower is because they all follow the slow path
(bpf_internal_load_pointer_neg_helper) which is meant to be slow so
that's not a problem.
Signed-off-by: Markos Chandras <[email protected]>
Cc: [email protected]
Cc: "David S. Miller" <[email protected]>
Cc: Alexei Starovoitov <[email protected]>
Cc: Daniel Borkmann <[email protected]>
Cc: Hannes Frederic Sowa <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Patchwork: http://patchwork.linux-mips.org/patch/10530/
Signed-off-by: Ralf Baechle <[email protected]>
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Use the BPF register names instead of the arch register names to
document how the ABI is structured.
Signed-off-by: Markos Chandras <[email protected]>
Cc: [email protected]
Cc: "David S. Miller" <[email protected]>
Cc: Alexei Starovoitov <[email protected]>
Cc: Daniel Borkmann <[email protected]>
Cc: Hannes Frederic Sowa <[email protected]>
Cc: [email protected]
Patchwork: http://patchwork.linux-mips.org/patch/10529/
Signed-off-by: Ralf Baechle <[email protected]>
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The registers will be used by a subsequent patch introducing
ASM helpers so move them to a common header.
Signed-off-by: Markos Chandras <[email protected]>
Cc: [email protected]
Cc: "David S. Miller" <[email protected]>
Cc: Alexei Starovoitov <[email protected]>
Cc: Daniel Borkmann <[email protected]>
Cc: Hannes Frederic Sowa <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: http://patchwork.linux-mips.org/patch/10528/
Signed-off-by: Ralf Baechle <[email protected]>
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The RSZIE was used to determine the register width but MIPS
already defines SZREG so use that instead.
Cc: [email protected]
Cc: "David S. Miller" <[email protected]>
Cc: Alexei Starovoitov <[email protected]>
Cc: Daniel Borkmann <[email protected]>
Cc: Hannes Frederic Sowa <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Patchwork: http://patchwork.linux-mips.org/patch/10526/
Signed-off-by: Markos Chandras <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Move the two scratch registers from s0 and s1 to t4 and t5 in order
to free up some callee-saved registers. We will use these callee-saved
registers to store some permanent data on them in a subsequent patch.
Signed-off-by: Markos Chandras <[email protected]>
Cc: [email protected]
Cc: "David S. Miller" <[email protected]>
Cc: Alexei Starovoitov <[email protected]>
Cc: Daniel Borkmann <[email protected]>
Cc: Hannes Frederic Sowa <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: http://patchwork.linux-mips.org/patch/10525/
Signed-off-by: Ralf Baechle <[email protected]>
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This is the first patch of two to clean up/update the Xtalk detection
code used by IP27 with some of the code used in the IP30 port.
This specific patch adds Xtalk widget manufacturer and widget device
numbers to arch/mips/include/asm/xtalk/widget.h
Signed-off-by: Joshua Kinard <[email protected]>
Cc: Linux MIPS List <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/10174/
Signed-off-by: Ralf Baechle <[email protected]>
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Commits ac1d8590d3ae (MIPS: asm: uaccess: Use EVA instructions
wrappers), 05c6516005c4 (MIPS: asm: uaccess: Add EVA support to
copy_{in, to,from}_user) & e3a9b07a9caf (MIPS: asm: uaccess: Add EVA
support for str*_user operations) added checks to various user memory
access functions & macros in order to determine whether to perform
standard memory accesses or their EVA userspace equivalents. In kernels
built without support for EVA these checks are entirely redundant. Avoid
emitting them & allow the compiler to optimise out the EVA userspace
code in such kernels by checking config_enabled(CONFIG_EVA).
This reduces the size of a malta_defconfig kernel built using GCC 4.9.2
by approximately 33KB (from 5995072 to 5962304 bytes).
Signed-off-by: Paul Burton <[email protected]>
Cc: Markos Chandras <[email protected]>
Cc: Ralf Baechle <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: http://patchwork.linux-mips.org/patch/10165/
Signed-off-by: Ralf Baechle <[email protected]>
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The Octeon OHCI is now supported by the ohci-platform driver, and
USB_OCTEON_OHCI is marked as deprecated. However, it is currently
still necessary to enable it in order to select
USB_OHCI_BIG_ENDIAN_MMIO. Make CPU_CAVIUM_OCTEON select that as well,
so that USB_OCTEON_OHCI is really obsolete.
The old ohci-octeon and ehci-octeon drivers also only enabled big-endian
MMIO in case the CPU was big-endian. Make the selections of
USB_EHCI_BIG_ENDIAN_MMIO and USB_OHCI_BIG_ENDIAN_MMIO conditional, to
match this.
Fixes: 2193dda5eec6 ("USB: host: Remove ehci-octeon and ohci-octeon drivers")
Signed-off-by: Ben Hutchings <[email protected]>
Cc: Alan Stern <[email protected]>
Cc: [email protected]
Cc: David Daney <[email protected]>
Cc: Chandrakala Chavva <[email protected]>
Cc: Paul Martin <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/10178/
Signed-off-by: Ralf Baechle <[email protected]>
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Detect and use passed dtb address using the UHI interface. This allows for
booting with a vmlinux.bin appended dtb instead of using a built-in one.
Signed-off-by: Jonas Gorski <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: John Crispin <[email protected]>
Cc: Kevin Cernekee <[email protected]>
Cc: Florian Fainelli <[email protected]>
Cc: Aaro Koskinen <[email protected]>
Cc: Markos Chandras <[email protected]>
Cc: Andrew Bresticker <[email protected]>
Cc: Daniel Schwierzeck <[email protected]>
Cc: Paul Burton <[email protected]>
Cc: James Hartley <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/9742/
Signed-off-by: Ralf Baechle <[email protected]>
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Build all available dtbs to allow them to be appended to the resulting
kernel in case there is no builtin dtb.
Signed-off-by: Jonas Gorski <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: John Crispin <[email protected]>
Cc: Kevin Cernekee <[email protected]>
Cc: Florian Fainelli <[email protected]>
Cc: Aaro Koskinen <[email protected]>
Cc: Markos Chandras <[email protected]>
Cc: Andrew Bresticker <[email protected]>
Cc: Daniel Schwierzeck <[email protected]>
Cc: Paul Burton <[email protected]>
Cc: James Hartley <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/9740/
Signed-off-by: Ralf Baechle <[email protected]>
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Add support for detecting a vmlinuz.bin appended dtb and overriding
the boot arguments to match the UHI interface.
To ensure _edata / __apendend_dtb points to the actual end of the
binary, align the data section to 16 bytes instead of the address
cursor.
Due to ld.script not going through the preprocessor, we can't check
for MIPS_ZBOOT_APPENDED_DTB being enabled, so always reserve space
for it. It should have no consequences for booting without it enabled
except 1 MiB more ram usage during the uncompressing stage.
Signed-off-by: Jonas Gorski <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: John Crispin <[email protected]>
Cc: Kevin Cernekee <[email protected]>
Cc: Florian Fainelli <[email protected]>
Cc: Aaro Koskinen <[email protected]>
Cc: Markos Chandras <[email protected]>
Cc: Andrew Bresticker <[email protected]>
Cc: Daniel Schwierzeck <[email protected]>
Cc: Paul Burton <[email protected]>
Cc: James Hartley <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/9741/
Signed-off-by: Ralf Baechle <[email protected]>
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Add support for detecting a vmlinux.bin appended dtb and overriding
the boot arguments to match the UHI interface.
Due to the PERCPU section being empty for !SMP, but still modifying
the current address by aligning it to the page size, do not define
it for !SMP builds to allow __appended_dtb to still point to
the actual end of the data.
Signed-off-by: Jonas Gorski <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: John Crispin <[email protected]>
Cc: Kevin Cernekee <[email protected]>
Cc: Florian Fainelli <[email protected]>
Cc: Aaro Koskinen <[email protected]>
Cc: Markos Chandras <[email protected]>
Cc: Andrew Bresticker <[email protected]>
Cc: Daniel Schwierzeck <[email protected]>
Cc: Paul Burton <[email protected]>
Cc: James Hartley <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/9739/
Signed-off-by: Ralf Baechle <[email protected]>
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In preparation to allow users to enable DeviceTree without arch or
machine selecting it, we need to fix build errors on MIPS. When
CONFIG_OF is enabled, device_tree_init cannot be resolved. This is
trivially fixed by using CONFIG_USE_OF instead of CONFIG_OF for prom.h.
Signed-off-by: Rob Herring <[email protected]>
Cc: Ralf Baechle <[email protected]>
Cc: [email protected]
Signed-off-by: Ralf Baechle <[email protected]>
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The R12000 added a new feature to enhance branch prediction called
"global history". Per the Vr10000 Series User Manual (U10278EJ4V0UM),
Coprocessor 0, Diagnostic Register (22):
"""
If bit 26 is set, branch prediction uses all eight bits of the global
history register. If bit 26 is not set, then bits 25:23 specify a count
of the number of bits of global history to be used. Thus if bits 26:23
are all zero, global history is disabled.
The global history contains a record of the taken/not-taken status of
recently executed branches, and when used is XOR'ed with the PC of a
branch being predicted to produce a hashed value for indexing the BPT.
Some programs with small "working set of conditional branches" benefit
significantly from the use of such hashing, some see slight performance
degradation.
"""
This patch enables global history on R12000 CPUs and up by setting bit
26 in the branch prediction diagnostic register (CP0 $22) to '1'. Bits
25:23 are left alone so that all eight bits of the global history
register are available for branch prediction.
Signed-off-by: Joshua Kinard <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Inspired by Maciej's recent patch to update DEC cpu-feature-overrides.h,
I updated IP27's as well to disable features known to not apply to the
IP27 platform or the R10K-series of CPUs.
Before:
text data bss dec hex filename
8616648 463200 472240 9552088 91c0d8 vmlinux
After:
text data bss dec hex filename
8592256 471392 472240 9535888 918190 vmlinux
I believe the increase in the size of the data section is for the same
reasons as in the DEC patch.
Signed-off-by: Joshua Kinard <[email protected]>
Cc: [email protected]
Signed-off-by: Ralf Baechle <[email protected]>
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The file looks as if it is non-modular, but it piggy-backs
off CONFIG_SERIAL_8250 which is tristate. If set to "=m"
we will get this after the init/module header cleanup:
arch/mips/loongson/common/serial.c:76:1: error: data definition has no type or storage class [-Werror]
arch/mips/loongson/common/serial.c:76:1: error: type defaults to 'int' in declaration of 'device_initcall' [-Werror=implicit-int]
arch/mips/loongson/common/serial.c:76:1: error: parameter names (without types) in function declaration [-Werror]
arch/mips/loongson/common/serial.c:58:19: error: 'serial_init' defined but not used [-Werror=unused-function]
cc1: all warnings being treated as errors
make[3]: *** [arch/mips/loongson/common/serial.o] Error 1
Make it clearly modular, and add a module_exit function,
so that we avoid the above breakage.
Reported-by: kbuild test robot <[email protected]>
Cc: Ralf Baechle <[email protected]>
Cc: [email protected]
Signed-off-by: Paul Gortmaker <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Commit 854700115ecf ([MIPS] kgdb: add arch support for the kernel's kgdb core)
added the 'kgdb_early_setup' flag to avoid calling trap_init() and init_IRQ()
the second time, however the code that called these functions earlier, from
kgdb_arch_init(), had been already removed by that time, so the flag never
served any useful purpose. Remove the related code along with ugly #ifdef'ery
at last.
[[email protected]: Folded in Guenter Roeck's fix.]
Signed-off-by: Sergei Shtylyov <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/10501/
Signed-off-by: Guenter Roeck <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/10533/
Signed-off-by: Ralf Baechle <[email protected]>
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Add a DTS for TL-WR1043ND version 1 and allow to have it built in the
kernel to circumvent the broken u-boot found on these boards.
Currently only the UART, LEDs and buttons are supported.
Signed-off-by: Alban Bedel <[email protected]>
Cc: [email protected]
Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Alban Bedel <[email protected]>
Cc: [email protected]
Signed-off-by: Ralf Baechle <[email protected]>
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Replace the simple GPIO chip registration by a platform driver
and make ath79_gpio_init() just register the device.
Signed-off-by: Alban Bedel <[email protected]>
Cc: [email protected]
Signed-off-by: Ralf Baechle <[email protected]>
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These bindings support the GPIO controllers found on the Qualcomm
Atheros AR7xxx/AR9XXX SoC.
Signed-off-by: Alban Bedel <[email protected]>
Cc: [email protected]
Signed-off-by: Ralf Baechle <[email protected]>
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Allow using the SoC clocks in the device tree.
Signed-off-by: Alban Bedel <[email protected]>
Cc: [email protected]
Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Alban Bedel <[email protected]>
Cc: [email protected]
Signed-off-by: Ralf Baechle <[email protected]>
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Add OF support for the CPU and MISC interrupt controllers of most
supported ATH79 devices.
Signed-off-by: Alban Bedel <[email protected]>
Cc: [email protected]
Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Alban Bedel <[email protected]>
Cc: [email protected]
Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Alban Bedel <[email protected]>
Cc: [email protected]
Signed-off-by: Ralf Baechle <[email protected]>
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The DDR controller of the ARxxx and AR9xxx families provides an
interface to flush the FIFO between various devices and the DDR.
This is mainly used by the IRQ controller to flush the FIFO before
running the interrupt handler of such devices.
Signed-off-by: Alban Bedel <[email protected]>
Cc: [email protected]
Signed-off-by: Ralf Baechle <[email protected]>
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Add the bare minimum to load a device tree.
Signed-off-by: Alban Bedel <[email protected]>
Cc: [email protected]
Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Alban Bedel <[email protected]>
Cc: [email protected]
Signed-off-by: Ralf Baechle <[email protected]>
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Host platforms such as routers supported by OpenWrt can
support NVRAM reading directly from internal NVRAM store.
The brcmfmac for one requires the complete nvram contents
to select what needs to be sent to wireless device.
Signed-off-by: Arend van Spriel <[email protected]>
Signed-off-by: Hante Meuleman <[email protected]>
Reviewed-by: Arend Van Spriel <[email protected]>
Reviewed-by: Franky (Zhenhui) Lin <[email protected]>
Reviewed-by: Pieter-Paul Giesberts <[email protected]>
Reviewed-by: Daniel (Deognyoun) Kim <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/10093/
Signed-off-by: Ralf Baechle <[email protected]>
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Currently, code of Loongson-2/3 is under loongson directory and code of
Loongson-1 is under loongson1 directory. Besides, there are Kconfig
options such as MACH_LOONGSON and MACH_LOONGSON1. This naming style is
very ugly and confusing. Since Loongson-2/3 are both 64-bit general-
purpose CPU while Loongson-1 is 32-bit SoC, we rename both file names
and Kconfig symbols from loongson/loongson1 to loongson64/loongson32.
[[email protected]: Resolve a number of simple conflicts.]
Signed-off-by: Huacai Chen <[email protected]>
Cc: Steven J. Hill <[email protected]>
Cc: [email protected]
Cc: Fuxin Zhang <[email protected]>
Cc: Zhangjin Wu <[email protected]>
Cc: Kelvin Cheung <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/9790/
Signed-off-by: Ralf Baechle <[email protected]>
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Enable the 32-bit DMA zone for 64-bit Malta kernels so that devices with
32-bit coherent DMA masks aren't constrained to the low 16MB DMA zone,
which can easily be exhausted when there is lots of static kernel data
due to lock and RCU debugging.
Signed-off-by: James Hogan <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/9890/
Signed-off-by: Ralf Baechle <[email protected]>
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Commit c5b367835cfc ("MIPS: Add support for XPA.") added generation of a
shift by _PAGE_PRESENT_SHIFT in build_pte_present() and
build_pte_writable(), however except for the XPA case this is always
zero making it unnecessary.
Make the shift conditional upon _PAGE_PRESENT_SHIFT being non-zero to
save an instruction in those cases.
Fixes: c5b367835cfc ("MIPS: Add support for XPA.")
Signed-off-by: James Hogan <[email protected]>
Cc: Steven J. Hill <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/9889/
Signed-off-by: Ralf Baechle <[email protected]>
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Commit c5b367835cfc ("MIPS: Add support for XPA.") changed
build_pte_present() and build_pte_writable() to assume a constant offset
of _PAGE_READ and _PAGE_WRITE relative to _PAGE_PRESENT, however this is
no longer true for some MIPS32R2 builds since commit be0c37c985ed
("MIPS: Rearrange PTE bits into fixed positions.") which moved the
_PAGE_READ PTE bit away from the _PAGE_PRESENT bit, with the _PAGE_WRITE
bit falling into its place.
Make use of the _PAGE_READ and _PAGE_WRITE definitions to calculate the
correct mask to apply instead of hard coding 3 (for _PAGE_PRESENT |
_PAGE_READ) or 5 (for _PAGE_PRESENT | _PAGE_WRITE).
Fixes: c5b367835cfc ("MIPS: Add support for XPA.")
Signed-off-by: James Hogan <[email protected]>
Cc: Steven J. Hill <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/9888/
Signed-off-by: Ralf Baechle <[email protected]>
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KVM guest kernels for trap & emulate run in user mode, with a modified
set of kernel memory segments. However the fixmap address is still in
the normal KSeg3 region at 0xfffe0000 regardless, causing problems when
cache alias handling makes use of them when handling copy on write.
Therefore define FIXADDR_TOP as 0x7ffe0000 in the guest kernel mapped
region when CONFIG_KVM_GUEST is defined.
Signed-off-by: James Hogan <[email protected]>
Cc: [email protected]
Cc: <[email protected]> # v3.10+
Patchwork: https://patchwork.linux-mips.org/patch/9887/
Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Dan Haab <[email protected]>
Acked-by: Rafał Miłecki <[email protected]>
Cc: [email protected]
Cc: Hauke Mehrtens <[email protected]>
Cc: Dan Haab <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/9831/
Signed-off-by: Ralf Baechle <[email protected]>
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Make the code simpler and open the way for device tree clocks.
[[email protected]: Resolved conflict with 2a552da6 (MIPS/IRQCHIP: Move
irq_chip from arch/mips to drivers/irqchip.)]
Signed-off-by: Alban Bedel <[email protected]>
Cc: [email protected]
Cc: Andrew Bresticker <[email protected]>
Cc: Qais Yousef <[email protected]>
Cc: Wolfram Sang <[email protected]>
Cc: Sergey Ryazanov <[email protected]>
Cc: Gabor Juhos <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/9774/
Signed-off-by: Ralf Baechle <[email protected]>
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The DDR controller need to be used by the IRQ controller to flush
the write buffer of some devices before running the IRQ handler.
It is also used by the PCI controller to setup the PCI memory windows.
The current interface used to access the DDR controller doesn't
provides any useful abstraction and simply rely on a shared global
pointer.
Replace this by a simple API to setup the PCI memory windows and use
the write buffer flush independently of the SoC type. That remove the
need for the shared global pointer, simplify the IRQ handler code.
[[email protected]: Folded in Alban Bedel's follup fix.]
Signed-off-by: Alban Bedel <[email protected]>
Cc: [email protected]
Cc: Andrew Bresticker <[email protected]>
Cc: Qais Yousef <[email protected]>
Cc: Wolfram Sang <[email protected]>
Cc: Sergey Ryazanov <[email protected]>
Cc: Gabor Juhos <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/9773/
Patchwork: http://patchwork.linux-mips.org/patch/10543/
Signed-off-by: Ralf Baechle <[email protected]>
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This register is named PLL_FB and is not a divider but a multiplier.
To make things less confusing rename the ARxxxx_PLL_DIV_SHIFT and
ARxxxx_PLL_DIV_MASK macros to ARxxxx_PLL_FB_SHIFT and
ARxxxx_PLL_FB_MASK.
Signed-off-by: Alban Bedel <[email protected]>
Cc: [email protected]
Cc: Andrew Bresticker <[email protected]>
Cc: Qais Yousef <[email protected]>
Cc: Wolfram Sang <[email protected]>
Cc: Sergey Ryazanov <[email protected]>
Cc: Gabor Juhos <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/9772/
Signed-off-by: Ralf Baechle <[email protected]>
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ZBOOT is working fine, so allow using it.
Signed-off-by: Alban Bedel <[email protected]>
Cc: [email protected]
Cc: Andrew Bresticker <[email protected]>
Cc: Qais Yousef <[email protected]>
Cc: Wolfram Sang <[email protected]>
Cc: Sergey Ryazanov <[email protected]>
Cc: Gabor Juhos <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/9770/
Signed-off-by: Ralf Baechle <[email protected]>
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Use irq_desc_get_xxx() to avoid redundant lookup of irq_desc while we
already have a pointer to corresponding irq_desc.
Signed-off-by: Jiang Liu <[email protected]>
Acked-by: Sergey Ryazanov <[email protected]>
Cc: Thomas Gleixner <[email protected]>
Cc: Bjorn Helgaas <[email protected]>
Cc: Benjamin Herrenschmidt <[email protected]>
Cc: Ingo Molnar <[email protected]>
Cc: H. Peter Anvin <[email protected]>
Cc: Rafael J. Wysocki <[email protected]>
Cc: Randy Dunlap <[email protected]>
Cc: Yinghai Lu <[email protected]>
Cc: Borislav Petkov <[email protected]>
Cc: Aleksey Makarov <[email protected]>
Cc: David Daney <[email protected]>
Cc: Christoph Lameter <[email protected]>
Cc: John Crispin <[email protected]>
Cc: Andrew Bresticker <[email protected]>
Cc: Konrad Rzeszutek Wilk <[email protected]>
Cc: Tony Luck <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/10086/
Signed-off-by: Ralf Baechle <[email protected]>
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Parent names in clock init data is now array of const pointers to const
strings so the cast is not needed.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Cc: Max Filippov <[email protected]>
Cc: Mike Turquette <[email protected]>
Cc: Stephen Boyd <[email protected]>
Cc: Heiko Stuebner <[email protected]>
Cc: Sylwester Nawrocki <[email protected]>
Cc: Tomasz Figa <[email protected]>
Cc: Kukjin Kim <[email protected]>
Cc: Barry Song <[email protected]>
Cc: Peter De Schrijver <[email protected]>
Cc: Prashant Gaikwad <[email protected]>
Cc: Stephen Warren <[email protected]>
Cc: Thierry Reding <[email protected]>
Cc: Alexandre Courbot <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: Chanwoo Choi <[email protected]>
Cc: Inki Dae <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/9903
Signed-off-by: Ralf Baechle <[email protected]>
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We removed __cpuinit support (leaving no-op stubs) quite some time ago.
However a new instance was added in commit c5b367835cfc7a8ef53b9670a409ff
("MIPS: Add support for XPA.")
Since we want to clobber the stubs soon, get this removed now.
Signed-off-by: Paul Gortmaker <[email protected]>
Cc: Steven J. Hill <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/9894/
Signed-off-by: Ralf Baechle <[email protected]>
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We removed __cpuinit support (leaving no-op stubs) quite some time ago.
However a new instance was added in commit 4caa906ee949b7002cc1558bbe3744
("MIPS: mm: c-r4k: Build EVA {d,i}cache flushing functions")
Since we want to clobber the stubs soon, get this removed now.
Signed-off-by: Paul Gortmaker <[email protected]>
Cc: Leonid Yegoshin <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/9893/
Signed-off-by: Ralf Baechle <[email protected]>
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We removed __cpuinit support (leaving no-op stubs) quite some time ago.
However a few more crept in as of commit 6ee1d93455384cef8a0426effe85da2
("MIPS: BCM47XX: Detect more then 128 MiB of RAM (HIGHMEM)")
Since we want to clobber the stubs soon, get this removed now.
Signed-off-by: Paul Gortmaker <[email protected]>
Cc: Rafał Miłecki <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/9892/
Signed-off-by: Ralf Baechle <[email protected]>
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We removed __cpuinit support (leaving no-op stubs) quite some time ago.
However this one crept back in as of commit 43cc739fd98b8c517ad45756d869f
("MIPS: ath25: add common parts")
Since we want to clobber the stubs soon, get this removed now.
Signed-off-by: Paul Gortmaker <[email protected]>
Acked-by: Sergey Ryazanov <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/9891/
Signed-off-by: Ralf Baechle <[email protected]>
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Update pistachio_defconfig to enable Pistachio's USB PHY driver.
Signed-off-by: Andrew Bresticker <[email protected]>
Cc: Kishon Vijay Abraham I <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: James Hartley <[email protected]>
Cc: Damien Horsley <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/9729/
Signed-off-by: Ralf Baechle <[email protected]>
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