aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)AuthorFilesLines
2019-04-17drm/panel: simple: add lg,acx467akm-7 panelJonathan Marek1-0/+31
Add ACX467AKM-7 4.95" 1080×1920 LCD panel that is found on the LG Nexus 5 (hammerhead) phone. Signed-off-by: Jonathan Marek <[email protected]> [[email protected]: checkpatch fixes; rename jdi,1080p-hammerhead binding to lg,acx467akm-7.] Signed-off-by: Brian Masney <[email protected]> Reviewed-by: Linus Walleij <[email protected]> Signed-off-by: Linus Walleij <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-17dt-bindings: drm/panel: simple: add lg,acx467akm-7 panelBrian Masney1-0/+7
Add binding for the LG ACX467AKM-7 4.95" 1080×1920 LCD panel that is found on the LG Nexus 5 (hammerhead) phone. This appears to be a JDI panel based on some Internet searches, however a specific model number could not be found. I disassembled an old Nexus 5 with a broken screen and the LG part number is the only model number present on the back of the panel, so I think that is probably the best ID to use. Signed-off-by: Brian Masney <[email protected]> Reviewed-by: Linus Walleij <[email protected]> Signed-off-by: Linus Walleij <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-17drm/mcde: Add device tree bindingsLinus Walleij1-0/+104
This adds the device tree bindings for the ST-Ericsson Multi Channel Display Engine MCDE as found in the U8500 SoCs. Cc: [email protected] Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Linus Walleij <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-17drm/meson: add size and alignment requirements for dumb buffersNeil Armstrong1-1/+13
The Amlogic SoCs Canvas buffers stride must be aligned on 64bytes and overall size should be aligned on PAGE width. Adds a custom dumb_create op to adds these requirements. Fixes: bbbe775ec5b5 ("drm: Add support for Amlogic Meson Graphic Controller") Suggested-by: Sky Zhou <[email protected]> Signed-off-by: Neil Armstrong <[email protected]> Reviewed-by: Sky Zhou <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-17drm/meson: Make some functions staticYueHaibing1-8/+8
Fix sparse warnings: drivers/gpu/drm/meson/meson_viu.c:93:6: warning: symbol 'meson_viu_set_g12a_osd1_matrix' was not declared. Should it be static? drivers/gpu/drm/meson/meson_viu.c:121:6: warning: symbol 'meson_viu_set_osd_matrix' was not declared. Should it be static? drivers/gpu/drm/meson/meson_viu.c:190:6: warning: symbol 'meson_viu_set_osd_lut' was not declared. Should it be static? Signed-off-by: YueHaibing <[email protected]> Acked-by: Neil Armstrong <[email protected]> Signed-off-by: Neil Armstrong <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-17drm/sun4i: Make some symbols staticYueHaibing2-4/+4
Fix sparse warnings: drivers/gpu/drm/sun4i/sun8i_tcon_top.c:271:36: warning: symbol 'sun8i_r40_tcon_top_quirks' was not declared. Should it be static? drivers/gpu/drm/sun4i/sun8i_tcon_top.c:276:36: warning: symbol 'sun50i_h6_tcon_top_quirks' was not declared. Should it be static? drivers/gpu/drm/sun4i/sun4i_tcon.c:239:6: warning: symbol 'sun4i_tcon_set_mux' was not declared. Should it be static? Reported-by: Hulk Robot <[email protected]> Signed-off-by: YueHaibing <[email protected]> Signed-off-by: Maxime Ripard <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-17drm/lima: Make lima_sched_ops staticYueHaibing1-1/+1
Fix sparse warning: drivers/gpu/drm/lima/lima_sched.c:356:36: warning: symbol 'lima_sched_ops' was not declared. Should it be static? Fixes: a1d2a6339961 ("drm/lima: driver for ARM Mali4xx GPUs") Reported-by: Hulk Robot <[email protected]> Signed-off-by: YueHaibing <[email protected]> Signed-off-by: Qiang Yu <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-17drm: add drm_format_helper.c to kerneldocGerd Hoffmann2-1/+6
Also drop the dstclip parameter sphinx has warned about (leftover from an earlier patch version). Signed-off-by: Gerd Hoffmann <[email protected]> Acked-by: Daniel Vetter <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-16drm/lima: Use the drm_gem_fence_array_add helpers for our deps.Eric Anholt3-93/+16
It's a pretty direct port of what I did for v3d. Signed-off-by: Eric Anholt <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-and-tested-by: Qiang Yu <[email protected]>
2019-04-16drm: Add helpers for setting up an array of dma_fence dependencies.Eric Anholt2-0/+98
I needed to add implicit dependency support for v3d, and Rob Herring has been working on it for panfrost, and I had recently looked at the lima implementation so I think this will be a good intersection of what we all want and simplify our scheduler implementations. v2: Rebase on xa_limit_32b API change, and tiny checkpatch cleanups on the way in (unsigned int vs unsigned, extra return before EXPORT_SYMBOL_GPL) Signed-off-by: Eric Anholt <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-and-tested-by: Qiang Yu <[email protected]> (v1)
2019-04-16drm: Expose "FB_DAMAGE_CLIPS" property to atomic aware user-space onlyDeepak Rawat1-2/+3
Plane property "FB_DAMAGE_CLIPS" can only be used by atomic aware user-space, so no point exposing it otherwise. Cc: <[email protected]> Signed-off-by: Deepak Rawat <[email protected]> Reviewed-by: Daniel Vetter <[email protected]> Fixes: d3b21767821e ("drm: Add a new plane property to send damage during plane update") Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-16drm: aspeed: Clean up Kconfig optionsJoel Stanley1-3/+3
The GFX IP is inside of the ASPEED BMC SoC so there is little use enabling it on a kernel that does not support ASPEED. When building with COMPILE_TEST the architecture many not have CMA support, so to avoid breaking the build we only select these options if the architecture supports the contiguous allocator. I suspect the DRM_PANEL came from a cut/paste error. Fixes: 4f2a8f5898ec ("drm: Add ASPEED GFX driver") Reported-by: Stephen Rothwell <[email protected]> Reported-by: kernel test robot <[email protected]> Signed-off-by: Joel Stanley <[email protected]> Signed-off-by: Daniel Vetter <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-16dma-buf: explicitely note that dma-fence-chains use 64bit seqnoChristian König4-9/+20
Instead of checking the upper values of the sequence number use an explicit field in the dma_fence_ops structure to note if a sequence should be 32bit or 64bit. Signed-off-by: Christian König <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Link: https://patchwork.freedesktop.org/patch/299655/
2019-04-12drm/panfrost: Add support for 2MB page entriesRob Herring1-8/+24
Add support for 2MB sized pages. This will improve our map and unmap times and save a bit of memory by avoiding 3rd level page tables for contiguous allocations. As we use shmem for buffers and huge page allocations for shmem are off by default, there isn't an improvement out of the box and userspace must enable THP for shmem. It's not clear if the h/w can support 1GB page sizes which standard ARM long format descriptors support. In any case, it is unlikely we'll see any contiguous 1GB allocations on current h/w. Cc: Tomeu Vizoso <[email protected]> Cc: David Airlie <[email protected]> Cc: Daniel Vetter <[email protected]> Signed-off-by: Rob Herring <[email protected]> Acked-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Steven Price <[email protected]> Acked-by: Tomeu Vizoso <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-12drm/panfrost: Add initial panfrost driverRob Herring23-0/+3564
This adds the initial driver for panfrost which supports Arm Mali Midgard and Bifrost family of GPUs. Currently, only the T860 and T760 Midgard GPUs have been tested. v2: - Add GPU reset on job hangs (Tomeu) - Add RuntimePM and devfreq support (Tomeu) - Fix T760 support (Tomeu) - Add a TODO file (Rob, Tomeu) - Support multiple in fences (Tomeu) - Drop support for shared fences (Tomeu) - Fill in MMU de-init (Rob) - Move register definitions back to single header (Rob) - Clean-up hardcoded job submit todos (Rob) - Implement feature setup based on features/issues (Rob) - Add remaining Midgard DT compatible strings (Rob) v3: - Add support for reset lines (Neil) - Add a MAINTAINERS entry (Rob) - Call dma_set_mask_and_coherent (Rob) - Do MMU invalidate on map and unmap. Restructure to do a single operation per map/unmap call. (Rob) - Add a missing explicit padding to struct drm_panfrost_create_bo (Rob) - Fix 0-day error: "panfrost_devfreq.c:151:9-16: ERROR: PTR_ERR applied after initialization to constant on line 150" - Drop HW_FEATURE_AARCH64_MMU conditional (Rob) - s/DRM_PANFROST_PARAM_GPU_ID/DRM_PANFROST_PARAM_GPU_PROD_ID/ (Rob) - Check drm_gem_shmem_prime_import_sg_table() error code (Rob) - Re-order power on sequence (Rob) - Move panfrost_acquire_object_fences() before scheduling job (Rob) - Add NULL checks on array pointers in job clean-up (Rob) - Rework devfreq (Tomeu) - Fix devfreq init with no regulator (Rob) - Various WS and comments clean-up (Rob) Cc: Maarten Lankhorst <[email protected]> Cc: Maxime Ripard <[email protected]> Cc: Sean Paul <[email protected]> Cc: David Airlie <[email protected]> Cc: Daniel Vetter <[email protected]> Cc: Lyude Paul <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Steven Price <[email protected]> Signed-off-by: Marty E. Plummer <[email protected]> Signed-off-by: Tomeu Vizoso <[email protected]> Signed-off-by: Neil Armstrong <[email protected]> Signed-off-by: Rob Herring <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-12drm: Add a drm_gem_objects_lookup helperRob Herring2-10/+85
Similar to the single handle drm_gem_object_lookup(), drm_gem_objects_lookup() takes an array of handles and returns an array of GEM objects. v2: - Take the userspace pointer directly and allocate the array. - Expand the function documentation. Cc: Maarten Lankhorst <[email protected]> Cc: Maxime Ripard <[email protected]> Cc: Sean Paul <[email protected]> Cc: David Airlie <[email protected]> Cc: Daniel Vetter <[email protected]> Acked-by: Alyssa Rosenzweig <[email protected]> Acked-by: Tomeu Vizoso <[email protected]> Signed-off-by: Rob Herring <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-12iommu: io-pgtable: Add ARM Mali midgard MMU page table formatRob Herring3-22/+77
ARM Mali midgard GPU is similar to standard 64-bit stage 1 page tables, but have a few differences. Add a new format type to represent the format. The input address size is 48-bits and the output address size is 40-bits (and possibly less?). Note that the later bifrost GPUs follow the standard 64-bit stage 1 format. The differences in the format compared to 64-bit stage 1 format are: The 3rd level page entry bits are 0x1 instead of 0x3 for page entries. The access flags are not read-only and unprivileged, but read and write. This is similar to stage 2 entries, but the memory attributes field matches stage 1 being an index. The nG bit is not set by the vendor driver. This one didn't seem to matter, but we'll keep it aligned to the vendor driver. Cc: Will Deacon <[email protected]> Acked-by: Robin Murphy <[email protected]> Cc: [email protected] Cc: [email protected] Acked-by: Alyssa Rosenzweig <[email protected]> Acked-by: Joerg Roedel <[email protected]> Signed-off-by: Rob Herring <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-12drm/bridge: ti-tfp410: Set the bus_formatPeter Ujfalusi1-0/+17
The TFP410 supports 24 bit, single-edge and 12 bit, dual-edge modes. Depending on how many wires are used (24/12) the driver can set the correct bus_format. If the information is not available in DT then assume 24 bit, single-edge setup. Signed-off-by: Peter Ujfalusi <[email protected]> Reviewed-by: Laurent Pinchart <[email protected]> Reviewed-by: Andrzej Hajda <[email protected]> Signed-off-by: Andrzej Hajda <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-12dt-bindings: display: tfp410: Add bus-width parameter propertyPeter Ujfalusi1-1/+9
tfp410 can be connect to host processor in 24bit, single-edge (24 lines) or 12bit, dual-edge (12 lines). Add bus-width to the documentation so it can be used to select between the two connection scheme. Signed-off-by: Peter Ujfalusi <[email protected]> Reviewed-by: Laurent Pinchart <[email protected]> Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Andrzej Hajda <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-12drm/bridge: ti-tfp410: Fall back to HPD polling if HPD irq is not availablePeter Ujfalusi1-3/+11
In case either the HPD gpio is not specified or when the HPD gpio can not be used as interrupt we should tell the core that the HPD needs to be polled for detecting hotplug. Signed-off-by: Peter Ujfalusi <[email protected]> Reviewed-by: Laurent Pinchart <[email protected]> Signed-off-by: Andrzej Hajda <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-11virtio-gpu api: comment feature flagsGerd Hoffmann1-2/+10
Add comments to the existing feature flags, documenting which commands belong to them. Signed-off-by: Gerd Hoffmann <[email protected]> Reviewed-by: Gurchetan Singh <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-11drm: fix drm_fb_xrgb8888_to_rgb888_dstclip()Gerd Hoffmann1-3/+3
Oops, the __iomem annotation was added to the header file only. Add it to the implementation (and documentation) too. Fixes: 5c5373b51bec ("drm: switch drm_fb_xrgb8888_to_rgb888_dstclip to accept __iomem dst") Signed-off-by: Gerd Hoffmann <[email protected]> Reviewed-by: Noralf Trønnes <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-11drm/tinydrm: Fix fbdev pixel formatNoralf Trønnes7-7/+7
Due to copy/paste error, the fbdev format was changed to 32bpp = XRGB8888 which is an emulated format for the RGB565 drivers. Revert to to using the fallback which is dev->mode_config.preferred_depth for the drivers that set it or 32bpp for those that don't (repaper, st7586). Fixes: 3eba3922819f ("drm/tinydrm: Drop using tinydrm_device") Signed-off-by: Noralf Trønnes <[email protected]> Reviewed-by: Neil Armstrong <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-11drm/i915/fbdev: Move intel_fb_initial_config() to fbdev helperNoralf Trønnes3-245/+190
It is generic code and having it in the helper will let other drivers benefit from it. One change was necessary assuming this to be true: INTEL_INFO(dev_priv)->num_pipes == dev->mode_config.num_crtc Suggested-by: Daniel Vetter <[email protected]> Cc: Jani Nikula <[email protected]> Cc: Joonas Lahtinen <[email protected]> Cc: Rodrigo Vivi <[email protected]> Cc: [email protected] Signed-off-by: Noralf Trønnes <[email protected]> Reviewed-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-11drm/client: Rename drm_client_add() to drm_client_register()Noralf Trønnes3-7/+8
This is done to stay consistent with our naming scheme of _register() = others can start calling us from any thread. Suggested-by: Daniel Vetter <[email protected]> Signed-off-by: Noralf Trønnes <[email protected]> Reviewed-by: Daniel Vetter <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-11drm/sun4i: Rely on dma interconnect for our RAM offsetMaxime Ripard1-7/+21
Now that we can express our DMA topology, rely on those property instead of hardcoding an offset from the dma_addr_t which wasn't really great. We still need to add some code to deal with the old DT that would lack that property, but we move the offset to the DRM device dma_pfn_offset to be able to rely on just the dma_addr_t associated to the GEM object. Acked-by: Daniel Vetter <[email protected]> Acked-by: Robin Murphy <[email protected]> Signed-off-by: Maxime Ripard <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/5df781318e7e05f780a11ed243dcf2b9fe8a08cb.1554108995.git-series.maxime.ripard@bootlin.com
2019-04-10Merge drm/drm-next into drm-misc-nextSean Paul10585-225948/+496430
Finally have a reason for a backmerge other than "it's been a while"! Backmerging drm-next to -misc-next to facilitate Rob Herring's work on Panfrost. Signed-off-by: Sean Paul <[email protected]>
2019-04-10drm/bochs: use simple display pipeGerd Hoffmann2-130/+52
Signed-off-by: Gerd Hoffmann <[email protected]> Acked-by: Noralf Trønnes <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-10drm: switch drm_fb_xrgb8888_to_rgb888_dstclip to accept __iomem dstGerd Hoffmann3-35/+28
Not all archs have the __io_virt() macro, so cirrus can't simply convert pointers that way. The drm format helpers have to use memcpy_toio() instead. This patch makes drm_fb_xrgb8888_to_rgb888_dstclip() accept a __iomem dst pointer and use memcpy_toio() instead of memcpy(). The helper function (drm_fb_xrgb8888_to_rgb888_line) has been changed to process a single scanline. Signed-off-by: Gerd Hoffmann <[email protected]> Reviewed-by: Noralf Trønnes <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-10drm: switch drm_fb_xrgb8888_to_rgb565_dstclip to accept __iomem dstGerd Hoffmann3-61/+64
Not all archs have the __io_virt() macro, so cirrus can't simply convert pointers that way. The drm format helpers have to use memcpy_toio() instead. This patch makes drm_fb_xrgb8888_to_rgb565_dstclip() accept a __iomem dst pointer and use memcpy_toio() instead of memcpy(). The helper function (drm_fb_xrgb8888_to_rgb565_line) has been changed to process a single scanline. Signed-off-by: Gerd Hoffmann <[email protected]> Reviewed-by: Noralf Trønnes <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-10drm: switch drm_fb_memcpy_dstclip to accept __iomem dstGerd Hoffmann3-23/+27
Not all archs have the __io_virt() macro, so cirrus can't simply convert pointers that way. The drm format helpers have to use memcpy_toio() instead. This patch makes drm_fb_memcpy_dstclip() accept a __iomem dst pointer and use memcpy_toio() instead of memcpy(). With that separating out the memcpy loop into the drm_fb_memcpy_lines() helper isn't useful any more, so move the code back into the calling functins. Signed-off-by: Gerd Hoffmann <[email protected]> Reviewed-by: Noralf Trønnes <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-09drm/lima: include used header file explicitlyQiang Yu1-0/+1
To prevent build fail on some platform which does not have it in the include file chain. Reviewed-by: Neil Armstrong <[email protected]> Suggested-by: Randy Dunlap <[email protected]> Fixes: a1d2a6339961 ("drm/lima: driver for ARM Mali4xx GPUs") Signed-off-by: Qiang Yu <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-09drm/lima: add missing Kconfig dependencyQiang Yu1-0/+3
Current implementation does not support MMU-less plarforms. Suggested-by: Randy Dunlap <[email protected]> Reviewed-by: Neil Armstrong <[email protected]> Fixes: a1d2a6339961 ("drm/lima: driver for ARM Mali4xx GPUs") Signed-off-by: Qiang Yu <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-09drm/meson: Add G12A support for the DW-HDMI GlueNeil Armstrong2-38/+157
The Amlogic G12A embeds the same Synopsys DW-HDMI Controller, but with : - a "backport" of the HDR signaling registers from more recent DW-HDMI controllers, this will need a tweak since it's not normally present on this version of the DW-HDMI controller - A direct mapping of TOP and DW-HDMI registers instead of an internal bus accessed using read/write registers - Support for RX-SENSE, but not yet implemented - Support for HDMI 2.1 Dynamic HDR, but not yet implemented - Different registers mapping for the HDMI PHY setup This patchs adds support for these changes while providing exact same support as the previous GXBB, GXL & GXM SoCs. Signed-off-by: Neil Armstrong <[email protected]> Tested-by: Jerome Brunet <[email protected]> Reviewed-by: Jerome Brunet <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-09drm/meson: Add G12A compatibleNeil Armstrong1-0/+1
Finally add the Amlogic G12A SoC compatible for the VPU driver. Signed-off-by: Neil Armstrong <[email protected]> Tested-by: Jerome Brunet <[email protected]> Reviewed-by: Jerome Brunet <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-09drm/meson: Add G12A Video Clock setupNeil Armstrong1-11/+108
While switching to the Common Clock Framework is still Work In Progress, this patch adds the corresponding G12A HDMI PLL setup to be on-par with the other SoCs support. The G12A has only a single tweak about the high frequency setup, where the HDMI PLL needs a specific setup to handle correctly the 5.94GHz DCO frequency. Apart that, it handls ecorrectly all the other HDMI frequencies and can achieve even better DMT clock frequency precision with the larger fractional dividier width. Signed-off-by: Neil Armstrong <[email protected]> Tested-by: Jerome Brunet <[email protected]> Reviewed-by: Jerome Brunet <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-09drm/meson: Add G12A support for CVBS EncoderNeil Armstrong2-9/+27
The Meson G12A SoCs uses the exact same CVBS encoder except a simple CVBS DAC register offset and settings delta. Signed-off-by: Neil Armstrong <[email protected]> [narmstrong: fixed subject typo] Tested-by: Jerome Brunet <[email protected]> Reviewed-by: Jerome Brunet <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-09drm/meson: Add G12A support for plane handling in CRTC driverNeil Armstrong2-52/+221
This patch adds support for the new OSD+VD Plane blending module in the CRTC code by adding the G12A code to manage the blending module and setting the right OSD1 & VD1 plane registers. Signed-off-by: Neil Armstrong <[email protected]> Tested-by: Jerome Brunet <[email protected]> Reviewed-by: Jerome Brunet <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-09drm/meson: Add G12A Support for the Overlay video planeNeil Armstrong1-2/+8
Amlogic G12A SoC supports the same set of Video Planes, but now are handled by the new OSD plane blender module. This patch uses the same VD1 plane for G12A, using the exact same scaler and VD1 setup registers, except using the new blender register to disable the plane. Signed-off-by: Neil Armstrong <[email protected]> [narmstrong: fix typo in commit log] Tested-by: Jerome Brunet <[email protected]> Reviewed-by: Jerome Brunet <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-09drm/meson: Add G12A support for OSD1 PlaneNeil Armstrong1-2/+13
Amlogic G12A SoC supports now up to 3 OSD planes (1 more than the previous SoCs) and a brand new OSD plane blender module. This patch uses the same OSD1 plane for G12A, using the exact same scaler and OSD1 setup registers, except using the new blender register to disable the plane. Signed-off-by: Neil Armstrong <[email protected]> [narmstrong: fixed typo in commit log] Tested-by: Jerome Brunet <[email protected]> Reviewed-by: Jerome Brunet <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-09drm/meson: Add G12A Support for VIU setupNeil Armstrong1-5/+67
Amlogic G12A SoC needs a different VIU setup code, handle it. Signed-off-by: Neil Armstrong <[email protected]> Tested-by: Jerome Brunet <[email protected]> Reviewed-by: Jerome Brunet <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-09drm/meson: Add G12A Support for VPP setupNeil Armstrong1-22/+29
Amlogic G12A needs a different VPP setup code, handle it here. Signed-off-by: Neil Armstrong <[email protected]> Tested-by: Jerome Brunet <[email protected]> Reviewed-by: Jerome Brunet <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-09drm/meson: Add registers for G12A SoCNeil Armstrong1-0/+247
This patch adds the new VPU registers added since the Amlogic GXM SoCs. Signed-off-by: Neil Armstrong <[email protected]> Tested-by: Jerome Brunet <[email protected]> Reviewed-by: Jerome Brunet <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-09drm/meson: Switch PLL to 5.94GHz base for 297Mhz pixel clockNeil Armstrong1-2/+2
On Amlogic G12A SoC, the 2,97GHz PLL frequency is not stable enough to provide a correct 297MHz pixel clock, so switch the PLL base frequency with a /2 OD when the 297MHz pixel clock is requested. This solves the issue on G12A and also works fine on GXBB, GXL & GXM. Signed-off-by: Neil Armstrong <[email protected]> Tested-by: Jerome Brunet <[email protected]> Reviewed-by: Jerome Brunet <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-09dt-bindings: display: amlogic, meson-dw-hdmi: Add G12A compatible and portsNeil Armstrong1-0/+4
The Amlogic G12A SoC has a slighly modified DW-HDMI Glue with support for HDMI 2.1 and a different DW-HDMI register access. Signed-off-by: Neil Armstrong <[email protected]> Reviewed-by: Rob Herring <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-09dt-bindings: display: amlogic, meson-vpu: Add G12A compatible and portsNeil Armstrong1-0/+4
The Amlogic G12A VPU is very similar to the Amlogic GXM VPU but with : - an enhanced plane blender, with up to 3 OSD planes - support for AFBC 1.2 decoder (for Bifrost GPU) - support display mode up to 4k60@75Hz Signed-off-by: Neil Armstrong <[email protected]> Reviewed-by: Rob Herring <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-09dt-bindings: gpu: add bindings for the ARM Mali Bifrost GPUNeil Armstrong1-0/+92
Add the bindings for the Bifrost family of ARM Mali GPUs. The Bifrost GPU architecture is similar to the Midgard family, but with a different Shader Core & Execution Engine structures. Bindings are based on the Midgard family bindings, but the inner architectural changes makes it a separate family needing separate bindings. The Bifrost GPUs are present in a number of recent SoCs, like the Amlogic G12A Family, and many other vendors. The Amlogic vendor specific compatible is added to handle the specific IP integration differences and dependencies. Signed-off-by: Neil Armstrong <[email protected]> Reviewed-by: Rob Herring <[email protected]> [narmstrong: fixed small typo in compatible description] Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-08MAINTAINERS: mark lima mailing list as moderatedRandy Dunlap1-1/+1
Note that the lima mailing list is moderated. Signed-off-by: Randy Dunlap <[email protected]> Cc: Qiang Yu <[email protected]> Cc: [email protected] Cc: [email protected] Signed-off-by: Qiang Yu <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Neil Armstrong <[email protected]>
2019-04-08drm/cirrus: rewrite and modernize driver.Gerd Hoffmann9-2013/+658
Time to kill some bad sample code people are copying from ;) This is a complete rewrite of the cirrus driver. The cirrus_mode_set() function is pretty much the only function which is carried over largely unmodified. Everything else is upside down. It is a single monster patch. But given that it does some pretty fundamental changes to the drivers workflow and also reduces the code size by roughly 70% I think it'll still be alot easier to review than a longish baby-step patch series. Changes summary: - Given the small amout of video memory (4 MB) the cirrus device has the rewritten driver doesn't try to manage buffers there. Instead it will blit (memcpy) the active framebuffer to video memory. - All gem objects are stored in main memory and are manged using the new shmem helpers. ttm is out. - It supports RG16, RG24 and XR24 formats. XR24 gets converted to RG24 or RG16 at blit time if needed, to avoid the pitch becoming larger than what the cirrus hardware can handle. - The simple display pipeline is used. - The generic fbdev emulation is used. - It's a atomic driver now. - It runs wayland. Signed-off-by: Gerd Hoffmann <[email protected]> Acked-by: Daniel Vetter <[email protected]> Reviewed-by: Sam Ravnborg <[email protected]> Acked-by: Noralf Trønnes <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-08drm: add drm_fb_xrgb8888_to_rgb888_dstclip()Gerd Hoffmann2-0/+63
Simliar to drm_fb_xrgb8888_to_rgb565_dstclip() but converts to rgb888 instead of rgb565. Signed-off-by: Gerd Hoffmann <[email protected]> Reviewed-by: Noralf Trønnes <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected]
Powered by cgit, Gruvboxed by Blaster4385.