| Age | Commit message (Collapse) | Author | Files | Lines | |
|---|---|---|---|---|---|
| 2017-03-29 | drm/amd/powerplay: add new Vega10's ppsmc header file | Eric Huang | 1 | -0/+131 | |
| Acked-by: Christian König <[email protected]> Signed-off-by: Eric Huang <[email protected]> Reviewed-by: Ken Wang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amd/powerplay: add smu9 header files for Vega10 | Eric Huang | 2 | -0/+565 | |
| Acked-by: Christian König <[email protected]> Signed-off-by: Eric Huang <[email protected]> Reviewed-by: Ken Wang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: add SMC firmware into global ucode list for psp loading | Huang Rui | 1 | -0/+11 | |
| Acked-by: Christian König <[email protected]> Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: add psp firmware info into info query and debugfs | Huang Rui | 2 | -0/+29 | |
| Acked-by: Christian König <[email protected]> Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: add PSP driver for vega10 (v2) | Huang Rui | 9 | -0/+1450 | |
| PSP is responsible for firmware loading on SOC-15 asics. v2: fix memory leak (Ken) Acked-by: Christian König <[email protected]> Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: add initial vce 4.0 support for vega10 | Leo Liu | 4 | -1/+932 | |
| Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: add initial uvd 7.0 support for vega10 | Leo Liu | 4 | -12/+1615 | |
| Acked-by: Christian König <[email protected]> Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: add vega10 interrupt handler | Ken Wang | 3 | -1/+456 | |
| Acked-by: Christian König <[email protected]> Signed-off-by: Ken Wang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: implement GFX 9.0 support (v2) | Ken Wang | 4 | -1/+3331 | |
| Add support for gfx v9.0. v2: update golden settings from Ken Acked-by: Christian König <[email protected]> Signed-off-by: Ken Wang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: add SDMA v4.0 implementation (v2) | Ken Wang | 3 | -1/+1585 | |
| v2: fix Makefile Signed-off-by: Ken Wang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: Add GMC 9.0 support (v2) | Alex Xie | 10 | -7/+2013 | |
| On SOC-15 parts, the GMC (Graphics Memory Controller) consists of two hubs: GFX (graphics and compute) and MM (sdma, uvd, vce). v2: drop sdma from Makefile, fix duplicate return statement. Signed-off-by: Alex Xie <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: add NBIO 6.1 driver | Junwei Zhang | 3 | -1/+286 | |
| This handles nbio 6.1 specific implementations which are used by various other IPs. Acked-by: Christian König <[email protected]> Signed-off-by: Hawking Zhang <[email protected]> Signed-off-by: Junwei Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Tom St Denis <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: handle PTE MTYPE in amdgpu_vm_bo_split_mapping | Alex Xie | 1 | -0/+3 | |
| Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Xie <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: handle PTE EXEC in amdgpu_vm_bo_split_mapping | Alex Xie | 1 | -0/+3 | |
| Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Xie <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: gart fixes for vega10 | Alex Deucher | 1 | -1/+2 | |
| Flags need to be 0 to be considered invalid. Reviewed-by: Christian König <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: add psp firmware header info | Huang Rui | 1 | -0/+9 | |
| Defines the header info for the psp firmware. Acked-by: Christian König <[email protected]> Signed-off-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: rework common ucode handling for vega10 | Huang Rui | 3 | -23/+53 | |
| Handle ucode differences in vega10. Acked-by: Christian König <[email protected]> Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: don't validate TILE_SPLIT on GFX9 | Marek Olšák | 1 | -1/+4 | |
| Signed-off-by: Marek Olšák <[email protected]> Acked-by: Alex Deucher <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: add tiling flags for GFX9 (v2) | Alex Deucher | 1 | -2/+8 | |
| v2: Marek: allow shifts >32 in AMDGPU_TILING_SET/GET Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: Add asic family for vega10 | Alex Deucher | 1 | -0/+1 | |
| Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: add NGG parameters | Alex Deucher | 4 | -0/+65 | |
| NGG (Next Generation Graphics) is a new feature in GFX9.0. This adds the relevant parameters. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: add PTE defines for MTYPE | Alex Deucher | 1 | -0/+4 | |
| New on SOC-15 asics. Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: add IV trace point | Christian König | 2 | -0/+40 | |
| This allows us to grab IVs without spamming the log. Signed-off-by: Christian König <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: update IH IV ring entry for soc-15 | Alex Deucher | 1 | -1/+4 | |
| Reflect the new format on soc-15 asics. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: use atomfirmware interfaces for scratch reg save/restore | Alex Deucher | 1 | -4/+16 | |
| If the board is atomfirmware based. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: Add MTYPE flags to GPU VM IOCTL interface | Alex Xie | 2 | -1/+13 | |
| Signed-off-by: Alex Xie <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: add 64bit doorbell assignments | Ken Wang | 1 | -0/+68 | |
| Signed-off-by: Ken Wang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: gb_addr_config struct | Andrey Grodzovsky | 1 | -0/+10 | |
| Acked-by: Christian König <[email protected]> Signed-off-by: Andrey Grodzovsky <[email protected]> Reviewed-by: Ken Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: use new flag to handle different firmware loading method | Huang Rui | 10 | -20/+90 | |
| This patch introduces a new flag named "amdgpu_firmware_load_type" to handle different firmware loading method. Since Vega10, there are three ways to load firmware. It would be better to use a flag and a fw_load_type kernel parameter to configure it. Acked-by: Christian König <[email protected]> Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: add clinetid definition for vega10 | ken | 1 | -2/+40 | |
| Signed-off-by: ken <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: add vega10 chip name | Ken Wang | 2 | -0/+2 | |
| Acked-by: Christian König <[email protected]> Signed-off-by: Ken Wang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: add common soc15 headers | Ken Wang | 3 | -0/+377 | |
| These are used by various IP modules. Acked-by: Christian König <[email protected]> Signed-off-by: Ken Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: add SDMA 4.0 packet header | Alex Deucher | 1 | -0/+3335 | |
| Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: add gfx9 clearstate header | Alex Deucher | 1 | -0/+941 | |
| Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amd: Add MQD structs for GFX V9 | Felix Kuehling | 1 | -0/+675 | |
| This header defines the gfx v9 MEC structures. Acked-by: Christian König <[email protected]> Signed-off-by: Felix Kuehling <[email protected]> Reviewed-by: Shaoyun Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: add the VCE 4.0 register headers | Alex Deucher | 3 | -0/+818 | |
| These are the Video Compression Engine registers for vega10. Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: add the UVD 7.0 register headers | Alex Deucher | 3 | -0/+1160 | |
| These are the Unifed Video Decoder registers for vega10. Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: add THM 9.0 register headers | Alex Deucher | 3 | -0/+1871 | |
| These are the THerMal control registers for vega10. Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: add SMUIO 9.0 register headers | Alex Deucher | 3 | -0/+533 | |
| These are the System Managment Unit IO registers for vega10. Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: add SDMA 4.0 register headers | Alex Deucher | 6 | -0/+5316 | |
| These are the System DMA register headers for vega10. Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: add OSSSYS 4.0 register headers | Alex Deucher | 3 | -0/+1699 | |
| These are the OS Services register headers for vega10. Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: add NBIO 6.1 register headers | Alex Deucher | 3 | -0/+159873 | |
| These are the Bus IO registers for vega10. Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: add NBIF 6.1 register headers | Alex Deucher | 3 | -0/+13240 | |
| These are the Bus InterFace registers for vega10. Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: add MP 9.0 register headers | Alex Deucher | 3 | -0/+2180 | |
| MP is the system management controller on vega10. Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: add the MMHUB 1.0 register headers | Alex Deucher | 3 | -0/+13105 | |
| Add the MultiMedia Hub registers for vega10. Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: add the HDP 4.0 register headers | Alex Deucher | 3 | -0/+927 | |
| These are the Host Data Path registers for vega10. Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: add the GC 9.0 register headers | Alex Deucher | 3 | -0/+40971 | |
| Add the Graphics Core register headers for vega10. Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: Add the DCE 12.0 register headers | Alex Deucher | 3 | -0/+92697 | |
| These are the register headers for the Display and Composition Engine on vega10. Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: Add ATHUB 1.0 register headers | Alex Deucher | 3 | -0/+2739 | |
| ATHUB is part of the memory controller on soc15 asics. Signed-off-by: Alex Deucher <[email protected]> | |||||
| 2017-03-29 | drm/amdgpu: add vega10_enum.h | Alex Deucher | 1 | -0/+22531 | |
| This adds the register bitfield enums for vega10. Signed-off-by: Alex Deucher <[email protected]> | |||||