| Age | Commit message (Collapse) | Author | Files | Lines |
|---|
|
Old Wa added now forever on CNL all steppings.
With CPU P states enabled along with RC6, dispatcher
hangs can happen.
Cc: Rafael Antognolli <[email protected]>
Signed-off-by: Rodrigo Vivi <[email protected]>
Reviewed-by: Radhakrishna Sripada <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
|
|
We can still use PSR1 when PSR2 conditions are not met.
So, let's split the check in a way that we make sure has_psr
gets set independently of PSR2 criteria.
v2: Duh! Handle proper return to avoid breaking PSR2.
v3: (DK):
- better name for psr2 conditions check function
- Don't remove FIXME block and psr2.support check.
- Add a debug message to show us what PSR or PSR2 is
getting enabled now we have ways to enabled PSR on
PSR2 panels.
- s/PSR2 disabled/PSR2 not enabled
Cc: Dhinakaran Pandiyan <[email protected]>
Signed-off-by: Rodrigo Vivi <[email protected]>
Reviewed-by: Dhinakaran Pandiyan <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
|
|
According to spec:
"PSR2 is supported for pipe active sizes up to
3640 pixels wide and 2304 lines tall."
BSpec: 7713
Cc: Dhinakaran Pandiyan <[email protected]>
Signed-off-by: Rodrigo Vivi <[email protected]>
Reviewed-by: Dhinakaran Pandiyan <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
|
|
eDP spec says - "If PSR/PSR2 is supported, the SET_POWER_CAPABLE bit in the
EDP_GENERAL_CAPABILITY_1 register (DPCD Address 00701h, bit d7) must be set
to 1."
Reject PSR on panels without this cap bit set as such panels cannot be
controlled via SET_POWER & SET_DP_PWR_VOLTAGE register and the DP source
needs to be able to do that for PSR.
Thanks to Nathan for debugging this.
Panel cap checks like this can be done just once, let's fix this
when PSR dpcd init movement lands.
Cc: Nathan D Ciobanu <[email protected]>
Cc: Rodrigo Vivi <[email protected]>
Signed-off-by: Dhinakaran Pandiyan <[email protected]>
Tested-by: Nathan Ciobanu <[email protected]>
Reviewed-by: Rodrigo Vivi <[email protected]>
Signed-off-by: Rodrigo Vivi <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
|
|
No functional change.
Signed-off-by: Dhinakaran Pandiyan <[email protected]>
Reviewed-by: David Weinehall <[email protected]>
Signed-off-by: Rodrigo Vivi <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
|
|
The core already takes care of the delay before retrying. The delay now
changes to (500, 600)us instead of (500 + 1000, 600 + 1500)us.
Cc: Rodrigo Vivi <[email protected]>
Signed-off-by: Dhinakaran Pandiyan <[email protected]>
Reviewed-by: David Weinehall <[email protected]>
Signed-off-by: Rodrigo Vivi <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
|
|
The cap check should be specifically for bit 0 instead of any bit.
Cc: Rodrigo Vivi <[email protected]>
Signed-off-by: Dhinakaran Pandiyan <[email protected]>
Reviewed-by: Rodrigo Vivi <[email protected]>
Fixes: 474d1ec4a3d7 ("drm/i915/skl: Enabling PSR2 SU with frame sync")
Signed-off-by: Rodrigo Vivi <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
|
|
intel_edp_init_dpcd() is cluttered with PSR specific DPCD checks and
intel_dp.c is huge.
No functional change intended.
v2: Rebased.
Cc: Rodrigo Vivi <[email protected]>
Signed-off-by: Dhinakaran Pandiyan <[email protected]>
Reviewed-by: David Weinehall <[email protected]>
Acked-by: Rodrigo Vivi <[email protected]>
Signed-off-by: Rodrigo Vivi <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
|
|
Frontbuffer flush and invalidate call psr, fbc and drrs functions that use
mutexes but they can be called in atomic contexts in the fbdev path. The
point where the spinlocks are acquired is up in the call stack that is not
entirely easy to spot, so annotate with might_sleep().
Cc: Rodrigo Vivi <[email protected]>
Signed-off-by: Dhinakaran Pandiyan <[email protected]>
Reviewed-by: Rodrigo Vivi <[email protected]>
Signed-off-by: Rodrigo Vivi <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
|
|
PSR on CNL requires AUX IO wells to be kept on and the existing AUX domain
for AUX-A enables DC_OFF well too. This is not required, so add a new
AUX_IO_A domain for AUX-A to allow DC states to remain enabled. Other AUX
channels re-use the existing AUX domains.
v4: Reword comment (Rodrigo and Ville)
Rename _get and _put functions to include aux_io substring(Rodrigo)
Remove unnecessary diff that got included.
v3: Extract aux domain selection into a function (Ville)
v2: Add AUX IO domain only for AUX-A
Rebased on top of Ville's AUX series.
Cc: Imre Deak <[email protected]>
Cc: Rodrigo Vivi <[email protected]>
Cc: Ville Syrjälä <[email protected]>
Suggested-by: Imre Deak <[email protected]>
Signed-off-by: Dhinakaran Pandiyan <[email protected]>
Reviewed-by: Rodrigo Vivi <[email protected]>
Signed-off-by: Rodrigo Vivi <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
|
|
Since we're inhibiting context save of preempt context, we're no longer
tracking the position of HEAD/TAIL. With GuC, we're adding a new
breadcrumb for each preemption, which means that the HW will do more and
more breadcrumb writes. Eventually the ring is filled, and we're
submitting the preemption context with HEAD==TAIL==0, which won't result
in breadcrumb write, but will trigger hangcheck instead.
Instead of writing a new preempt breadcrumb for each preemption, let's
just fill the ring once at init time (which also saves a couple of
instructions in the tasklet).
v2: Assert that context save restore is inhibited, don't assert on ring
alignment. (Chris)
v3: Cleanup checkpatch.
Fixes: 517aaffe0c1b ("drm/i915/execlists: Inhibit context save/restore for the fake preempt context")
Signed-off-by: Michał Winiarski <[email protected]>
Cc: Chris Wilson <[email protected]>
Cc: Daniele Ceraolo Spurio <[email protected]>
Cc: Michel Thierry <[email protected]>
Cc: Mika Kuoppala <[email protected]>
Cc: Tvrtko Ursulin <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Reviewed-by: Chris Wilson <[email protected]>
Signed-off-by: Chris Wilson <[email protected]>
|
|
The usual if ladder order should be from newest to oldest
platform. However the CNL conditional statement was misplaced.
This patch sets the DP source for platforms starting from the newest
to oldest.
Suggested-by: Jani Nikula <[email protected]>
Cc: Rodrigo Vivi <[email protected]>
Cc: Jani Nikula <[email protected]>
Signed-off-by: Manasi Navare <[email protected]>
Signed-off-by: Jani Nikula <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
|
|
Sometimes we need to boost the priority of an in-flight request, which
may lead to the situation where the second submission port then contains
a higher priority context than the first and so we need to inject a
preemption event. To do so we must always check inside
execlists_dequeue() whether there is a priority inversion between the
ports themselves as well as the head of the priority sorted queue, and we
cannot just skip dequeuing if the queue is empty.
As Michał noted, this doesn't simply extend to handling more than 2-port
submission, as we may need to reorder within the array of executing
requests which themselves are lower priority than the first. A task for
later!
Signed-off-by: Chris Wilson <[email protected]>
Cc: Michał Winiarski <[email protected]>
Cc: Michel Thierry <[email protected]>
Cc: Mika Kuoppala <[email protected]>
Cc: Tvrtko Ursulin <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Reviewed-by: Michał Winiarski <[email protected]>
Reviewed-by: Mika Kuoppala <[email protected]>
|
|
Mostly doc/print messages that were not updated after commit e61e0f51ba79
("drm/i915: Rename drm_i915_gem_request to i915_request").
Signed-off-by: Michel Thierry <[email protected]>
Cc: Chris Wilson <[email protected]>
Reviewed-by: Chris Wilson <[email protected]>
Signed-off-by: Chris Wilson <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
|
|
Collect all the aux ch vfunc assignments into intel_dp_aux_init()
instead of having it spread around.
Reviewed-by: Chris Wilson <[email protected]>
Reviewed-by: Rodrigo Vivi <[email protected]>
Signed-off-by: Ville Syrjälä <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
|
|
Just store function pointers that give us the correct register offsets
instead of storing the register offsets themselves. Slightly less
efficient perhaps but saves a few bytes and better matches how we do
things elsewhere.
v2: Keep a local array of data registers (Chris)
Reviewed-by: Chris Wilson <[email protected]>
Signed-off-by: Ville Syrjälä <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
|
|
Since we no longer have a 1:1 correspondence between ports and AUX
channels, let's give AUX channels their own enum. Makes it easier
to tell the apples from the oranges, and we get rid of the
port E AUX power domain FIXME since we now derive the power domain
from the actual AUX CH.
v2: Rebase due to AUX F
v3: Split out the power domain fix (Rodrigo)
Reviewed-by: Rodrigo Vivi <[email protected]> #v2
Reviewed-by: Chris Wilson <[email protected]> #v2
Signed-off-by: Ville Syrjälä <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
|
|
Select the aux power domain based on the aux ch rather than based on
the port. Now we can rid ourselves of the port E FIXME as well.
v2: Split from the enum aux_ch patch (Rodrigo)
Reviewed-by: Rodrigo Vivi <[email protected]> #v1
Reviewed-by: Chris Wilson <[email protected]> #v1
Signed-off-by: Ville Syrjälä <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
|
|
git://anongit.freedesktop.org/drm/drm-misc into drm-next
drm-misc-next for 4.17:
Cross-subsystem Changes:
- Backlight helpers to enable/disable and find devices in dt (Meghana)
Core Changes:
- Documentation improvements (Chris/Daniel/Jani)
- simple_kms_helper: Add mode_valid() support (Linus)
- mm: Fix bug in interval_tree causing nodes to be out-of-order (Chris)
Driver Changes:
- tinydrm/panel: Use the new backlight helpers (Meghana)
- rockchip: Support gem_prime_import_sg_table + some fixes (Various)
- sun4i: Add A83T HDMI support using dw-hdmi (Jernej)
Cc: Meghana Madhyastha <[email protected]>
Cc: Jani Nikula <[email protected]>
Cc: Daniel Vetter <[email protected]>
Cc: Chris Wilson <[email protected]>
Cc: Linus Walleij <[email protected]>
Cc: Heiko Stuebner <[email protected]>
Cc: Jernej Skrabec <[email protected]>
* tag 'drm-misc-next-2018-02-21' of git://anongit.freedesktop.org/drm/drm-misc: (41 commits)
drm/omapdrm: Use of_find_backlight helper
drm/panel: Use of_find_backlight helper
drm/omapdrm: Use backlight_enable/disable helpers
drm/panel: Use backlight_enable/disable helpers
drm/tinydrm: Call devres version of of_find_backlight
drm/tinydrm: Replace tinydrm_of_find_backlight with of_find_backlight
drm/tinydrm: Convert tinydrm_enable/disable_backlight to backlight_enable/disable
drm: add documentation for tv connector state margins
drm/doc: Use new substruct support
drm/doc: Polish for drm_mode_parse_command_line_for_connector
drm/docs: Document "scaling mode" property better
drm/docs: Align layout of optional plane blending properties
drm/docs: Discourage adding more to kms-properties.csv
drm: simple_kms_helper: Add mode_valid() callback support
drm/todo: Add idr_init_base todo
drm: Use idr_init_base(1) when using id==0 for invalid
drm: NULL pointer dereference [null-pointer-deref] (CWE 476) problem
drm: NULL pointer dereference [null-pointer-deref] (CWE 476) problem
dma-buf/sw_sync: Fix kerneldoc warnings
drm: Fix kerneldoc warnings for drm_lease
...
|
|
Currently the FBC code doesn't handle the 90/270 degree rotated case
correctly. We would need the GTT tracking to monitor the fence on the
normal GTT view (the rotated view doesn't even have a fence). Not quite
sure how we should program the fence Y offset etc. in that case. For now
we'll end up disabling FBC with 90/270 degree rotation. Add a FIXME
to remind people about this fact.
v2: Reword the text (Chris)
Move the FIXME to the fbc code
Cc: Chris Wilson <[email protected]>
Signed-off-by: Ville Syrjälä <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Reviewed-by: Chris Wilson <[email protected]>
|
|
We've replicated the fb pin/unpin code in a few places. Pull it into
convenint helpers.
Slight change in locking behaviour as intel_cleanup_plane_fb() now
grab struct_mutex unconditionally.
v2: Change the locking to be symmetric between pin and unpin
Cc: Chris Wilson <[email protected]>
Signed-off-by: Ville Syrjälä <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Reviewed-by: Chris Wilson <[email protected]>
|
|
As only a subset of primary planes are FBC capable there's no need
to waste fences on all of them. So let's skip the fence if the plane
isn't even fbc capable.
In the future we might extend this to skip the fence even for FBC
capable planes if the crtc and/or plane state isn't suitable
for FBC.
Cc: Chris Wilson <[email protected]>
Signed-off-by: Ville Syrjälä <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Reviewed-by: Chris Wilson <[email protected]>
|
|
Let's record the information whether a plane can do fbc or not under
struct inte_plane.
v2: Rebase due to i9xx_plane_id
Handle BDW/HSW correctly
v3: Move inte_fbc_init() back since we depend on it happening
even with i915.disable_display, and populate
fbc->possible_framebuffer_bits directly from the
plane init code instead
v4: Add note about plane A being tied to pipe A on HSW+
Cc: Chris Wilson <[email protected]>
Signed-off-by: Ville Syrjälä <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Reviewed-by: Chris Wilson <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
|
|
Currently we pin a fence on every plane doing tiled scanout. The
number of planes we have available is fast apporaching the number
of fences so we really should stop wasting them. Only FBC needs
the fence on gen4+, so let's use fences only for the primary planes
on those platforms.
v2: drop the tiling check from plane_uses_fence() as the obj is
NULL during initial_plane_config() and we don't rally need the
check since i915_vma_pin_fence() does the check anyway
Cc: Chris Wilson <[email protected]>
Signed-off-by: Ville Syrjälä <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Reviewed-by: Chris Wilson <[email protected]>
|
|
Gen2/3 display engine depends on the fence for tiled scanout. So if we
fail to get a fence fail the entire operation.
Cc: Chris Wilson <[email protected]>
Signed-off-by: Ville Syrjälä <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Reviewed-by: Chris Wilson <[email protected]>
|
|
Some panels support limited range output (16-235) compared
to full range RGB values (0-255). Also userspace can control
the RGB range using "Broadcast RGB" property. Currently the
code to handle full range to limited range is broken. This
patch fixes the same by properly scaling down all the full
range co-efficients with limited range scaling factor.
v2: Fixed Ville's review comments.
v3: Changed input to const and used correct data types as
suggested by Ville
v4: Fixed some missing data type corrections.
Signed-off-by: Johnson Lin <[email protected]>
Signed-off-by: Uma Shankar <[email protected]>
Reviewed-by: Ville Syrjälä <[email protected]>
Signed-off-by: Ville Syrjälä <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
|
|
Slightly smaller code and a bit more logical layout.
Signed-off-by: Tvrtko Ursulin <[email protected]>
Reviewed-by: Chris Wilson <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
|
|
It turns out that HSW has a register that tells us how many EUs are
disabled per half-slice (roughly a similar notion to subslice). We
didn't read those registers so far as most userspace drivers didn't
need those values prior to Gen8, but an internal library would like to
have access to this.
Since we already have the getparam interface, there is no harm in
exposing this.
v2: Rename bits value (Joonas)
v3: s/GEM_BUG_ON/MISSING_CASE/ (Joonas)
v4: s/GEM_BUG_ON/MISSING_CASE/ again... (Lionel)
Signed-off-by: Lionel Landwerlin <[email protected]>
Reviewed-by: Joonas Lahtinen <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
|
|
Show GEN11 specific interrupt registers in debugfs
v2: Update for POR changes. (Daniele Ceraolo Spurio)
v3: get runtime pm ref. unify common parts with gen8 (Daniele)
Cc: Ceraolo Spurio, Daniele <[email protected]>
Signed-off-by: Tvrtko Ursulin <[email protected]>
Signed-off-by: Rodrigo Vivi <[email protected]>
Signed-off-by: Mika Kuoppala <[email protected]>
Reviewed-by: Daniele Ceraolo Spurio <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
|
|
This is the current PCI ID list in our documentation.
Let's leave the _gt#_ part out for now since our current documentation
is not 100% clear and we don't need this info now anyway.
v2: Use the new ICL_11 naming (Kelvin Gardiner).
v3: Latest IDs as per BSpec (Oscar).
v4: Make it compile (Paulo).
v5: Remove comments (Lucas).
v6: Multile rebases (Paulo).
v7: Rebase (Mika)
Reviewed-by: Anuj Phogat <[email protected]> (v1)
Signed-off-by: Paulo Zanoni <[email protected]>
Signed-off-by: Oscar Mateo <[email protected]>
Signed-off-by: Lucas De Marchi <[email protected]>
Signed-off-by: Rodrigo Vivi <[email protected]>
Signed-off-by: Mika Kuoppala <[email protected]>
Reviewed-by: Michel Thierry <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
|
|
Print out the current request/context before doing the GEM_BUG_ON, so
that we can inspect the values in the ftrace.
Signed-off-by: Chris Wilson <[email protected]>
Cc: Mika Kuoppala <[email protected]>
Reviewed-by: Mika Kuoppala <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
|
|
Include a GEM_TRACE to show when the context is complete and we advance
the ELSP port.
Signed-off-by: Chris Wilson <[email protected]>
Cc: Mika Kuoppala <[email protected]>
Reviewed-by: Mika Kuoppala <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
|
|
Load an empty ringbuffer for preemption, ignoring the lite-restore
workaround as we know the preempt context is always idle before preemption.
Note that after some digging by Michal Winiarski, we found that
RING_HEAD is no longer being updated (due to inhibiting context save
restore) so this patch is already in effect!
Signed-off-by: Chris Wilson <[email protected]>
Cc: Michal Winiarski <[email protected]>
Cc: Michel Thierry <[email protected]>
Cc: Michal Wajdeczko <[email protected]>
Cc: Tvrtko Ursulin <[email protected]>
Cc: Mika Kuoppala <[email protected]>
Reviewed-by: Michel Thierry <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
|
|
We want to de-emphasize the link between the request (dependency,
execution and fence tracking) from GEM and so rename the struct from
drm_i915_gem_request to i915_request. That is we may implement the GEM
user interface on top of requests, but they are an abstraction for
tracking execution rather than an implementation detail of GEM. (Since
they are not tied to HW, we keep the i915 prefix as opposed to intel.)
In short, the spatch:
@@
@@
- struct drm_i915_gem_request
+ struct i915_request
A corollary to contracting the type name, we also harmonise on using
'rq' shorthand for local variables where space if of the essence and
repetition makes 'request' unwieldy. For globals and struct members,
'request' is still much preferred for its clarity.
Signed-off-by: Chris Wilson <[email protected]>
Cc: Joonas Lahtinen <[email protected]>
Cc: Mika Kuoppala <[email protected]>
Cc: Tvrtko Ursulin <[email protected]>
Cc: Michał Winiarski <[email protected]>
Cc: Michal Wajdeczko <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Reviewed-by: Mika Kuoppala <[email protected]>
Reviewed-by: Michał Winiarski <[email protected]>
Acked-by: Joonas Lahtinen <[email protected]>
|
|
No code changes, fixes doc build warnings and polish some doc text.
Reported-by: Daniel Vetter <[email protected]>
Cc: Rodrigo Vivi <[email protected]>
Cc: Daniel Vetter <[email protected]>
Signed-off-by: Dhinakaran Pandiyan <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
|
|
Noticed while reading some unrelated patches. Unfortunately Imre's
patch to add our early/late hooks predated the device_link
infrastructure by 2 years.
Cc: Imre Deak <[email protected]>
Cc: Takashi Iwai <[email protected]>
Acked-by: Imre Deak <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
|
|
Commit fe49789fab97 ("drm/i915: Deconstruct execute fence") re-arranged
the code and moved the i915_gem_request_execute tracepoint to before the
global seqno is assigned to the request.
We need to move the tracepoint a bit later so this information is once
again available.
Signed-off-by: Tvrtko Ursulin <[email protected]>
Fixes: fe49789fab97 ("drm/i915: Deconstruct execute fence")
Cc: Chris Wilson <[email protected]>
Cc: Tvrtko Ursulin <[email protected]>
Cc: Jani Nikula <[email protected]>
Cc: Joonas Lahtinen <[email protected]>
Cc: Rodrigo Vivi <[email protected]>
Cc: [email protected]
Reviewed-by: Chris Wilson <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
|
|
Signed-off-by: Joonas Lahtinen <[email protected]>
|
|
This reverts commit 1c331f75aa6ccbf64ebcc5a019183e617c9d818a.
Breaks resume on some systems.
Bug: https://bugs.freedesktop.org/show_bug.cgi?id=100759
Signed-off-by: Alex Deucher <[email protected]>
Cc: [email protected]
|
|
LVDS startup fixes, enable VSP compositor on GEN3
* 'drm/next/du' of git://linuxtv.org/pinchartl/media:
drm: rcar-du: lvds: Refactor LVDS startup
drm: rcar-du: lvds: Fix LVDS startup on R-Car Gen3
drm: rcar-du: lvds: Fix LVDS startup on R-Car Gen2
drm: rcar-du: lvds: Fix LVDS clock frequency range
drm: rcar-du: lvds: Fix LVDCR1 for R-Car gen3
drm: rcar-du: Enable VSP compositor by default on Gen3
drm: rcar-du: Calculate DPLLCR to be more small jitter
drm: rcar-du: Use 1000 to avoid misunderstanding in rcar_du_dpll_divider()
drm: rcar-du: Remove zpos field from rcar_du_vsp_plane_state structure
|
|
We use our own backing store and don't need the shmem file.
Signed-off-by: Christian König <[email protected]>
Acked-by: Daniel Vetter <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
|
|
We use our own backing store and don't need the shmem file.
Signed-off-by: Christian König <[email protected]>
Acked-by: Daniel Vetter <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
|
|
To be able to use DRI_PRIME with amdgpu and i915 we add all our fences
only as exclusive ones.
Disable that behavior when sharing between amdgpu itself cause it
hinders concurrent execution.
Signed-off-by: Christian König <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
|
|
Instead of the pin/unpin callback implement the attach/detach ones.
Functional identical, but allows us access to the attachment.
Signed-off-by: Christian König <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
|
|
Rather than trusting the cached value of plane_state->vma->fence to
imply whether the plane_state itself holds a reference on the
framebuffer's fence, use the information provided in the
plane_state->flags (PLANE_HAS_FENCE). Note that we still assume that FBC
is entirely bounded by the plane_state active life span; it's not clear
if that is a safe assumption.
Suggested-by: Ville Syrjälä <[email protected]>
Signed-off-by: Chris Wilson <[email protected]>
Cc: Ville Syrjälä <[email protected]>
Reviewed-by: Ville Syrjälä <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
|
|
Use the information about the fence state from the time of pinning to
determine if the fbdev writes are going through a fence. This avoids any
confusion in cases where the fence may appear or disappear unconnected
to the use by fbdev.
Suggested-by: Ville Syrjälä <[email protected]>
Signed-off-by: Chris Wilson <[email protected]>
Cc: Ville Syrjälä <[email protected]>
Reviewed-by: Ville Syrjälä <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
|
|
Currently we make the unilateral decision inside
i915_gem_object_pin_to_display() where the VMA should resided (inside
the fence and mappable region or above?). This is not our decision to
make as it impacts on how the display engine can use the resulting
scanout object, and it would rather instruct us where to place the VMA so
that it can enable the features it wants. As such, make the pin flags an
argument to i915_gem_object_pin_to_display() and control them from
intel_pin_and_fence_fb_obj()
Whilst taking control of the mapping for ourselves, start tracking how
we use it to avoid trying to free a fence we never claimed:
<3>[ 227.151869] GEM_BUG_ON(vma->fence->pin_count <= 0)
<4>[ 227.152064] ------------[ cut here ]------------
<2>[ 227.152068] kernel BUG at drivers/gpu/drm/i915/i915_vma.h:391!
<4>[ 227.152084] invalid opcode: 0000 [#1] PREEMPT SMP KASAN PTI
<0>[ 227.152092] Dumping ftrace buffer:
<0>[ 227.152099] (ftrace buffer empty)
<4>[ 227.152102] Modules linked in: i915 snd_hda_codec_analog snd_hda_codec_generic coretemp snd_hda_intel snd_hda_codec snd_hwdep snd_hda_core snd_pcm lpc_ich e1000e mei_me mei prime_numbers
<4>[ 227.152131] CPU: 1 PID: 1587 Comm: kworker/u16:49 Tainted: G U 4.16.0-rc1-gbab67b2f6177-kasan_7+ #1
<4>[ 227.152134] Hardware name: Dell Inc. OptiPlex 755 /0PU052, BIOS A08 02/19/2008
<4>[ 227.152236] Workqueue: events_unbound intel_atomic_commit_work [i915]
<4>[ 227.152292] RIP: 0010:intel_unpin_fb_vma+0x23a/0x2a0 [i915]
<4>[ 227.152295] RSP: 0018:ffff88005aad7b68 EFLAGS: 00010286
<4>[ 227.152300] RAX: 0000000000000026 RBX: ffff88005c359580 RCX: 0000000000000000
<4>[ 227.152304] RDX: 0000000000000026 RSI: ffffffff8707d840 RDI: ffffed000b55af63
<4>[ 227.152307] RBP: ffff880056817e58 R08: 0000000000000001 R09: 0000000000000000
<4>[ 227.152311] R10: ffff88005aad7b88 R11: 0000000000000000 R12: ffff8800568184d0
<4>[ 227.152314] R13: ffff880065b5ab08 R14: 0000000000000000 R15: dffffc0000000000
<4>[ 227.152318] FS: 0000000000000000(0000) GS:ffff88006ac40000(0000) knlGS:0000000000000000
<4>[ 227.152322] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
<4>[ 227.152325] CR2: 00007f5fb25550a8 CR3: 0000000068c78000 CR4: 00000000000006e0
<4>[ 227.152328] Call Trace:
<4>[ 227.152385] intel_cleanup_plane_fb+0x6b/0xd0 [i915]
<4>[ 227.152395] drm_atomic_helper_cleanup_planes+0x166/0x280
<4>[ 227.152452] intel_atomic_commit_tail+0x159d/0x3380 [i915]
<4>[ 227.152463] ? process_one_work+0x66e/0x1460
<4>[ 227.152516] ? skl_update_crtcs+0x9c0/0x9c0 [i915]
<4>[ 227.152523] ? lock_acquire+0x13d/0x390
<4>[ 227.152527] ? lock_acquire+0x13d/0x390
<4>[ 227.152534] process_one_work+0x71a/0x1460
<4>[ 227.152540] ? __schedule+0x815/0x1e20
<4>[ 227.152547] ? pwq_dec_nr_in_flight+0x2b0/0x2b0
<4>[ 227.152553] ? _raw_spin_lock_irq+0xa/0x40
<4>[ 227.152559] worker_thread+0xdf/0xf60
<4>[ 227.152569] ? process_one_work+0x1460/0x1460
<4>[ 227.152573] kthread+0x2cf/0x3c0
<4>[ 227.152578] ? _kthread_create_on_node+0xa0/0xa0
<4>[ 227.152583] ret_from_fork+0x3a/0x50
<4>[ 227.152591] Code: c6 00 11 86 c0 48 c7 c7 e0 bd 85 c0 e8 60 e7 a9 c4 0f ff e9 1f fe ff ff 48 c7 c6 40 10 86 c0 48 c7 c7 e0 ca 85 c0 e8 2b 95 bd c4 <0f> 0b 48 89 ef e8 4c 44 e8 c4 e9 ef fd ff ff e8 42 44 e8 c4 e9
<1>[ 227.152720] RIP: intel_unpin_fb_vma+0x23a/0x2a0 [i915] RSP: ffff88005aad7b68
v2: i915_vma_pin_fence() is a no-op if a fence isn't required, so check
vma->fence as well.
Signed-off-by: Chris Wilson <[email protected]>
Cc: Joonas Lahtinen <[email protected]>
Cc: Ville Syrjälä <[email protected]>
Reviewed-by: Ville Syrjälä <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
|
|
We cannot simply use !view as shorthand for all normal GGTT views as a
few callers will always populate a i915_ggtt_view struct and set the
type to NORMAL instead. So check for (!view || view->type == NORMAL)
inside i915_gem_object_ggtt_pin().
Signed-off-by: Chris Wilson <[email protected]>
Cc: Joonas Lahtinen <[email protected]>
Reviewed-by: Ville Syrjälä <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
|
|
WaDoubleCursorLP3Latency was meant for pre-production hardware.
Drop it.
Signed-off-by: Ville Syrjälä <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Reviewed-by: Mika Kahola <[email protected]>
|
|
i965 and g4x still have the pipe select bits in the plane control
registers, they're just hardcoded to select a specific pipe. However
plane C on i965 can still move between the pipes, thus we should
program the pipe select bits on i965 if we want to expose plane C
some day.
Since there is no harm in programming the bits on any plane on
i965/g4x let's just always set them. This will also make our
pre-computed register value match what the hardware register
would read, should we want to cross check the two.
Signed-off-by: Ville Syrjälä <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Reviewed-by: Mika Kahola <[email protected]>
|