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2023-04-05MIPS: mm: Remove unused *cache_page_indexed flush functionsThomas Bogendoerfer1-100/+0
The *cache_page_indexed flush functions are no (longer) used. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-04-05MIPS: generic: Enable all CPUs supported by virt board in KconfigJiaxun Yang1-0/+4
Enable extra CPUs that may be supported by virt board, including R4x00 (R4000 in QEMU), Cavium Octeon (Octeon68XX in QEMU), loongson2e, loongson2f. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-04-05MIPS: Add board config for virt boardJiaxun Yang1-0/+38
Aligned with QEMU MIPS virt board. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-04-05MIPS: Octeon: Disable CVMSEG by default on other platformsJiaxun Yang1-1/+2
QEMU can't emulate CVMSEG on generic platform for now. Just disable it by default. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-04-05MIPS: Loongson: Don't select platform features with CPUJiaxun Yang2-2/+3
ARCH_HAS_PHYS_TO_DMA and GPIOLIB are all platform level features they shouldn't be selected with CPU. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-04-05MIPS: Loongson: Move arch cflags to MIPS top level MakefileJiaxun Yang3-51/+38
Arch cflags should be independent to Platform. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-04-05MIPS: Octeon: Allow CVMSEG to be disabledJiaxun Yang2-1/+9
Don't include cvmseg states into thread_status when CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE is not defined or 0. Fix compile for kernel without this feature. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-04-05MIPS: c-octeon: Provide alternative SMP cache flush functionJiaxun Yang1-0/+5
Currently c-octeon relies on octeon's own smp function to flush I-Cache. However this function is not available on generic platform. Just use smp_call_function_many on generic platform. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-04-05MIPS: cpu-features: Enable octeon_cache by cpu_typeJiaxun Yang1-1/+18
cpu_has_octeon_cache was tied to 0 for generic cpu-features, whith this generic kernel built for octeon CPU won't boot. Just enable this flag by cpu_type. It won't hurt orther platforms because compiler will eliminate the code path on other processors. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-04-05MIPS: Octeon: Opt-out 4k_cache featureJiaxun Yang2-1/+3
Octeon has a different cache interface with traditional R4K one, just opt-out this flag for octeon to avoid run R4K cache initialization code accidentally. Also remove ISA level assumption for 4k cache. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-04-05MIPS: mips-cm: Check availability of config registersJiaxun Yang1-2/+7
Prevent reading unsupported config register during probing process. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-04-05MIPS: smp-cps: Disable coherence setup for unsupported ISAJiaxun Yang2-0/+10
We don't know how to do coherence setup on ISA before MIPS Release 1. As CPS support only servers simulation purpose on those cores, and simulators are always coherent, just disable initialization code and provide user a warning in case coherence is not setup properly. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-04-05MIPS: Move declaration of bcache ops to cache.cJiaxun Yang3-14/+21
bcache is not tied to CPU's cache interface. Just move those declaration to cache.c so it can be avaialble to CPU with all cache types. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-03-27MIPS: octeon: Fix compile errorThomas Bogendoerfer1-1/+1
Commit ed6a0b6e9fd7 ("MIPS: octeon: Use of_address_to_resource()") lost a cast, which causes a compile error. Fixes: ed6a0b6e9fd7 ("MIPS: octeon: Use of_address_to_resource()") Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-03-24MIPS: c-r4k: Always install dma flush functionsJiaxun Yang1-9/+3
As nowadays DMA coherence is managed per device, it is possible to have a system that is defaulted to coherent dma but still have noncoherent device that needs to use those flush functions. Just install them unconditionally. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-03-24MIPS: Always select ARCH_HAS_SYNC_DMA_FOR_CPU for noncoherent platformsJiaxun Yang1-8/+1
As now we are telling the necessity of post DMA flush per CPU type, there is no need to select ARCH_HAS_SYNC_DMA_FOR_CPU on per platform bias, just select it unconditionally and we can sort it at runtime. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-03-24MIPS: Always select ARCH_HAS_SETUP_DMA_OPSJiaxun Yang1-1/+1
arch_setup_dma_ops on MIPS sets coherency information in struct device. It's essential for per-device coherency to work. Select it for all non-coherent platforms. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-03-24MIPS: octeon: Use of_address_to_resource()Rob Herring1-20/+15
Replace of_get_address() and of_translate_address() calls with single call to of_address_to_resource(). Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-03-24mips: Remove obsolete configs IRQ_MSP_CIC and IRQ_MSP_SLPLukas Bulwahn1-6/+0
Commit 1b00767fd8e1 ("MIPS: Remove PMC MSP71xx platform") removes all uses of the config IRQ_MSP_CIC and IRQ_MSP_SLP. Remove these two obsolete configs IRQ_MSP_CIC and IRQ_MSP_SLP. Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-03-17MIPS: ath79: remove obsolete ATH79_DEV_* configsLukas Bulwahn1-16/+0
Commit 85b9686dae30 ("MIPS: ath79: drop platform device registration code") removes all files arch/mips/ath79/dev-*.[ch], adjusts the Makefile, but misses to adjust the Kconfig file. Hence, since then, the configs ATH79_DEV_* are really dead. Commit 3a77e0d75eed ("MIPS: ath79: drop machfiles") already removes all configs that select ATH79_DEV_* config. So at that point, they was not a way to enable them with a kernel build configuration. Remove these obsolete ATH79_DEV_* configs. Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-03-17MIPS: sibyte: Replace BCM1125H with SB1250 optionThomas Bogendoerfer2-12/+1
SIBYTE_BCM1125H is identical to SIBYTE_SB1250, so remove one of them. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-03-17MIPS: sibyte: Remove Sibyte CARMEL and CRHINE board supportThomas Bogendoerfer8-96/+1
Looks like these boards were nether in active use, so let's remove them. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-03-17MIPS: sibyte: Remove unused config option SIBYTE_BCM1x55Thomas Bogendoerfer8-30/+12
SIBYTE_BCM1x55 is not selected anywhere, so let's get rid of it. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-03-17MIPS: sibyte: remove no longer needed board_mem_regionThomas Bogendoerfer1-15/+0
With the direct use of memblock interface board_mem_region is no longer needed. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-03-14mips: Use of_property_read_bool() for boolean propertiesRob Herring2-2/+2
It is preferred to use typed property access functions (i.e. of_property_read_<type> functions) rather than low-level of_get_property/of_find_property functions for reading properties. Convert reading boolean properties to to of_property_read_bool(). Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-03-14mips: ralink: mt7620: introduce 'soc_device' initializationSergio Paracuellos2-0/+45
MT7620 SoCs have their own 'ralink_soc_info' structure with some information about the soc itself. In order to be able to retrieve this information from driver code and avoid architecture dependencies for retrieving these details introduce this 'soc_device'. Set 'data' pointer points to the struct 'ralink_soc_info' to be able to export also current soc information using this mechanism. We need to select 'SOC_BUS' in Kconfig configuration for these SoCs. Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-03-14mips: ralink: mt7620: soc queries and tests as functionsSergio Paracuellos1-22/+72
Move the SoC register value queries and tests to specific functions, to remove repetition of logic. No functional changes intended Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-03-14mips: ralink: mt7620: define MT7620_SYSC_BASE with __iomemSergio Paracuellos2-9/+9
So that MT7620_SYSC_BASE can be used later in multiple functions without needing to repeat this __iomem declaration each time Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-03-14mips: ralink: rt288x: introduce 'soc_device' initializationSergio Paracuellos2-0/+31
RT288X SoCs have their own 'ralink_soc_info' structure with some information about the soc itself. In order to be able to retrieve this information from driver code and avoid architecture dependencies for retrieving these details introduce this 'soc_device'. Set 'data' pointer points to the struct 'ralink_soc_info' to be able to export also current soc information using this mechanism. We need to select 'SOC_BUS' in Kconfig configuration for these SoCs. Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-03-14mips: ralink: rt288x: soc queries and tests as functionsSergio Paracuellos1-16/+47
Move the SoC register value queries and tests to specific functions, to remove repetition of logic. No functional changes intended Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-03-14mips: ralink: rt288x: define RT2880_SYSC_BASE with __iomemSergio Paracuellos2-5/+5
So that RT2880_SYSC_BASE can be used later in multiple functions without needing to repeat this __iomem declaration each time Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-03-14mips: ralink: rt3883: introduce 'soc_device' initializationSergio Paracuellos2-0/+30
RT3883 SoC have its own 'ralink_soc_info' structure with some information about the soc itself. In order to be able to retrieve this information from driver code and avoid architecture dependencies for retrieving these details introduce this 'soc_device'. Set 'data' pointer points to the struct 'ralink_soc_info' to be able to export also current soc information using this mechanism. We need to select 'SOC_BUS' in Kconfig configuration for these SoCs. Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-03-14mips: ralink: rt3883: soc queries and tests as functionsSergio Paracuellos1-16/+48
Move the SoC register value queries and tests to specific functions, to remove repetition of logic. No functional changes intended Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-03-14mips: ralink: rt3883: define RT3883_SYSC_BASE with __iomemSergio Paracuellos2-5/+6
So that RT3883_SYSC_BASE can be used later in multiple functions without needing to repeat this __iomem declaration each time Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-03-14mips: ralink: rt305x: introduce 'soc_device' initializationSergio Paracuellos2-0/+47
RT305x SoCs have their own 'ralink_soc_info' structure with some information about the soc itself. In order to be able to retrieve this information from driver code and avoid architecture dependencies for retrieving these details introduce this 'soc_device'. Set 'data' pointer points to the struct 'ralink_soc_info' to be able to export also current soc information using this mechanism. We need to select 'SOC_BUS' in Kconfig configuration for these SoCs. Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-03-14mips: ralink: rt305x: soc queries and tests as functionsSergio Paracuellos1-20/+77
Move the SoC register value queries and tests to specific functions, to remove repetition of logic. No functional changes intended Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-03-14mips: ralink: rt305x: define RT305X_SYSC_BASE with __iomemSergio Paracuellos2-6/+5
So that RT305X_SYSC_BASE can be used later in multiple functions without needing to repeat this __iomem declaration each time Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-03-14dt-bindings: mips: loongson: Add Loongson-1 based boardsKeguang Zhang2-0/+14
Add two Loongson-1 based boards: LSGZ 1B and Smartloong 1C. Signed-off-by: Keguang Zhang <keguang.zhang@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-03-14MIPS: Loongson64: Opt-out war_io_reorder_wmbJiaxun Yang1-1/+1
It is clearly stated on "Loongson 3A3000/3B3000 processor user manual vol 2" that "All access requests using a non-cached algorithm are executed in a blocking order. That is, before the current read request data is returned to the processor, all subsequent requests are blocked and issued; All subsequent requests are blocked until the write request data has been sent or the issued write request has not received a write reply from the final receiver." Which means uncached read/write is strongly ordered. So we won't need this workaround. This option was introduced when we add initial support for GS464E, it looks like a misinterpretation of another section in the manual saying we need barriers to ensure MMIO order against DMA requests. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-03-14MIPS: Loongson64: Remove CPU_HAS_WBJiaxun Yang2-16/+0
Q: Do we have really have write buffer A: Yes, on newer Loongson processors there is a "store fill buffer" that will collect *cached* writes, on all Loongson processors AXI crossbar will buffer all writes. Q: Then why do we want to remove CPU_HAS_WB? A: Because CPU_HAS_WB introduces wbflush, which intends to flush all write reuqests to mmio device. We won't be affected by store fill buffer because it won't buffer uncached writes. And a regular memory barrier is sufficient to flush crossbar write buffer. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-03-14MIPS: Loongson64: smp: Correct nudge_writes usageJiaxun Yang1-26/+12
Previously every write to SMP regisers are followed by nudge_writes, this incures a huge performance penalty because nudge_writes involves SYNC, which will be globalized on chip. Only set off nudge_writes when we really want other cores to see the result ASAP. Also replace read/write functions to relaxed version because we don't need extra barriers to protect against DMA. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-03-14MIPS: Loongson64: smp: Use nudge_writes instead of wbflushJiaxun Yang1-3/+3
wbflush here intends to let other cores see the results ASAP, nudge_writes fits this purpose better. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-03-14MIPS: Loongson64: Prefix ipi register address pointers with __iomemJiaxun Yang1-5/+5
They are truely mmio pointers, so give them proper prefix. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-03-14MIPS: BCM47XX: Add support for Huawei B593u-12Rafał Miłecki3-0/+10
It's a BCM5358 based home router. One of very few bcm47xx devices with cellular modems (here: LTE). Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-03-12Linux 6.3-rc2Linus Torvalds1-1/+1
2023-03-12wifi: cfg80211: Partial revert "wifi: cfg80211: Fix use after free for wext"Hector Martin1-2/+0
This reverts part of commit 015b8cc5e7c4 ("wifi: cfg80211: Fix use after free for wext") This commit broke WPA offload by unconditionally clearing the crypto modes for non-WEP connections. Drop that part of the patch. Signed-off-by: Hector Martin <marcan@marcan.st> Reported-by: Ilya <me@0upti.me> Reported-and-tested-by: Janne Grunau <j@jannau.net> Reviewed-by: Eric Curtin <ecurtin@redhat.com> Fixes: 015b8cc5e7c4 ("wifi: cfg80211: Fix use after free for wext") Cc: stable@kernel.org Link: https://lore.kernel.org/linux-wireless/ZAx0TWRBlGfv7pNl@kroah.com/T/#m11e6e0915ab8fa19ce8bc9695ab288c0fe018edf Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2023-03-12Merge tag 'tpm-v6.3-rc3' of ↵Linus Torvalds3-2/+137
git://git.kernel.org/pub/scm/linux/kernel/git/jarkko/linux-tpmdd Pull tpm fixes from Jarkko Sakkinen: "Two additional bug fixes for v6.3" * tag 'tpm-v6.3-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/jarkko/linux-tpmdd: tpm: disable hwrng for fTPM on some AMD designs tpm/eventlog: Don't abort tpm_read_log on faulty ACPI address
2023-03-12tpm: disable hwrng for fTPM on some AMD designsMario Limonciello2-1/+132
AMD has issued an advisory indicating that having fTPM enabled in BIOS can cause "stuttering" in the OS. This issue has been fixed in newer versions of the fTPM firmware, but it's up to system designers to decide whether to distribute it. This issue has existed for a while, but is more prevalent starting with kernel 6.1 because commit b006c439d58db ("hwrng: core - start hwrng kthread also for untrusted sources") started to use the fTPM for hwrng by default. However, all uses of /dev/hwrng result in unacceptable stuttering. So, simply disable registration of the defective hwrng when detecting these faulty fTPM versions. As this is caused by faulty firmware, it is plausible that such a problem could also be reproduced by other TPM interactions, but this hasn't been shown by any user's testing or reports. It is hypothesized to be triggered more frequently by the use of the RNG because userspace software will fetch random numbers regularly. Intentionally continue to register other TPM functionality so that users that rely upon PCR measurements or any storage of data will still have access to it. If it's found later that another TPM functionality is exacerbating this problem a module parameter it can be turned off entirely and a module parameter can be introduced to allow users who rely upon fTPM functionality to turn it on even though this problem is present. Link: https://www.amd.com/en/support/kb/faq/pa-410 Link: https://bugzilla.kernel.org/show_bug.cgi?id=216989 Link: https://lore.kernel.org/all/20230209153120.261904-1-Jason@zx2c4.com/ Fixes: b006c439d58d ("hwrng: core - start hwrng kthread also for untrusted sources") Cc: stable@vger.kernel.org Cc: Jarkko Sakkinen <jarkko@kernel.org> Cc: Thorsten Leemhuis <regressions@leemhuis.info> Cc: James Bottomley <James.Bottomley@hansenpartnership.com> Tested-by: reach622@mailcuk.com Tested-by: Bell <1138267643@qq.com> Co-developed-by: Jason A. Donenfeld <Jason@zx2c4.com> Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Jarkko Sakkinen <jarkko@kernel.org> Signed-off-by: Jarkko Sakkinen <jarkko@kernel.org>
2023-03-12tpm/eventlog: Don't abort tpm_read_log on faulty ACPI addressMorten Linderud1-1/+5
tpm_read_log_acpi() should return -ENODEV when no eventlog from the ACPI table is found. If the firmware vendor includes an invalid log address we are unable to map from the ACPI memory and tpm_read_log() returns -EIO which would abort discovery of the eventlog. Change the return value from -EIO to -ENODEV when acpi_os_map_iomem() fails to map the event log. The following hardware was used to test this issue: Framework Laptop (Pre-production) BIOS: INSYDE Corp, Revision: 3.2 TPM Device: NTC, Firmware Revision: 7.2 Dump of the faulty ACPI TPM2 table: [000h 0000 4] Signature : "TPM2" [Trusted Platform Module hardware interface Table] [004h 0004 4] Table Length : 0000004C [008h 0008 1] Revision : 04 [009h 0009 1] Checksum : 2B [00Ah 0010 6] Oem ID : "INSYDE" [010h 0016 8] Oem Table ID : "TGL-ULT" [018h 0024 4] Oem Revision : 00000002 [01Ch 0028 4] Asl Compiler ID : "ACPI" [020h 0032 4] Asl Compiler Revision : 00040000 [024h 0036 2] Platform Class : 0000 [026h 0038 2] Reserved : 0000 [028h 0040 8] Control Address : 0000000000000000 [030h 0048 4] Start Method : 06 [Memory Mapped I/O] [034h 0052 12] Method Parameters : 00 00 00 00 00 00 00 00 00 00 00 00 [040h 0064 4] Minimum Log Length : 00010000 [044h 0068 8] Log Address : 000000004053D000 Fixes: 0cf577a03f21 ("tpm: Fix handling of missing event log") Tested-by: Erkki Eilonen <erkki@bearmetal.eu> Signed-off-by: Morten Linderud <morten@linderud.pw> Reviewed-by: Jarkko Sakkinen <jarkko@kernel.org> Signed-off-by: Jarkko Sakkinen <jarkko@kernel.org>
2023-03-12Merge tag 'xfs-6.3-fixes-1' of git://git.kernel.org/pub/scm/fs/xfs/xfs-linuxLinus Torvalds2-21/+40
Pull xfs fixes from Darrick Wong: - Fix a crash if mount time quotacheck fails when there are inodes queued for garbage collection. - Fix an off by one error when discarding folios after writeback failure. * tag 'xfs-6.3-fixes-1' of git://git.kernel.org/pub/scm/fs/xfs/xfs-linux: xfs: fix off-by-one-block in xfs_discard_folio() xfs: quotacheck failure can race with background inode inactivation
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