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2023-06-05accel/habanalabs: fix bug in free scratchpad memoryMoti Haimovski1-2/+2
This commit fixes a bug in Gaudi2 when freeing the scratchpad memory in case software init fails. Signed-off-by: Moti Haimovski <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2023-06-05accel/habanalabs: remove commented code that won't be usedKoby Elbaz1-9/+0
Once it was decided that these security settings are to be done by FW rather than by the driver, there's no reason to keep them in the code. Signed-off-by: Koby Elbaz <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2023-06-05accel/habanalabs: allow user to modify EDMA RL registerRakesh Ughreja1-0/+1
EDMA transpose workload requires to signal for every activation. User FW sends all the dummy signals to RD_LBW_RATE_LIM_CFG, to save lbw bandwidth. We need the user to be able to access that register to configure it. Signed-off-by: Rakesh Ughreja <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2023-06-05accel/habanalabs: ignore false positive razwiTal Cohen1-16/+27
In Gaudi2 asic, PSOC RAZWI may cause in HBW or LBW. The address that caused the error is read from HW register and printed by the Driver. There are cases where the Driver receives an indication on PSOC RAZWI error but the address value is zero. In that case, the indication is a false positive. The Driver should not "count" a PSOC RAZWI event error when the caused the address is zeroed. Signed-off-by: Tal Cohen <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2023-06-05accel/habanalabs: remove variable gaudi_irq_nameTom Rix1-7/+0
gcc with W=1 reports drivers/accel/habanalabs/gaudi/gaudi.c:117:19: error: ‘gaudi_irq_name’ defined but not used [-Werror=unused-const-variable=] 117 | static const char gaudi_irq_name[GAUDI_MSI_ENTRIES][GAUDI_MAX_STRING_LEN] = { | ^~~~~~~~~~~~~~ This variable is not used so remove it. Signed-off-by: Tom Rix <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2023-06-05Merge drm/drm-next into drm-intel-gt-nextTvrtko Ursulin12517-377582/+632627
For conflict avoidance we need the following commit: c9a9f18d3ad8 drm/i915/huc: use const struct bus_type pointers Signed-off-by: Tvrtko Ursulin <[email protected]>
2023-06-05drm/i915/mtl: Reset only one lane in case of MFDMika Kahola1-16/+23
In case when only two or less transmit lanes are owned such as MFD (DP-alt with x2 lanes) we need to reset only one data lane (lane0). With only x2 lanes we don't need to poll for the phy current status on both data lanes since only the owned data lane will respond. v2: Find better naming for lanes and revise the commit message (Luca) Reviewed-by: Arun R Murthy <[email protected]> (v1) Signed-off-by: Mika Kahola <[email protected]> Reviewed-by: Luca Coelho <[email protected]> (v2) Signed-off-by: Jouni Högander <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-06-05drm/i915/gt: Add workaround 14016712196Tejas Upadhyay1-0/+38
For mtl, workaround suggests that, SW insert a dummy PIPE_CONTROL prior to PIPE_CONTROL which contains a post sync: Timestamp or Write Immediate. Bspec: 72197 V5: - Remove ret variable - Andi V4: - Update commit message, avoid returing cs - Andi/Matt V3: - Wrap dummy pipe control stuff in API - Andi V2: - Fix kernel test robot warnings Closes: https://lore.kernel.org/oe-kbuild-all/[email protected]/ Signed-off-by: Tejas Upadhyay <[email protected]> Reviewed-by: Andi Shyti <[email protected]> Reviewed-by: Andrzej Hajda <[email protected]> Signed-off-by: Andi Shyti <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-06-05drm/i915: Use 18 fast wake AUX sync lenJouni Högander1-1/+1
HW default for wake sync pulses is 18. 10 precharge and 8 preamble. There is no reason to change this especially as it is causing problems with certain eDP panels. v3: Change "Fixes:" commit v2: Remove "fast wake" repeat from subject Signed-off-by: Jouni Högander <[email protected]> Fixes: e1c71f8f9180 ("drm/i915: Fix fast wake AUX sync len") Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8475 Reviewed-by: Luca Coelho <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-06-04dt-bindings: display: msm: dp-controller: document SM8550 compatibleNeil Armstrong1-0/+1
The SM8550 & SM8350 SoC shares the same DP TX IP version, use the SM8350 compatible as fallback for SM8550. Acked-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Neil Armstrong <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/540552/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2023-06-04drm/msm/dp: Clean up pdev/dev duplication in dp_powerBjorn Andersson1-9/+7
The dp_power module keeps track of both the DP controller's struct platform_device and struct device - with the prior pulled out of the dp_parser module. Clean up the duplication by dropping the platform_device reference and just track the passed struct device. Signed-off-by: Bjorn Andersson <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/536939/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2023-06-04drm/msm/dp: Clean up logs dp_power moduleBjorn Andersson1-53/+9
The clk_bulk API already provides error messages indicating which specific clock in the request for which the operation failed, further more these errors are associated with the specific DisplayPort controller (rather than the shared drm_device). The additional error messages int he dp_power module does thereby not provide any benefit. While at it, none of the dp_power handles passed to these functions are dynamic in nature, so there should not be any need for runtime checking them. Drop these as well. Signed-off-by: Bjorn Andersson <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/536938/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2023-06-04drm/msm/dp: remove most of usbpd-related remainsDmitry Baryshkov10-190/+8
Remove most of remains of downstream usbpd code. Mainline kernel uses different approach for managing Type-C / USB-PD, so this remains unused. Signed-off-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Bjorn Andersson <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/538270/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2023-06-04drm/msm/dpu: simplify dpu_encoder_phys_wb_init()Dmitry Baryshkov1-8/+2
There is no need to assign a result to temp varable just to return it after a goto. Drop the temporary variable and goto and return the result directly. Reviewed-by: Abhinav Kumar <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> Tested-by: Abhinav Kumar <[email protected]> # sc7280 Patchwork: https://patchwork.freedesktop.org/patch/540639/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2023-06-04drm/msm/dpu: drop temp variable from dpu_encoder_phys_cmd_init()Dmitry Baryshkov1-3/+1
There is no need to assign a result to temp varable just to return it two lines below. Drop the temporary variable. Reviewed-by: Abhinav Kumar <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> Tested-by: Abhinav Kumar <[email protected]> # sc7280 Patchwork: https://patchwork.freedesktop.org/patch/540637/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2023-06-04drm/msm/dpu: call dpu_rm_get_intf() from dpu_encoder_get_intf()Dmitry Baryshkov1-12/+8
There is little sense to get intf index just to call dpu_rm_get_intf() on it. Move dpu_rm_get_intf() call to dpu_encoder_get_intf() function. Reviewed-by: Abhinav Kumar <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> Tested-by: Abhinav Kumar <[email protected]> # sc7280 Patchwork: https://patchwork.freedesktop.org/patch/540632/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2023-06-04drm/msm/dpu: inline dpu_encoder_get_wb()Dmitry Baryshkov1-22/+2
The function dpu_encoder_get_wb() returns controller_id if the corresponding WB is present in the catalog. We can inline this function and rely on dpu_rm_get_wb() returning NULL for indices for which the WB is not present on the device. Reviewed-by: Abhinav Kumar <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> Tested-by: Abhinav Kumar <[email protected]> # sc7280 Patchwork: https://patchwork.freedesktop.org/patch/540634/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2023-06-04drm/msm/dpu: drop duplicated intf/wb indices from encoder structsDmitry Baryshkov5-65/+47
Remove intf_idx and wb_idx fields from struct dpu_encoder_phys and struct dpu_enc_phys_init_params. Set the hw_intf and hw_wb directly and use them to get the instance index. Reviewed-by: Abhinav Kumar <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> Tested-by: Abhinav Kumar <[email protected]> # sc7280 Patchwork: https://patchwork.freedesktop.org/patch/540635/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2023-06-04drm/msm/dpu: separate common function to init physical encoderDmitry Baryshkov5-46/+37
Move common DPU physical encoder initialization code to the new function dpu_encoder_phys_init(). Reviewed-by: Abhinav Kumar <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> Tested-by: Abhinav Kumar <[email protected]> # sc7280 Patchwork: https://patchwork.freedesktop.org/patch/540630/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2023-06-04drm/msm/dpu: merge dpu_encoder_init() and dpu_encoder_setup()Dmitry Baryshkov3-100/+56
There is no reason to split the dpu_encoder interface into separate _init() and _setup() phases. Merge them into a single function. Reviewed-by: Abhinav Kumar <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> Tested-by: Abhinav Kumar <[email protected]> # sc7280 Patchwork: https://patchwork.freedesktop.org/patch/540628/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2023-06-04drm/msm/mdp5: Add MDP5 configuration for MSM8226Luca Weiss1-0/+82
Add the required config for the v1.1 MDP5 found on MSM8226. Reviewed-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Luca Weiss <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/540612/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2023-06-04dt-bindings: display/msm: qcom, mdp5: Add msm8226 compatibleLuca Weiss1-0/+1
Add the compatible for the MDP5 found on MSM8226. Acked-by: Conor Dooley <[email protected]> Signed-off-by: Luca Weiss <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/540614/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2023-06-04drm/msm/dsi: Add phy configuration for MSM8226Luca Weiss3-1/+101
MSM8226 uses a modified PLL lock sequence compared to MSM8974, which is based on the function dsi_pll_enable_seq_m in the msm-3.10 kernel. Worth noting that the msm-3.10 downstream kernel also will try other sequences in case this one doesn't work, but during testing it has shown that the _m sequence succeeds first time also: .pll_enable_seqs[0] = dsi_pll_enable_seq_m, .pll_enable_seqs[1] = dsi_pll_enable_seq_m, .pll_enable_seqs[2] = dsi_pll_enable_seq_d, .pll_enable_seqs[3] = dsi_pll_enable_seq_d, .pll_enable_seqs[4] = dsi_pll_enable_seq_f1, .pll_enable_seqs[5] = dsi_pll_enable_seq_c, .pll_enable_seqs[6] = dsi_pll_enable_seq_e, We may need to expand this in the future. Signed-off-by: Luca Weiss <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/540618/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2023-06-04drm/msm/dsi: Add configuration for MSM8226Luca Weiss2-0/+3
Add the config for the v1.0.2 DSI found on MSM8226. We can reuse existing bits from other revisions that are identical for v1.0.2. Reviewed-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Signed-off-by: Luca Weiss <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/540616/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2023-06-04dt-bindings: display/msm: dsi-controller-main: Add msm8226 compatibleLuca Weiss1-0/+2
Add the compatible for the DSI found on MSM8226. Acked-by: Conor Dooley <[email protected]> Signed-off-by: Luca Weiss <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/540613/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2023-06-04dt-bindings: msm: dsi-phy-28nm: Document msm8226 compatibleLuca Weiss2-1/+3
The MSM8226 SoC uses a slightly different 28nm dsi phy. Add a new compatible for it. And while we're at it, in the dsi-phy-28nm.yaml move the 8960 compatible to its correct place so its sorted alphabetically. Acked-by: Conor Dooley <[email protected]> Signed-off-by: Luca Weiss <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/540621/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2023-06-04drm/msm: Remove unnecessary (void*) conversionsSu Hui5-7/+7
Pointer variables of (void*) type do not require type cast. Signed-off-by: Su Hui <[email protected]> Reviewed-by: Abhinav Kumar <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/540599/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2023-06-04drm/msm/dpu: clean up dpu_kms_get_clk_rate() returnsDan Carpenter2-3/+3
Static analysis tools complain about the -EINVAL error code being stored in an unsigned variable. Let's change this to match the clk_get_rate() function which is type unsigned long and returns zero on error. Fixes: 25fdd5933e4c ("drm/msm: Add SDM845 DPU support") Signed-off-by: Dan Carpenter <[email protected]> Reviewed-by: Abhinav Kumar <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/539626/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2023-06-04drm/msm/dpu: Tear down DSC datapath on encoder cleanupKuogee Hsieh2-0/+46
Unset DSC_ACTIVE bit at dpu_hw_ctl_reset_intf_cfg_v1(), dpu_encoder_unprep_dsc() and dpu_encoder_dsc_pipe_clr() functions to tear down DSC data path if DSC data path was setup previous. Changes in V10: -- pass ctl directly instead of dpu_enc to dsc_pipe_cfg() -- move both dpu_encoder_unprep_dsc() and dpu_encoder_dsc_pipe_clr() to above phys_cleanup() Signed-off-by: Kuogee Hsieh <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Marijn Suijten <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/539515/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2023-06-04drm/msm/dpu: separate DSC flush update out of interfaceKuogee Hsieh3-8/+36
Currently DSC flushing happens during interface configuration at dpu_hw_ctl_intf_cfg_v1(). Separate DSC flush away from dpu_hw_ctl_intf_cfg_v1() by adding dpu_hw_ctl_update_pending_flush_dsc_v1() to handle both per-DSC engine and DSC flush bits at same time to make it consistent with the location of flush programming of other DPU sub-blocks. Changes in v10: -- rewording commit text -- pass ctl directly instead of dpu_enc to dsc_pipe_cfg() -- ctx->pending_dsc_flush_mask = 0; Changes in v11: -- add Fixes tag Changes in v12: -- move dsc parameter to next line at dpu_encoder_dsc_pipe_cfg() Changes in v14: -- Fixes tag had been move to 1st patch of this series Signed-off-by: Kuogee Hsieh <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Marijn Suijten <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/539506/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2023-06-04drm/msm/dpu: always clear every individual pending flush maskKuogee Hsieh1-0/+3
There are two tiers of pending flush control, top level and individual hardware block. Currently only the top level of flush mask is reset to 0 but the individual pending flush masks of particular hardware blocks are left at their previous values, eventually accumulating all possible bit values and typically flushing more than necessary. Reset all individual hardware block flush masks to 0 to avoid accidentally flushing them. Changes in V13: -- rewording commit text -- add an empty space line as suggested Changes in V14: -- add Fixes tag Fixes: 73bfb790ac78 ("msm:disp:dpu1: setup display datapath for SC7180 target") Signed-off-by: Kuogee Hsieh <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Marijn Suijten <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/539508/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2023-06-04drm/msm/dpu: Introduce PINGPONG_NONE to disconnect DSC from PINGPONGKuogee Hsieh3-9/+8
Disabling the crossbar mux between DSC and PINGPONG currently requires a bogus enum dpu_pingpong value to be passed when calling dsc_bind_pingpong_blk() with enable=false, even though the register value written is independent of the current PINGPONG block. Replace that `bool enable` parameter with a new PINGPONG_NONE dpu_pingpong flag that triggers the write of the "special" 0xF "crossbar disabled" value to the register instead. Changes in v4: -- more details to commit text Changes in v5: -- rewording commit text suggested by Marijn -- add DRM_DEBUG_KMS for DSC unbinding case Changes in v8: -- fix checkpatch warning Signed-off-by: Kuogee Hsieh <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Marijn Suijten <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/539505/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2023-06-04drm/msm/dpu: Guard PINGPONG DSC ops behind DPU_PINGPONG_DSC bitKuogee Hsieh1-3/+6
DPU < 7.0.0 has DPU_PINGPONG_DSC feature bit set to indicate it requires both dpu_hw_pp_setup_dsc() and dpu_hw_pp_dsc_{enable,disable}() to be executed to complete DSC configuration if DSC hardware block is present. Hence test DPU_PINGPONG_DSC feature bit and assign DSC related functions to the ops of PINGPONG block accordingly if DPU_PINGPONG_DSC bit is set. Changes in v6: -- split patches, this patch has function handles DPU_PINGPONG_DSC bit Changes in v9: -- the original code of assigning dsc related functions to the ops of pingpong block without testing the DPU_PINGPONG_DSC feature bit was restored back due to rebase error which defeat the purpose of this patch. Remove those error code. Changes in v10: -- change commit title -- correct texts at changes in v9 Changes in v12: -- fixed length too long at Changes in v9 Signed-off-by: Kuogee Hsieh <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Marijn Suijten <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/539504/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2023-06-04drm/msm/dpu: add DPU_PINGPONG_DSC feature bit for DPU < 7.0.0Kuogee Hsieh2-3/+5
DPU < 7.0.0 requires the PINGPONG block to be involved during DSC setting up. Since DPU >= 7.0.0, enabling and starting the DSC encoder engine was moved to INTF with the help of the flush mechanism. Add a DPU_PINGPONG_DSC feature bit to restrict the availability of dpu_hw_pp_setup_dsc() and dpu_hw_pp_dsc_{enable,disable}() on the PINGPONG block to DPU < 7.0.0 hardware, as the registers are not available on DPU 7.0.0 and higher anymore. Add DPU_PINGPONG_DSC to PINGPONG_SDM845_MASK, PINGPONG_SDM845_TE2_MASK and PINGPONG_SM8150_MASK which is used for all DPU < 7.0 chipsets. changes in v6: -- split patches and rearrange to keep catalog related files at this patch changes in v7: -- rewording commit text as suggested at review comments changes in v9: -- delete BIT(DPU_PINGPONG_DSC) from PINGPONG_SDM845_TE2_MASK changes in v10: -- correct order of commit text Signed-off-by: Kuogee Hsieh <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Marijn Suijten <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/539502/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2023-06-04drm/msm/dpu: set DSC flush bit correctly at MDP CTL flush registerKuogee Hsieh1-1/+1
The CTL_FLUSH register should be programmed with the 22th bit (DSC_IDX) to flush the DSC hardware blocks, not the literal value of 22 (which corresponds to flushing VIG1, VIG2 and RGB1 instead). Changes in V12: -- split this patch out of "separate DSC flush update out of interface" Changes in V13: -- rewording the commit text Changes in V14: -- drop 'DSC" from "The DSC CTL_FLUSH register" at commit text Fixes: 77f6da90487c ("drm/msm/disp/dpu1: Add DSC support in hw_ctl") Signed-off-by: Kuogee Hsieh <[email protected]> Reviewed-by: Marijn Suijten <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/539496/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2023-06-04drm/msm: Use struct fb_info.screen_bufferThomas Zimmermann1-3/+3
The fbdev framebuffer is in system memory. Store the address in the field 'screen_buffer'. Fixes the following sparse warning. ../drivers/gpu/drm/msm/msm_fbdev.c:124:26: warning: incorrect type in assignment (different address spaces) ../drivers/gpu/drm/msm/msm_fbdev.c:124:26: expected char [noderef] __iomem *screen_base ../drivers/gpu/drm/msm/msm_fbdev.c:124:26: got void * Signed-off-by: Thomas Zimmermann <[email protected]> Reviewed-by: Javier Martinez Canillas <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/538531/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2023-06-04drm/msm/dpu: drop (mostly) unused DPU_NAME_SIZE defineDmitry Baryshkov3-6/+2
This define is used only in one place, in dpu_encoder debugfs code. Inline the value and drop the define completely. Signed-off-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Marijn Suijten <[email protected]> Reviewed-by: Abhinav Kumar <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/538303/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2023-06-04drm/msm/dpu: drop dpu_encoder_phys_ops::late_register()Dmitry Baryshkov2-10/+0
This callback has been unused since the driver being added. Drop it now. Signed-off-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Marijn Suijten <[email protected]> Reviewed-by: Abhinav Kumar <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/538302/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2023-06-04drm/msm/dsi: use mult_frac for pclk_bpp calculationDmitry Baryshkov1-7/+4
Simplify calculations around pixel_clk_rate division. Replace common pattern of doing 64-bit multiplication and then a do_div() call with simpler mult_frac() invocation. Reviewed-by: Marijn Suijten <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/538273/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2023-06-04drm/msm/dsi: remove extra call to dsi_get_pclk_rate()Dmitry Baryshkov1-1/+1
In dsi_calc_clk_rate_v2() there is no need to call dsi_get_pclk_rate(). This function has just been called (from dsi_calc_pclk()) and its result is stored at msm_host->pixel_clk_rate. Use this variable directly. Reviewed-by: Marijn Suijten <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Jessica Zhang <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/538272/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2023-06-04drm/msm/dpu: use common helper for WB and SSPP QoS setupDmitry Baryshkov8-136/+100
Rework SSPP and WB code to use common helper for programming QoS settings. Reviewed-by: Jeykumar Sankaran <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/537912/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2023-06-04drm/msm/dpu: remove struct dpu_hw_pipe_qos_cfgDmitry Baryshkov3-26/+8
Now as the struct dpu_hw_pipe_qos_cfg consists of only one bool field, drop the structure and use corresponding bool directly. Reviewed-by: Jeykumar Sankaran <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/537918/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2023-06-04drm/msm/dpu: drop DPU_PLANE_QOS_PANIC_CTRLDmitry Baryshkov1-19/+8
This flag is always passed to _dpu_plane_set_qos_ctrl(), so drop it and remove corresponding conditions from the mentioned function. Reviewed-by: Jeykumar Sankaran <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/537916/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2023-06-04drm/msm/dpu: simplify qos_ctrl handlingDmitry Baryshkov3-31/+2
After removal of DPU_PLANE_QOS_VBLANK_CTRL, several fields of struct dpu_hw_pipe_qos_cfg are fixed to false/0. Drop them from the structure (and drop the corresponding code from the functions). The DPU_PLANE_QOS_VBLANK_AMORTIZE flag is also removed, since it is now a NOP. Reviewed-by: Jeykumar Sankaran <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/537909/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2023-06-04drm/msm/dpu: drop DPU_PLANE_QOS_VBLANK_CTRLDmitry Baryshkov3-22/+0
Drop support for DPU_PLANE_QOS_VBLANK_CTRL flag. It is not used both in upstream driver and in vendor SDE driver. Reviewed-by: Jeykumar Sankaran <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/537907/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2023-06-04drm/msm/dpu: rearrange QoS setting codeDmitry Baryshkov1-5/+7
Slightly rearrainge code in dpu_plane_sspp_update_pipe() to group QoS/LUT related functions. Reviewed-by: Jeykumar Sankaran <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/537906/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2023-06-04drm/msm/dpu: fix the condition for (not) applying QoS to CURSOR SSPPDmitry Baryshkov1-1/+2
The function dpu_plane_sspp_update_pipe() contains code to skip enabling the QoS and OT limitis for CURSOR pipes. However all DPU since sdm845 repurpose DMA SSPP for the cursor planes because they lack the real CURSOR SSPP. Fix the condition to actually check that the plane is CURSOR or not. Reviewed-by: Jeykumar Sankaran <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/537911/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2023-06-04drm/msm/dpu: simplify CDP programmingDmitry Baryshkov8-89/+45
Get rid of intermediatory configuration structure and defines. Pass the format and the enablement bit directly to the new helper. The WB_CDP_CNTL register ignores BIT(2), so we can write it for both SSPP and WB CDP settings. Reviewed-by: Jeykumar Sankaran <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/537910/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2023-06-04drm/msm/dpu: fix SSPP register definitionsDmitry Baryshkov1-32/+32
Reorder SSPP register definitions to sort them in the ascending order. Move register bitfields after the register definitions. Signed-off-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Jeykumar Sankaran <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/537903/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2023-06-03drm/virtio: Wait for each dma-fence of in-fence array individuallyDmitry Osipenko1-2/+18
Use dma-fence-unwrap API for waiting each dma-fence of the in-fence array individually. Sync file's in-fence array always has a non-matching fence context ID, which doesn't allow to skip waiting of fences with a matching context ID in a case of a merged sync file fence. Suggested-by: Rob Clark <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Tested-by: Pierre-Eric Pelloux-Prayer <[email protected]> Signed-off-by: Dmitry Osipenko <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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