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2010-10-24KVM: MMU: Track NX state in struct kvm_mmuJoerg Roedel3-3/+19
With Nested Paging emulation the NX state between the two MMU contexts may differ. To make sure that always the right fault error code is recorded this patch moves the NX state into struct kvm_mmu so that the code can distinguish between L1 and L2 NX state. Signed-off-by: Joerg Roedel <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-10-24KVM: MMU: Allow long mode shadows for legacy page tablesJoerg Roedel2-8/+53
Currently the KVM softmmu implementation can not shadow a 32 bit legacy or PAE page table with a long mode page table. This is a required feature for nested paging emulation because the nested page table must alway be in host format. So this patch implements the missing pieces to allow long mode page tables for page table types. Signed-off-by: Joerg Roedel <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-10-24KVM: MMU: Refactor mmu_alloc_roots functionJoerg Roedel1-22/+60
This patch factors out the direct-mapping paths of the mmu_alloc_roots function into a seperate function. This makes it a lot easier to avoid all the unnecessary checks done in the shadow path which may break when running direct. In fact, this patch already fixes a problem when running PAE guests on a PAE shadow page table. Signed-off-by: Joerg Roedel <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-10-24KVM: MMU: Introduce kvm_pdptr_read_mmuJoerg Roedel3-2/+9
This function is implemented to load the pdptr pointers of the currently running guest (l1 or l2 guest). Therefore it takes care about the current paging mode and can read pdptrs out of l2 guest physical memory. Signed-off-by: Joerg Roedel <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-10-24KVM: MMU: Add kvm_mmu parameter to load_pdptrs functionJoerg Roedel5-24/+27
This function need to be able to load the pdptrs from any mmu context currently in use. So change this function to take an kvm_mmu parameter to fit these needs. As a side effect this patch also moves the cached pdptrs from vcpu_arch into the kvm_mmu struct. Signed-off-by: Joerg Roedel <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-10-24KVM: X86: Propagate fetch faultsJoerg Roedel2-0/+7
KVM currently ignores fetch faults in the instruction emulator. With nested-npt we could have such faults. This patch adds the code to handle these. Signed-off-by: Joerg Roedel <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-10-24KVM: MMU: Propagate the right fault back to the guest after gva_to_gpaJoerg Roedel2-1/+18
This patch implements logic to make sure that either a page-fault/page-fault-vmexit or a nested-page-fault-vmexit is propagated back to the guest. Signed-off-by: Joerg Roedel <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-10-24KVM: MMU: Introduce init_kvm_nested_mmu()Joerg Roedel3-1/+54
This patch introduces the init_kvm_nested_mmu() function which is used to re-initialize the nested mmu when the l2 guest changes its paging mode. Signed-off-by: Joerg Roedel <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-10-24KVM: MMU: Introduce kvm_read_nested_guest_page()Joerg Roedel1-3/+16
This patch introduces the kvm_read_guest_page_x86 function which reads from the physical memory of the guest. If the guest is running in guest-mode itself with nested paging enabled it will read from the guest's guest physical memory instead. The patch also changes changes the code to use this function where it is necessary. Signed-off-by: Joerg Roedel <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-10-24KVM: MMU: Make walk_addr_generic capable for two-level walkingJoerg Roedel1-7/+23
This patch uses kvm_read_guest_page_tdp to make the walk_addr_generic functions suitable for two-level page table walking. Signed-off-by: Joerg Roedel <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-10-24KVM: X86: Add kvm_read_guest_page_mmu functionJoerg Roedel2-0/+26
This patch adds a function which can read from the guests physical memory or from the guest's guest physical memory. This will be used in the two-dimensional page table walker. Signed-off-by: Joerg Roedel <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-10-24KVM: MMU: Implement nested gva_to_gpa functionsJoerg Roedel4-0/+54
This patch adds the functions to do a nested l2_gva to l1_gpa page table walk. Signed-off-by: Joerg Roedel <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-10-24KVM: X86: Introduce pointer to mmu context used for gva_to_gpaJoerg Roedel3-12/+28
This patch introduces the walk_mmu pointer which points to the mmu-context currently used for gva_to_gpa translations. Signed-off-by: Joerg Roedel <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-10-24KVM: MMU: Add infrastructure for two-level page walkerJoerg Roedel3-0/+12
This patch introduces a mmu-callback to translate gpa addresses in the walk_addr code. This is later used to translate l2_gpa addresses into l1_gpa addresses. Signed-off-by: Joerg Roedel <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-10-24KVM: MMU: Introduce generic walk_addr functionJoerg Roedel1-8/+18
This is the first patch in the series towards a generic walk_addr implementation which could walk two-dimensional page tables in the end. In this first step the walk_addr function is renamed into walk_addr_generic which takes a mmu context as an additional parameter. Signed-off-by: Joerg Roedel <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-10-24KVM: MMU: Track page fault data in struct vcpuJoerg Roedel6-31/+38
This patch introduces a struct with two new fields in vcpu_arch for x86: * fault.address * fault.error_code This will be used to correctly propagate page faults back into the guest when we could have either an ordinary page fault or a nested page fault. In the case of a nested page fault the fault-address is different from the original address that should be walked. So we need to keep track about the real fault-address. Signed-off-by: Joerg Roedel <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-10-24KVM: MMU: Let is_rsvd_bits_set take mmu context instead of vcpuJoerg Roedel2-6/+7
This patch changes is_rsvd_bits_set() function prototype to take only a kvm_mmu context instead of a full vcpu. Signed-off-by: Joerg Roedel <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-10-24KVM: MMU: Introduce kvm_init_shadow_mmu helper functionJoerg Roedel2-25/+36
Some logic of the init_kvm_softmmu function is required to build the Nested Nested Paging context. So factor the required logic into a seperate function and export it. Also make the whole init path suitable for more than one mmu context. Signed-off-by: Joerg Roedel <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-10-24KVM: MMU: Introduce inject_page_fault function pointerJoerg Roedel2-1/+6
This patch introduces an inject_page_fault function pointer into struct kvm_mmu which will be used to inject a page fault. This will be used later when Nested Nested Paging is implemented. Signed-off-by: Joerg Roedel <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-10-24KVM: MMU: Introduce get_cr3 function pointerJoerg Roedel3-3/+11
This function pointer in the MMU context is required to implement Nested Nested Paging. Signed-off-by: Joerg Roedel <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-10-24KVM: X86: Introduce a tdp_set_cr3 functionJoerg Roedel4-10/+19
This patch introduces a special set_tdp_cr3 function pointer in kvm_x86_ops which is only used for tpd enabled mmu contexts. This allows to remove some hacks from svm code. Signed-off-by: Joerg Roedel <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-10-24KVM: MMU: Make set_cr3 a function pointer in kvm_mmuJoerg Roedel2-2/+5
This is necessary to implement Nested Nested Paging. As a side effect this allows some cleanups in the SVM nested paging code. Signed-off-by: Joerg Roedel <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-10-24KVM: MMU: Make tdp_enabled a mmu-context parameterJoerg Roedel2-8/+15
This patch changes the tdp_enabled flag from its global meaning to the mmu-context and renames it to direct_map there. This is necessary for Nested SVM with emulation of Nested Paging where we need an extra MMU context to shadow the Nested Nested Page Table. Signed-off-by: Joerg Roedel <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-10-24KVM: MMU: Check for root_level instead of long modeJoerg Roedel1-2/+2
The walk_addr function checks for !is_long_mode in its 64 bit version. But what is meant here is a check for pae paging. Change the condition to really check for pae paging so that it also works with nested nested paging. Signed-off-by: Joerg Roedel <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
2010-10-24KVM: x86: Emulate MSR_EBC_FREQUENCY_IDJes Sorensen1-0/+14
Some operating systems store data about the host processor at the time of installation, and when booted on a more uptodate cpu tries to read MSR_EBC_FREQUENCY_ID. This has been found with XP. Signed-off-by: Jes Sorensen <[email protected]> Reviewed-by: Juan Quintela <[email protected]> Signed-off-by: Marcelo Tosatti <[email protected]>
2010-10-24x86: Define MSR_EBC_FREQUENCY_IDJes Sorensen1-0/+1
Signed-off-by: Jes Sorensen <[email protected]> Signed-off-by: Marcelo Tosatti <[email protected]>
2010-10-24KVM: SVM: Clean up rip handling in vmrun emulationRoedel, Joerg1-4/+4
This patch changes the rip handling in the vmrun emulation path from using next_rip to the generic kvm register access functions. Signed-off-by: Joerg Roedel <[email protected]> Signed-off-by: Marcelo Tosatti <[email protected]>
2010-10-24KVM: SVM: Restore correct registers after sel_cr0 intercept emulationJoerg Roedel1-2/+31
This patch implements restoring of the correct rip, rsp, and rax after the svm emulation in KVM injected a selective_cr0 write intercept into the guest hypervisor. The problem was that the vmexit is emulated in the instruction emulation which later commits the registers right after the write-cr0 instruction. So the l1 guest will continue to run with the l2 rip, rsp and rax resulting in unpredictable behavior. This patch is not the final word, it is just an easy patch to fix the issue. The real fix will be done when the instruction emulator is made aware of nested virtualization. Until this is done this patch fixes the issue and provides an easy way to fix this in -stable too. Cc: [email protected] Signed-off-by: Joerg Roedel <[email protected]> Signed-off-by: Marcelo Tosatti <[email protected]>
2010-10-24KVM: MMU: Fix 32 bit legacy paging with NPTJoerg Roedel1-2/+6
This patch fixes 32 bit legacy paging with NPT enabled. The mmu_check_root call on the top-level of the loop causes root_gfn to take values (in the tdp_enabled path) which are outside of guest memory. So the mmu_check_root call fails at some point in the loop interation causing the guest to tiple-fault. This patch changes the mmu_check_root calls to the places where they are really necessary. As a side-effect it introduces a check for the root of a pae page table too. Signed-off-by: Joerg Roedel <[email protected]> Signed-off-by: Marcelo Tosatti <[email protected]>
2010-10-24KVM: PPC: Move of include to __KERNEL__ sectionAlexander Graf1-1/+2
We have to protect the include for linux/of.h by __KERNEL__ so it doesn't accidently get referenced outside. This patch fixes this and makes the tree compile again. Reported-by: Stephen Rothwell <[email protected]> Signed-off-by: Alexander Graf <[email protected]>
2010-10-24KVM: PPC: Add documentation for magic page enhancementsAlexander Graf1-0/+14
This documents how to detect additional features inside the magic page when a guest maps it. Signed-off-by: Alexander Graf <[email protected]>
2010-10-24KVM: PPC: Fix compile error in e500_tlb.cAlexander Graf1-1/+2
The e500_tlb.c file didn't compile for me due to the following error: arch/powerpc/kvm/e500_tlb.c: In function ‘kvmppc_e500_shadow_map’: arch/powerpc/kvm/e500_tlb.c:300: error: format ‘%lx’ expects type ‘long unsigned int’, but argument 2 has type ‘gfn_t’ So let's explicitly cast the argument to make printk happy. Signed-off-by: Alexander Graf <[email protected]>
2010-10-24KVM: PPC: e500_tlb: Fix a minor copy-paste tracing bugKyle Moffett1-2/+1
The kvmppc_e500_stlbe_invalidate() function was trying to pass too many parameters to trace_kvm_stlb_inval(). This appears to be a bad copy-paste from a call to trace_kvm_stlb_write(). Signed-off-by: Kyle Moffett <[email protected]> Signed-off-by: Alexander Graf <[email protected]>
2010-10-24KVM: PPC: Document KVM_INTERRUPT ioctlAlexander Graf1-2/+31
This adds some documentation for the KVM_INTERRUPT special cases that PowerPC now implements. Signed-off-by: Alexander Graf <[email protected]>
2010-10-24KVM: PPC: Implement level interrupts for BookEAlexander Graf2-3/+18
BookE also wants to support level based interrupts, so let's implement all the necessary logic there. We need to trick a bit here because the irqprios are 1:1 assigned to architecture defined values. But since there is some space left there, we can just pick a random one and move it later on - it's internal anyways. Signed-off-by: Alexander Graf <[email protected]>
2010-10-24KVM: PPC: Expose level based interrupt capAlexander Graf2-0/+2
Now that we have all the level interrupt magic in place, let's expose the capability to user space, so it can make use of it! Signed-off-by: Alexander Graf <[email protected]>
2010-10-24KVM: PPC: Implement Level interrupts on Book3SAlexander Graf3-4/+31
The current interrupt logic is just completely broken. We get a notification from user space, telling us that an interrupt is there. But then user space expects us that we just acknowledge an interrupt once we deliver it to the guest. This is not how real hardware works though. On real hardware, the interrupt controller pulls the external interrupt line until it gets notified that the interrupt was received. So in reality we have two events: pulling and letting go of the interrupt line. To maintain backwards compatibility, I added a new request for the pulling part. The letting go part was implemented earlier already. With this in place, we can now finally start guests that do not randomly stall and stop to work at random times. This patch implements above logic for Book3S. Signed-off-by: Alexander Graf <[email protected]>
2010-10-24KVM: PPC: Enable napping only for Book3s_64Alexander Graf1-0/+2
Before I incorrectly enabled napping also for BookE, which would result in needless dcache flushes. Since we only need to force enable napping on Book3s_64 because it doesn't go into MSR_POW otherwise, we can just #ifdef that code to this particular platform. Reported-by: Scott Wood <[email protected]> Signed-off-by: Alexander Graf <[email protected]>
2010-10-24KVM: PPC: allow ppc440gp to pass the compatibility checkHollis Blanchard1-1/+2
Match only the first part of cur_cpu_spec->platform. 440GP (the first 440 processor) is identified by the string "ppc440gp", while all later 440 processors use simply "ppc440". Signed-off-by: Hollis Blanchard <[email protected]> Signed-off-by: Alexander Graf <[email protected]>
2010-10-24KVM: PPC: fix compilation of "dump tlbs" debug functionHollis Blanchard1-0/+1
Missing local variable. Signed-off-by: Hollis Blanchard <[email protected]> Signed-off-by: Alexander Graf <[email protected]>
2010-10-24KVM: PPC: initialize IVORs in addition to IVPRHollis Blanchard1-2/+6
Developers can now tell at a glace the exact type of the premature interrupt, instead of just knowing that there was some premature interrupt. Signed-off-by: Hollis Blanchard <[email protected]> Signed-off-by: Alexander Graf <[email protected]>
2010-10-24KVM: PPC: Don't put MSR_POW in MSRAlexander Graf1-1/+5
On Book3S a mtmsr with the MSR_POW bit set indicates that the OS is in idle and only needs to be waked up on the next interrupt. Now, unfortunately we let that bit slip into the stored MSR value which is not what the real CPU does, so that we ended up executing code like this: r = mfmsr(); /* r containts MSR_POW */ mtmsr(r | MSR_EE); This obviously breaks, as we're going into idle mode in code sections that don't expect to be idling. This patch masks MSR_POW out of the stored MSR value on wakeup, making guests happy again. Signed-off-by: Alexander Graf <[email protected]>
2010-10-24KVM: PPC: Implement correct SID mapping on Book3s_32Alexander Graf3-32/+48
Up until now we were doing segment mappings wrong on Book3s_32. For Book3s_64 we were using a trick where we know that a single mmu_context gives us 16 bits of context ids. The mm system on Book3s_32 instead uses a clever algorithm to distribute VSIDs across the available range, so a context id really only gives us 16 available VSIDs. To keep at least a few guest processes in the SID shadow, let's map a number of contexts that we can use as VSID pool. This makes the code be actually correct and shouldn't hurt performance too much. Signed-off-by: Alexander Graf <[email protected]>
2010-10-24KVM: PPC: Force enable nap on KVMAlexander Graf1-0/+3
There are some heuristics in the PPC power management code that try to find out if the particular hardware we're running on supports proper power management or just hangs the machine when going into nap mode. Since we know that KVM is safe with nap, let's force enable it in the PV code once we're certain that we are on a KVM VM. Signed-off-by: Alexander Graf <[email protected]>
2010-10-24KVM: PPC: Make PV mtmsrd L=1 work with r30 and r31Alexander Graf2-5/+24
We had an arbitrary limitation in mtmsrd L=1 that kept us from using r30 and r31 as input registers. Let's get rid of that and get more potential speedups! Signed-off-by: Alexander Graf <[email protected]>
2010-10-24KVM: PPC: Update int_pending also on dequeueAlexander Graf1-0/+3
When having a decrementor interrupt pending, the dequeuing happens manually through an mtdec instruction. This instruction simply calls dequeue on that interrupt, so the int_pending hint doesn't get updated. This patch enables updating the int_pending hint also on dequeue, thus correctly enabling guests to stay in guest contexts more often. Signed-off-by: Alexander Graf <[email protected]>
2010-10-24KVM: PPC: Make PV mtmsr work with r30 and r31Alexander Graf2-16/+40
So far we've been restricting ourselves to r0-r29 as registers an mtmsr instruction could use. This was bad, as there are some code paths in Linux actually using r30. So let's instead handle all registers gracefully and get rid of that stupid limitation Signed-off-by: Alexander Graf <[email protected]>
2010-10-24KVM: PPC: Add mtsrin PV codeAlexander Graf4-0/+114
This is the guest side of the mtsr acceleration. Using this a guest can now call mtsrin with almost no overhead as long as it ensures that it only uses it with (MSR_IR|MSR_DR) == 0. Linux does that, so we're good. Signed-off-by: Alexander Graf <[email protected]>
2010-10-24KVM: PPC: Put segment registers in shared pageAlexander Graf5-12/+11
Now that the actual mtsr doesn't do anything anymore, we can move the sr contents over to the shared page, so a guest can directly read and write its sr contents from guest context. Signed-off-by: Alexander Graf <[email protected]>
2010-10-24KVM: PPC: Interpret SR registers on demandAlexander Graf3-48/+46
Right now we're examining the contents of Book3s_32's segment registers when the register is written and put the interpreted contents into a struct. There are two reasons this is bad. For starters, the struct has worse real-time performance, as it occupies more ram. But the more important part is that with segment registers being interpreted from their raw values, we can put them in the shared page, allowing guests to mess with them directly. This patch makes the internal representation of SRs be u32s. Signed-off-by: Alexander Graf <[email protected]>