Age | Commit message (Collapse) | Author | Files | Lines |
|
Signed-off-by: Avi Kivity <[email protected]>
Signed-off-by: Marcelo Tosatti <[email protected]>
|
|
This reverts commit f9808b7fd422b965cea52e05ba470e0a473c53d3.
After commit 'kvm: switch to apic_set_eoi_write, apic_write'
the stubs are no longer needed as kvm does not look at apicdrivers anymore.
Signed-off-by: Michael S. Tsirkin <[email protected]>
Signed-off-by: Avi Kivity <[email protected]>
|
|
Use apic_set_eoi_write, apic_write to avoid meedling in core apic
driver data structures directly.
Signed-off-by: Michael S. Tsirkin <[email protected]>
Signed-off-by: Avi Kivity <[email protected]>
|
|
KVM PV EOI optimization overrides eoi_write apic op with its own
version. Add an API for this to avoid meddling with core x86 apic driver
data structures directly.
For KVM use, we don't need any guarantees about when the switch to the
new op will take place, so it could in theory use this API after SMP init,
but it currently doesn't, and restricting callers to early init makes it
clear that it's safe as it won't race with actual APIC driver use.
Signed-off-by: Michael S. Tsirkin <[email protected]>
Acked-by: Ingo Molnar <[email protected]>
Signed-off-by: Avi Kivity <[email protected]>
|
|
ppc queue from Alex Graf:
* Prepare some of the booke code for 64 bit support
* BookE: Fix ESR flag in DSI
* BookE: Add rfci emulation
* 'for-upstream' of git://github.com/agraf/linux-2.6:
KVM: PPC: Critical interrupt emulation support
KVM: PPC: e500mc: Fix tlbilx emulation for 64-bit guests
KVM: PPC64: booke: Set interrupt computation mode for 64-bit host
KVM: PPC: bookehv: Add ESR flag to Data Storage Interrupt
KVM: PPC: bookehv64: Add support for std/ld emulation.
booke: Added crit/mc exception handler for e500v2
booke/bookehv: Add host crit-watchdog exception support
Signed-off-by: Avi Kivity <[email protected]>
|
|
This patch handles PCID/INVPCID for guests.
Process-context identifiers (PCIDs) are a facility by which a logical processor
may cache information for multiple linear-address spaces so that the processor
may retain cached information when software switches to a different linear
address space. Refer to section 4.10.1 in IA32 Intel Software Developer's Manual
Volume 3A for details.
For guests with EPT, the PCID feature is enabled and INVPCID behaves as running
natively.
For guests without EPT, the PCID feature is disabled and INVPCID triggers #UD.
Signed-off-by: Junjie Mao <[email protected]>
Signed-off-by: Avi Kivity <[email protected]>
|
|
While debugging I noticed that unlike all the other hypervisor code in the
kernel, kvm does not have an entry for x86_hyper which is used in
detect_hypervisor_platform() which results in a nice printk in the
syslog. This is only really a stub function but it
does make kvm more consistent with the other hypervisors.
Signed-off-by: Prarit Bhargava <[email protected]>
Cc: Avi Kivity <[email protected]>
Cc: Gleb Natapov <[email protected]>
Cc: Alex Williamson <[email protected]>
Cc: Konrad Rzeszutek Wilk <[email protected]>
Cc: Marcelo Tostatti <[email protected]>
Cc: [email protected]
Signed-off-by: Avi Kivity <[email protected]>
|
|
rfci instruction and CSRR0/1 registers are emulated.
Signed-off-by: Scott Wood <[email protected]>
Signed-off-by: Stuart Yoder <[email protected]>
Signed-off-by: Bharat Bhushan <[email protected]>
Signed-off-by: Alexander Graf <[email protected]>
|
|
tlbilxva emulation was using an u32 variable for guest effective address.
Replace it with gva_t type to handle 64-bit guests.
Signed-off-by: Mihai Caraman <[email protected]>
Signed-off-by: Alexander Graf <[email protected]>
|
|
64-bit host needs to remain in 64-bit mode when an exception take place.
Set interrupt computaion mode in EPCR register.
Signed-off-by: Mihai Caraman <[email protected]>
Signed-off-by: Alexander Graf <[email protected]>
|
|
ESR register is required by Data Storage Interrupt handling code.
Add the specific flag to the interrupt handler.
Signed-off-by: Mihai Caraman <[email protected]>
Signed-off-by: Alexander Graf <[email protected]>
|
|
Add support for std/ld emulation.
Signed-off-by: Varun Sethi <[email protected]>
Signed-off-by: Alexander Graf <[email protected]>
|
|
Watchdog is taken at critical exception level. So this patch
is tested with host watchdog exception happening when guest
is running.
Signed-off-by: Bharat Bhushan <[email protected]>
Signed-off-by: Alexander Graf <[email protected]>
|
|
Signed-off-by: Bharat Bhushan <[email protected]>
Signed-off-by: Alexander Graf <[email protected]>
|
|
Document fast page fault and mmu-lock in locking.txt
Signed-off-by: Xiao Guangrong <[email protected]>
Signed-off-by: Avi Kivity <[email protected]>
|
|
The P bit of page fault error code is missed in this tracepoint, fix it by
passing the full error code
Signed-off-by: Xiao Guangrong <[email protected]>
Signed-off-by: Avi Kivity <[email protected]>
|
|
To see what happen on this path and help us to optimize it
Signed-off-by: Xiao Guangrong <[email protected]>
Signed-off-by: Avi Kivity <[email protected]>
|
|
If the the present bit of page fault error code is set, it indicates
the shadow page is populated on all levels, it means what we do is
only modify the access bit which can be done out of mmu-lock
Currently, in order to simplify the code, we only fix the page fault
caused by write-protect on the fast path
Signed-off-by: Xiao Guangrong <[email protected]>
Signed-off-by: Avi Kivity <[email protected]>
|
|
This bit indicates whether the spte can be writable on MMU, that means
the corresponding gpte is writable and the corresponding gfn is not
protected by shadow page protection
In the later path, SPTE_MMU_WRITEABLE will indicates whether the spte
can be locklessly updated
Signed-off-by: Xiao Guangrong <[email protected]>
Signed-off-by: Avi Kivity <[email protected]>
|
|
mmu_spte_update() is the common function, we can easily audit the path
Signed-off-by: Xiao Guangrong <[email protected]>
Signed-off-by: Avi Kivity <[email protected]>
|
|
Export the present bit of page fault error code, the later patch
will use it
Signed-off-by: Xiao Guangrong <[email protected]>
Signed-off-by: Avi Kivity <[email protected]>
|
|
Use __drop_large_spte to cleanup this function and comment spte_write_protect
Signed-off-by: Xiao Guangrong <[email protected]>
Signed-off-by: Avi Kivity <[email protected]>
|
|
Introduce a common function to abstract spte write-protect to
cleanup the code
Signed-off-by: Xiao Guangrong <[email protected]>
Signed-off-by: Avi Kivity <[email protected]>
|
|
The reture value of __rmap_write_protect is either 1 or 0, use
true/false instead of these
Signed-off-by: Xiao Guangrong <[email protected]>
Signed-off-by: Avi Kivity <[email protected]>
|
|
Our emulation should be complete enough that we can emulate guests
while they are in big real mode, or in a mode transition that is not
virtualizable without unrestricted guest support.
Signed-off-by: Avi Kivity <[email protected]>
|
|
Opcode 0F 00 /3. Encountered during Windows XP secondary processor bringup.
Signed-off-by: Avi Kivity <[email protected]>
|
|
Guest software doesn't actually depend on it, but vmx will refuse us
entry if we don't. Set the bit in both the cached segment and memory,
just to be nice.
Signed-off-by: Avi Kivity <[email protected]>
|
|
Some operations want to modify the descriptor later on, so save the
address for future use.
Signed-off-by: Avi Kivity <[email protected]>
|
|
Opcode 0F 00 /2. Used by isolinux durign the protected mode transition.
Signed-off-by: Avi Kivity <[email protected]>
|
|
Opcodes 0F C8 - 0F CF.
Used by the SeaBIOS cdrom code (though not in big real mode).
Signed-off-by: Avi Kivity <[email protected]>
|
|
If instruction emulation fails, report it properly to userspace.
Signed-off-by: Avi Kivity <[email protected]>
|
|
Process the event, possibly injecting an interrupt, before continuing.
Signed-off-by: Avi Kivity <[email protected]>
|
|
Opcode C8.
Only ENTER with lexical nesting depth 0 is implemented, since others are
very rare. We'll fail emulation if nonzero lexical depth is used so data
is not corrupted.
Signed-off-by: Avi Kivity <[email protected]>
|
|
This allows us to reuse the code without populating ctxt->src and
overriding ctxt->op_bytes.
Signed-off-by: Avi Kivity <[email protected]>
|
|
Commit 2adb5ad9fe1 removed ByteOp from MOVZX/MOVSX, replacing them by
SrcMem8, but neglected to fix the dependency in the emulation code
on ByteOp. This caused the instruction not to have any effect in
some circumstances.
Fix by replacing the check for ByteOp with the equivalent src.op_bytes == 1.
Signed-off-by: Avi Kivity <[email protected]>
|
|
Opcode 9F.
Signed-off-by: Avi Kivity <[email protected]>
|
|
If we return early from an invalid guest state emulation loop, make
sure we return to it later if the guest state is still invalid.
Signed-off-by: Avi Kivity <[email protected]>
|
|
Checking EFLAGS.IF is incorrect as we might be in interrupt shadow. If
that is the case, the main loop will notice that and not inject the interrupt,
causing an endless loop.
Fix by using vmx_interrupt_allowed() to check if we can inject an interrupt
instead.
Signed-off-by: Avi Kivity <[email protected]>
|
|
Opcodes 0F 01 /0 and 0F 01 /1
Signed-off-by: Avi Kivity <[email protected]>
|
|
We correctly default to SS when BP is used as a base in 16-bit address mode,
but we don't do that for 32-bit mode.
Fix by adjusting the default to SS when either ESP or EBP is used as the base
register.
Signed-off-by: Avi Kivity <[email protected]>
|
|
memop is not initialized; this can lead to a two-byte operation
following a 4-byte operation to see garbage values. Usually
truncation fixes things fot us later on, but at least in one case
(call abs) it doesn't.
Fix by moving memop to the auto-initialized field area.
Signed-off-by: Avi Kivity <[email protected]>
|
|
Opcode c9; used by some variants of Windows during boot, in big real mode.
Signed-off-by: Avi Kivity <[email protected]>
|
|
Otherwise, if the guest ends up looping, we never exit the srcu critical
section, which causes synchronize_srcu() to hang.
Signed-off-by: Avi Kivity <[email protected]>
|
|
Some userspace (e.g. QEMU 1.1) munge the d and g bits of segment
descriptors, causing us not to recognize them as unusable segments
with emulate_invalid_guest_state=1. Relax the check by testing for
segment not present (a non-present segment cannot be usable).
Signed-off-by: Avi Kivity <[email protected]>
|
|
The operand size for these instructions is 8 bytes in long mode, even without
a REX prefix. Set it explicitly.
Triggered while booting Linux with emulate_invalid_guest_state=1.
Signed-off-by: Avi Kivity <[email protected]>
|
|
Null SS is valid in long mode; allow loading it.
Signed-off-by: Avi Kivity <[email protected]>
|
|
Opcode 0F A2.
Used by Linux during the mode change trampoline while in a state that is
not virtualizable on vmx without unrestricted_guest, so we need to emulate
it is emulate_invalid_guest_state=1.
Signed-off-by: Avi Kivity <[email protected]>
|
|
Instead of getting an exact leaf, follow the spec and fall back to the last
main leaf instead. This lets us easily emulate the cpuid instruction in the
emulator.
Signed-off-by: Avi Kivity <[email protected]>
|
|
Introduce kvm_cpuid() to perform the leaf limit check and calculate
register values, and let kvm_emulate_cpuid() just handle reading and
writing the registers from/to the vcpu. This allows us to reuse
kvm_cpuid() in a context where directly reading and writing registers
is not desired.
Signed-off-by: Avi Kivity <[email protected]>
|
|
In protected mode, the CPL is defined as the lower two bits of CS, as set by
the last far jump. But during the transition to protected mode, there is no
last far jump, so we need to return zero (the inherited real mode CPL).
Fix by reading CPL from the cache during the transition. This isn't 100%
correct since we don't set the CPL cache on a far jump, but since protected
mode transition will always jump to a segment with RPL=0, it will always
work.
Signed-off-by: Avi Kivity <[email protected]>
|