aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)AuthorFilesLines
2015-09-15cxl: Fix unbalanced pci_dev_get in cxl_probeDaniel Axtens1-2/+0
Currently the first thing we do in cxl_probe is to grab a reference on the pci device. Later on, we call device_register on our adapter. In our remove path, we call device_unregister, but we never call pci_dev_put. We therefore leak the device every time we do a reflash. device_register/unregister is sufficient to hold the reference. Therefore, drop the call to pci_dev_get. Here's why this is safe. The proposed cxl_probe(pdev) calls cxl_adapter_init: a) init calls cxl_adapter_alloc, which creates a struct cxl, conventionally called adapter. This struct contains a device entry, adapter->dev. b) init calls cxl_configure_adapter, where we set adapter->dev.parent = &dev->dev (here dev is the pci dev) So at this point, the cxl adapter's device's parent is the PCI device that I want to be refcounted properly. c) init calls cxl_register_adapter *) cxl_register_adapter calls device_register(&adapter->dev) So now we're in device_register, where dev is the adapter device, and we want to know if the PCI device is safe after we return. device_register(&adapter->dev) calls device_initialize() and then device_add(). device_add() does a get_device(). device_add() also explicitly grabs the device's parent, and calls get_device() on it: parent = get_device(dev->parent); So therefore, device_register() takes a lock on the parent PCI dev, which is what pci_dev_get() was guarding. pci_dev_get() can therefore be safely removed. Fixes: f204e0b8cedd ("cxl: Driver code for powernv PCIe based cards for userspace access") Cc: [email protected] Signed-off-by: Daniel Axtens <[email protected]> Acked-by: Ian Munsie <[email protected]> Signed-off-by: Michael Ellerman <[email protected]>
2015-09-15locking/static_keys: Fix up the static keys documentationJonathan Corbet2-8/+6
Fix a few small mistakes in the static key documentation and delete an unneeded sentence. Suggested-by: Jason Baron <[email protected]> Signed-off-by: Jonathan Corbet <[email protected]> Cc: Linus Torvalds <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Thomas Gleixner <[email protected]> Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Ingo Molnar <[email protected]>
2015-09-14Merge tag 'clk-fixes-for-linus' of ↵Linus Torvalds4-4/+17
git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk fixes from Stephen Boyd: "A couple build fixes for drivers introduced in the merge window and a handful of patches to add more critical clocks on rockchip SoCs that are affected by newly introduced gpio clock handling" * tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: clk: rockchip: Add pclk_peri to critical clocks on RK3066/RK3188 clk: rockchip: add pclk_cpu to the list of rk3188 critical clocks clk: rockchip: handle critical clocks after registering all clocks clk: Hi6220: separately build stub clock driver clk: h8s2678: Fix compile error
2015-09-14clk: rockchip: add critical clock for rk3368Heiko Stübner1-0/+6
Again a result of the gpio-clock-liberation the rk3368 needs the pclk_pd_pmu marked as critical, to boot successfully. Reported-by: Mark Rutland <[email protected]> Signed-off-by: Heiko Stuebner <[email protected]> Tested-by: Mark Rutland <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-09-14Merge branch 'for-next' of git://git.samba.org/sfrench/cifs-2.6Linus Torvalds2-1/+10
Pull CIFS fixes from Steve French: "Two small cifs fixes" * 'for-next' of git://git.samba.org/sfrench/cifs-2.6: [CIFS] mount option sec=none not displayed properly in /proc/mounts CIFS: fix type confusion in copy offload ioctl
2015-09-14Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-armLinus Torvalds8-9/+32
Pull ARM fixes from Russell King: "A number of fixes for the merge window, fixing a number of cases missed when testing the uaccess code, particularly cases which only show up with certain compiler versions" * 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: ARM: 8431/1: fix alignement of __bug_table section entries arm/xen: Enable user access to the kernel before issuing a privcmd call ARM: domains: add memory dependencies to get_domain/set_domain ARM: domains: thread_info.h no longer needs asm/domains.h ARM: uaccess: fix undefined instruction on ARMv7M/noMMU ARM: uaccess: remove unneeded uaccess_save_and_disable macro ARM: swpan: fix nwfpe for uaccess changes ARM: 8429/1: disable GCC SRA optimization
2015-09-14perf top: Fix segfault pressing -> with no hist entriesWang Nan1-1/+11
'perf top' segfaults with following operation: # perf top -e page-faults -p 11400 # 11400 never generates page-fault Then on the resulting empty interface, press right key: # ./perf top -e page-faults -p 11400 perf: Segmentation fault -------- backtrace -------- ./perf[0x535428] /lib64/libc.so.6(+0x3545f)[0x7f0dd360745f] ./perf[0x531d46] ./perf(perf_evlist__tui_browse_hists+0x96)[0x5340d6] ./perf[0x44ba2f] /lib64/libpthread.so.0(+0x81d0)[0x7f0dd49dc1d0] /lib64/libc.so.6(clone+0x6c)[0x7f0dd36b90dc] The bug resides in perf_evsel__hists_browse() that, in the above circumstance browser->selection can be NULL, but code after skip_annotation doesn't consider it. This patch fix it by checking browser->selection before fetching browser->selection->map. Signed-off-by: Wang Nan <[email protected]> Tested-by: Arnaldo Carvalho de Melo <[email protected]> Cc: Namhyung Kim <[email protected]> Cc: Zefan Li <[email protected]> Cc: [email protected] Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
2015-09-14KVM: make the declaration of functions within 80 charactersWei Yang1-2/+2
After 'commit 0b8ba4a2b658 ("KVM: fix checkpatch.pl errors in kvm/coalesced_mmio.h")', the declaration of the two function will exceed 80 characters. This patch reduces the TAPs to make each line in 80 characters. Signed-off-by: Wei Yang <[email protected]> Signed-off-by: Paolo Bonzini <[email protected]>
2015-09-14x86/apic: Serialize LVTT and TSC_DEADLINE writesShaohua Li1-0/+7
The APIC LVTT register is MMIO mapped but the TSC_DEADLINE register is an MSR. The write to the TSC_DEADLINE MSR is not serializing, so it's not guaranteed that the write to LVTT has reached the APIC before the TSC_DEADLINE MSR is written. In such a case the write to the MSR is ignored and as a consequence the local timer interrupt never fires. The SDM decribes this issue for xAPIC and x2APIC modes. The serialization methods recommended by the SDM differ. xAPIC: "1. Memory-mapped write to LVT Timer Register, setting bits 18:17 to 10b. 2. WRMSR to the IA32_TSC_DEADLINE MSR a value much larger than current time-stamp counter. 3. If RDMSR of the IA32_TSC_DEADLINE MSR returns zero, go to step 2. 4. WRMSR to the IA32_TSC_DEADLINE MSR the desired deadline." x2APIC: "To allow for efficient access to the APIC registers in x2APIC mode, the serializing semantics of WRMSR are relaxed when writing to the APIC registers. Thus, system software should not use 'WRMSR to APIC registers in x2APIC mode' as a serializing instruction. Read and write accesses to the APIC registers will occur in program order. A WRMSR to an APIC register may complete before all preceding stores are globally visible; software can prevent this by inserting a serializing instruction, an SFENCE, or an MFENCE before the WRMSR." The xAPIC method is to just wait for the memory mapped write to hit the LVTT by checking whether the MSR write has reached the hardware. There is no reason why a proper MFENCE after the memory mapped write would not do the same. Andi Kleen confirmed that MFENCE is sufficient for the xAPIC case as well. Issue MFENCE before writing to the TSC_DEADLINE MSR. This can be done unconditionally as all CPUs which have TSC_DEADLINE also have MFENCE support. [ tglx: Massaged the changelog ] Signed-off-by: Shaohua Li <[email protected]> Reviewed-by: Ingo Molnar <[email protected]> Cc: <[email protected]> Cc: <[email protected]> Cc: <[email protected]> Cc: Andi Kleen <[email protected]> Cc: H. Peter Anvin <[email protected]> Cc: [email protected] #v3.7+ Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Thomas Gleixner <[email protected]>
2015-09-14x86/ioapic: Force affinity setting in setup_ioapic_dest()Thomas Gleixner1-2/+3
The recent ioapic cleanups changed the affinity setting in setup_ioapic_dest() from a direct write to the hardware to the delayed affinity setup via irq_set_affinity(). That results in a warning from chained_irq_exit(): WARNING: CPU: 0 PID: 5 at kernel/irq/migration.c:32 irq_move_masked_irq [<ffffffff810a0a88>] irq_move_masked_irq+0xb8/0xc0 [<ffffffff8103c161>] ioapic_ack_level+0x111/0x130 [<ffffffff812bbfe8>] intel_gpio_irq_handler+0x148/0x1c0 The reason is that irq_set_affinity() does not write directly to the hardware. It marks the affinity setting as pending and executes it from the next interrupt. The chained handler infrastructure does not take the irq descriptor lock for performance reasons because such a chained interrupt is not visible to any interfaces. So the delayed affinity setting triggers the warning in irq_move_masked_irq(). Restore the old behaviour by calling the set_affinity function of the ioapic chip in setup_ioapic_dest(). This is safe as none of the interrupts can be on the fly at this point. Fixes: aa5cb97f14a2 'x86/irq: Remove x86_io_apic_ops.set_affinity and related interfaces' Reported-and-tested-by: Mika Westerberg <[email protected]> Signed-off-by: Thomas Gleixner <[email protected]> Cc: Jiang Liu <[email protected]> Cc: [email protected]
2015-09-14KVM: arm64: add workaround for Cortex-A57 erratum #852523Will Deacon1-1/+3
When restoring the system register state for an AArch32 guest at EL2, writes to DACR32_EL2 may not be correctly synchronised by Cortex-A57, which can lead to the guest effectively running with junk in the DACR and running into unexpected domain faults. This patch works around the issue by re-ordering our restoration of the AArch32 register aliases so that they happen before the AArch64 system registers. Ensuring that the registers are restored in this order guarantees that they will be correctly synchronised by the core. Cc: <[email protected]> Reviewed-by: Marc Zyngier <[email protected]> Signed-off-by: Will Deacon <[email protected]> Signed-off-by: Marc Zyngier <[email protected]>
2015-09-14Merge tag 'kvm-arm-for-4.3-rc2' of ↵Paolo Bonzini4-23/+49
git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into kvm-master KVM/ARM changes for 4.3-rc2 - Fix timer interrupt injection after the rework that went in during the merge window - Reset the timer to zero on reboot - Make sure the TCR_EL2 RES1 bits are really set to 1 - Fix a PSCI affinity bug for non-existing vcpus
2015-09-14KVM: fix polling for guest halt continued even if disable itWanpeng Li1-1/+2
If there is already some polling ongoing, it's impossible to disable the polling, since as soon as somebody sets halt_poll_ns to 0, polling will never stop, as grow and shrink are only handled if halt_poll_ns is != 0. This patch fix it by reset vcpu->halt_poll_ns in order to stop polling when polling is disabled. Reported-by: Christian Borntraeger <[email protected]> Signed-off-by: Wanpeng Li <[email protected]> Signed-off-by: Paolo Bonzini <[email protected]>
2015-09-14x86/paravirt: Remove the unused pv_time_ops::get_tsc_khz methodJuergen Gross1-1/+0
It's not used anywhere. Signed-off-by: Juergen Gross <[email protected]> Acked-by: Rusty Russell <[email protected]> Cc: Andy Lutomirski <[email protected]> Cc: Borislav Petkov <[email protected]> Cc: Brian Gerst <[email protected]> Cc: Denys Vlasenko <[email protected]> Cc: H. Peter Anvin <[email protected]> Cc: Linus Torvalds <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Thomas Gleixner <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Ingo Molnar <[email protected]>
2015-09-14arm64: pgtable: use a single bit for PTE_WRITE regardless of DBMWill Deacon1-5/+1
Depending on CONFIG_ARM64_HW_AFDBM, we use either bit 57 or 51 of the pte to represent PTE_WRITE. Given that bit 51 is reserved prior to ARMv8.1, we can just use that bit regardless of the config option. That also matches what happens if a kernel configured with ARM64_HW_AFDBM=y is run on a CPU without the DBM functionality. Cc: Julien Grall <[email protected]> Tested-by: Julien Grall <[email protected]> Signed-off-by: Will Deacon <[email protected]>
2015-09-14arm64: Fix pte_modify() to preserve the hardware dirty informationCatalin Marinas1-1/+1
The pte_modify() function with hardware AF/DBM enabled must transfer the hardware dirty information to the software PTE_DIRTY bit. However, it was setting this bit in newprot and the mask does not cover such bit. This patch sets PTE_DIRTY on the original pte which will be preserved in the returned value. Fixes: 2f4b829c625e ("arm64: Add support for hardware updates of the access and dirty pte bits") Cc: Julien Grall <[email protected]> Tested-by: Julien Grall <[email protected]> Tested-by: Will Deacon <[email protected]> Signed-off-by: Catalin Marinas <[email protected]> Signed-off-by: Will Deacon <[email protected]>
2015-09-14arm64: Fix the pte_hw_dirty() check when AF/DBM is enabledCatalin Marinas1-2/+2
Commit 2f4b829c625e ("arm64: Add support for hardware updates of the access and dirty pte bits") introduced support for handling hardware updates of the access flag and dirty status. The PTE is automatically dirtied in hardware (if supported) by clearing the PTE_RDONLY bit when the PTE_DBM/PTE_WRITE bit is set. The pte_hw_dirty() macro was added to detect a hardware dirtied pte. The pte_dirty() macro checks for both software PTE_DIRTY and pte_hw_dirty(). Functions like pte_modify() clear the PTE_RDONLY bit since it is meant to be set in set_pte_at() when written to memory. In such cases, pte_hw_dirty() would return true even though such pte is clean. This patch changes pte_hw_dirty() to test the PTE_DBM/PTE_WRITE bit together with PTE_RDONLY. Fixes: 2f4b829c625e ("arm64: Add support for hardware updates of the access and dirty pte bits") Reported-by: Julien Grall <[email protected]> Tested-by: Julien Grall <[email protected]> Tested-by: Will Deacon <[email protected]> Signed-off-by: Catalin Marinas <[email protected]> Signed-off-by: Will Deacon <[email protected]>
2015-09-14arm64: dma-mapping: check whether cma area is initialized or notJisheng Zhang1-1/+1
If CMA is turned on and CMA size is set to zero, kernel should behave as if CMA was not enabled at compile time. Every dma allocation should check existence of cma area before requesting memory. Arm has done this by commit e464ef16c4f0 ("arm: dma-mapping: add checking cma area initialized"), also do this for arm64. Acked-by: Catalin Marinas <[email protected]> Signed-off-by: Jisheng Zhang <[email protected]> Signed-off-by: Will Deacon <[email protected]>
2015-09-14x86/ldt: Fix small LDT allocation for XenJan Beulich1-2/+2
While the following commit: 37868fe113 ("x86/ldt: Make modify_ldt synchronous") added a nice comment explaining that Xen needs page-aligned whole page chunks for guest descriptor tables, it then nevertheless used kzalloc() on the small size path. As I'm unaware of guarantees for kmalloc(PAGE_SIZE, ) to return page-aligned memory blocks, I believe this needs to be switched back to __get_free_page() (or better get_zeroed_page()). Signed-off-by: Jan Beulich <[email protected]> Cc: Andy Lutomirski <[email protected]> Cc: Andy Lutomirski <[email protected]> Cc: Boris Ostrovsky <[email protected]> Cc: Borislav Petkov <[email protected]> Cc: Brian Gerst <[email protected]> Cc: David Vrabel <[email protected]> Cc: Denys Vlasenko <[email protected]> Cc: H. Peter Anvin <[email protected]> Cc: Konrad Rzeszutek Wilk <[email protected]> Cc: Linus Torvalds <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Thomas Gleixner <[email protected]> Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Ingo Molnar <[email protected]>
2015-09-14clockevents: Remove unused set_mode() callbackViresh Kumar4-96/+30
All users are migrated to the per-state callbacks, get rid of the unused interface and the core support code. Signed-off-by: Viresh Kumar <[email protected]> Signed-off-by: Thomas Gleixner <[email protected]> Cc: [email protected] Cc: John Stultz <[email protected]> Cc: Peter Zijlstra <[email protected]> Link: http://lkml.kernel.org/r/fd60de14cf6d125489c031207567bb255ad946f6.1441943991.git.viresh.kumar@linaro.org Signed-off-by: Ingo Molnar <[email protected]>
2015-09-14x86/vm86: Fix the misleading CONFIG_VM86 Kconfig help textIngo Molnar1-11/+12
The CONFIG_VM86 Kconfig help text is actively misleading, so fix it: - Don't mark it 'obsolete' in the text as we'll support the ABI as long as CPUs support it. - Qualify the part about software emulation and mention that for some apps you want a real vm86 mode. - Don't scare users away from the option, instead explain what it does. Reported-by: Stas Sergeev <[email protected]> Cc: Andy Lutomirski <[email protected]> Cc: Arjan van de Ven <[email protected]> Cc: Austin S Hemmelgarn <[email protected]> Cc: Borislav Petkov <[email protected]> Cc: Brian Gerst <[email protected]> Cc: Josh Boyer <[email protected]> Cc: Kees Cook <[email protected]> Cc: Linus Torvalds <[email protected]> Cc: Matthew Garrett <[email protected]> Cc: Oleg Nesterov <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Thomas Gleixner <[email protected]> Cc: [email protected] Signed-off-by: Ingo Molnar <[email protected]>
2015-09-14soc: dove: Prepare irq handler for irq argument removalThomas Gleixner1-1/+1
The irq argument of most interrupt flow handlers is unused or merily used instead of a local variable. The handlers which need the irq argument can retrieve the irq number from the irq descriptor. Search and update was done with coccinelle and the invaluable help of Julia Lawall. Signed-off-by: Thomas Gleixner <[email protected]> Cc: Julia Lawall <[email protected]> Cc: Jiang Liu <[email protected]> Cc: Gregory CLEMENT <[email protected]>
2015-09-14soc: dove: Use irq_desc_get_xxx() to avoid redundant lookup of irq_descThomas Gleixner1-1/+1
Search and replace done with coccinelle Signed-off-by: Thomas Gleixner <[email protected]> Cc: Julia Lawall <[email protected]> Cc: Jiang Liu <[email protected]>
2015-09-14powerpc/cell: Prepare irq handler for irq argument removalThomas Gleixner1-1/+2
The irq argument of most interrupt flow handlers is unused or merily used instead of a local variable. The handlers which need the irq argument can retrieve the irq number from the irq descriptor. Search and update was done with coccinelle and the invaluable help of Julia Lawall. Signed-off-by: Thomas Gleixner <[email protected]> Cc: Julia Lawall <[email protected]> Cc: Jiang Liu <[email protected]> Cc: Arnd Bergmann <[email protected]> Cc: [email protected]
2015-09-14powerpc/85xx: Prepare irq handlers for irq argument removalThomas Gleixner2-2/+4
The irq argument of most interrupt flow handlers is unused or merily used instead of a local variable. The handlers which need the irq argument can retrieve the irq number from the irq descriptor. Search and update was done with coccinelle and the invaluable help of Julia Lawall. Signed-off-by: Thomas Gleixner <[email protected]> Cc: Julia Lawall <[email protected]> Cc: Jiang Liu <[email protected]> Cc: Scott Wood <[email protected]> Cc: [email protected]
2015-09-14powerpc/mpc5121_ads_cpld: Prepare irq handler for irq argument removalThomas Gleixner1-1/+3
The irq argument of most interrupt flow handlers is unused or merily used instead of a local variable. The handlers which need the irq argument can retrieve the irq number from the irq descriptor. Search and update was done with coccinelle and the invaluable help of Julia Lawall. Signed-off-by: Thomas Gleixner <[email protected]> Cc: Julia Lawall <[email protected]> Cc: Jiang Liu <[email protected]> Cc: Anatolij Gustschin <[email protected]> Cc: [email protected]
2015-09-14Merge tag 'perf-urgent-for-mingo' of ↵Ingo Molnar1-2/+2
git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux into perf/urgent Pull perf/urgent fix from Arnaldo Carvalho de Melo: - The values of _SC_NPROCESSORS_CONF and _SC_NPROCESSORS_ONLN (sysconf(3)) were being read from perf.data files in the inverse order they are written, fix it. (Arnaldo Carvalho de Melo) Signed-off-by: Arnaldo Carvalho de Melo <[email protected]> Signed-off-by: Ingo Molnar <[email protected]>
2015-09-14pinctrl: samsung: s3c24xx: fix syntax errorLinus Walleij1-1/+1
?SYNTAX ERROR irq_desc_get_irq_chip() does not exist. It should be irq_desc_get_chip(). Tested by compiling s3c2410_defconfig. Cc: Thomas Gleixner <[email protected]> Reported-by: Paul Gortmaker <[email protected]> Signed-off-by: Linus Walleij <[email protected]>
2015-09-14pinctrl: core: Warn about NULL gpio_chip in pinctrl_ready_for_gpio_range()Tony Lindgren1-0/+3
If the gpio driver is confused about the numbers for gpio-ranges, pinctrl_ready_for_gpio_range() may get called with invalid GPIO causing a NULL pointer exception. Let's instead provide a warning that allows fixing the problem and return with error. Signed-off-by: Tony Lindgren <[email protected]> Signed-off-by: Linus Walleij <[email protected]>
2015-09-14pinctrl: join lines that can be a single line within 80 columnsMasahiro Yamada1-2/+1
There is no reason to break a line shorter than 80 columns. Signed-off-by: Masahiro Yamada <[email protected]> Signed-off-by: Linus Walleij <[email protected]>
2015-09-14pinctrl: digicolor: convert null test to IS_ERR testJulia Lawall1-2/+2
Since commit 323de9efdf3e ("pinctrl: make pinctrl_register() return proper error code"), pinctrl_register returns an error code rather than NULL on failure. Update a driver that was introduced more recently. The semantic patch that makes this change is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression e,e1,e2; @@ e = pinctrl_register(...) ... when != e = e1 if ( - e == NULL + IS_ERR(e) ) { ... return - e2 + PTR_ERR(e) ; } // </smpl> Signed-off-by: Julia Lawall <[email protected]> Acked-by: Baruch Siach <[email protected]> Signed-off-by: Linus Walleij <[email protected]>
2015-09-14pinctrl: qcom: ssbi: convert null test to IS_ERR testJulia Lawall2-4/+4
Since commit 323de9efdf3e ("pinctrl: make pinctrl_register() return proper error code"), pinctrl_register returns an error code rather than NULL on failure. Update some drivers that were introduced more recently. The semantic patch that makes this change is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression e,e1,e2; @@ e = pinctrl_register(...) ... when != e = e1 if ( - e == NULL + IS_ERR(e) ) { ... return - e2 + PTR_ERR(e) ; } // </smpl> Signed-off-by: Julia Lawall <[email protected]> Signed-off-by: Linus Walleij <[email protected]>
2015-09-14gpio: omap: Fix GPIO numbering for deferred probeTony Lindgren1-1/+3
If gpio-omap probe fails with -EPROBE_DEFER, the GPIO numbering keeps increasing. Only increase the gpio count if gpiochip_add() was successful as otherwise the numbers will increase for each probe attempt. Cc: Javier Martinez Canillas <[email protected]> Cc: Kevin Hilman <[email protected]> Cc: Santosh Shilimkar <[email protected]> Reviewed-by: Grygorii Strashko <[email protected]> Signed-off-by: Tony Lindgren <[email protected]> Signed-off-by: Linus Walleij <[email protected]>
2015-09-14Documentation: gpio: Explain that <function>-gpio is also supportedJavier Martinez Canillas1-3/+3
The GPIO documentation mentions that GPIOs are mapped by defining a <function>-gpios property in the consumer device's node but a -gpio sufix is also supported after commit: dd34c37aa3e8 ("gpio: of: Allow -gpio suffix for property names") Update the documentation to match the implementation. Signed-off-by: Javier Martinez Canillas <[email protected]> Signed-off-by: Linus Walleij <[email protected]>
2015-09-14gpio: omap: Fix gpiochip_add() handling for deferred probeTony Lindgren1-1/+4
Currently we gpio-omap breaks if gpiochip_add() returns -EPROBE_DEFER: [ 0.570000] gpiochip_add: GPIOs 0..31 (gpio) failed to register [ 0.570000] omap_gpio 48310000.gpio: Could not register gpio chip -517 ... [ 3.670000] omap_gpio 48310000.gpio: Unbalanced pm_runtime_enable! Let's fix the issue by adding the missing pm_runtime_put() on error. Cc: Grygorii Strashko <[email protected]> Cc: Javier Martinez Canillas <[email protected]> Cc: Kevin Hilman <[email protected]> Cc: Santosh Shilimkar <[email protected]> Acked-by: Santosh Shilimkar <[email protected]> Signed-off-by: Tony Lindgren <[email protected]> Signed-off-by: Linus Walleij <[email protected]>
2015-09-14gpio: sx150x: Remove unnecessary MODULE_ALIAS()Javier Martinez Canillas1-1/+0
The driver has a I2C device id table that is used to create the module aliases and also "sx150x" isn't a supported I2C id, so it's never used. Signed-off-by: Javier Martinez Canillas <[email protected]> Signed-off-by: Linus Walleij <[email protected]>
2015-09-14Documentation: gpio: board: describe the con_id parameterDirk Behme2-0/+12
The con_id parameter has to match the GPIO description and is automatically extended by the GPIO suffix if not NULL. I had to look into the code to understand this and properly find the GPIO I've been looking for, so document this. Signed-off-by: Dirk Behme <[email protected]> Acked-by: Alexandre Courbot <[email protected]> Signed-off-by: Linus Walleij <[email protected]>
2015-09-14Documentation: gpio: board: add flags parameter to gpiod_get*() functionsDirk Behme1-12/+13
With commit 39b2bbe3d715 ("gpio: add flags argument to gpiod_get*() functions") the gpiod_get*() functions got a 'flags' parameter. Reflect this in the documentation, too. Signed-off-by: Dirk Behme <[email protected]> Signed-off-by: Linus Walleij <[email protected]>
2015-09-14gpio: Propagate errors from chip->get()Bjorn Andersson1-7/+14
It's possible to have gpio chips hanging off unreliable remote buses where the get() operation will fail to acquire a readout of the current gpio state. Propagate these errors to the consumer so that they can act on, retry or ignore these failing reads, instead of treating them as the line being held high. Signed-off-by: Bjorn Andersson <[email protected]> Reviewed-by: Alexandre Courbot <[email protected]> Signed-off-by: Linus Walleij <[email protected]>
2015-09-14gpio: rcar: GPIO_RCAR doesn't relate to ARMKuninori Morimoto1-1/+1
8cd1470("gpio: rcar: Add r8a7795 (R-Car H3) support") added GPIO support for r8a7795. r8a7795 based on CONFIG_ARM64. OTOH, GPIO_RCAR driver can be compiled fine on non-ARM. This patch removed ARM dependency for it. Signed-off-by: Kuninori Morimoto <[email protected]> Acked-by: Geert Uytterhoeven <[email protected]> Acked-by: Simon Horman <[email protected]> Signed-off-by: Linus Walleij <[email protected]>
2015-09-14gpio: mxs: need to check return value of irq_alloc_generic_chipPeng Fan1-2/+11
Need to check return value of irq_alloc_generic_chip, because it may return NULL. 1. Change mxs_gpio_init_gc return type from void to int. 2. Add a new lable out_irqdomain_remove to remove the irq domain when mxc_gpio_init_gc fail. Signed-off-by: Peng Fan <[email protected]> Cc: Alexandre Courbot <[email protected]> Signed-off-by: Linus Walleij <[email protected]>
2015-09-14gpio: mxc: need to check return value of irq_alloc_generic_chipPeng Fan1-2/+10
Need to check return value of irq_alloc_generic_chip, because it may return NULL. 1. Change mxc_gpio_init_gc return type from void to int. 2. Add a new lable out_irqdomain_remove to remove the irq domain when mxc_gpio_init_gc fail. Signed-off-by: Peng Fan <[email protected]> Cc: Alexandre Courbot <[email protected]> [Manually rebased] Signed-off-by: Linus Walleij <[email protected]>
2015-09-13perf header: Fixup reading of HEADER_NRCPUS featureArnaldo Carvalho de Melo1-2/+2
The original patch introducing this header wrote the number of CPUs available and online in one order and then swapped those values when reading, fix it. Before: # perf record usleep 1 # perf report --header-only | grep 'nrcpus \(online\|avail\)' # nrcpus online : 4 # nrcpus avail : 4 # echo 0 > /sys/devices/system/cpu/cpu2/online # perf record usleep 1 # perf report --header-only | grep 'nrcpus \(online\|avail\)' # nrcpus online : 4 # nrcpus avail : 3 # echo 0 > /sys/devices/system/cpu/cpu1/online # perf record usleep 1 # perf report --header-only | grep 'nrcpus \(online\|avail\)' # nrcpus online : 4 # nrcpus avail : 2 After the fix, bringing back the CPUs online: # perf report --header-only | grep 'nrcpus \(online\|avail\)' # nrcpus online : 2 # nrcpus avail : 4 # echo 1 > /sys/devices/system/cpu/cpu2/online # perf record usleep 1 # perf report --header-only | grep 'nrcpus \(online\|avail\)' # nrcpus online : 3 # nrcpus avail : 4 # echo 1 > /sys/devices/system/cpu/cpu1/online # perf record usleep 1 # perf report --header-only | grep 'nrcpus \(online\|avail\)' # nrcpus online : 4 # nrcpus avail : 4 Acked-by: Namhyung Kim <[email protected]> Cc: Adrian Hunter <[email protected]> Cc: Borislav Petkov <[email protected]> Cc: David Ahern <[email protected]> Cc: Frederic Weisbecker <[email protected]> Cc: Jiri Olsa <[email protected]> Cc: Kan Liang <[email protected]> Cc: Stephane Eranian <[email protected]> Cc: Wang Nan <[email protected]> Fixes: fbe96f29ce4b ("perf tools: Make perf.data more self-descriptive (v8)") Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
2015-09-13time: Fix timekeeping_freqadjust()'s incorrect use of abs() instead of abs64()John Stultz1-1/+1
The internal clocksteering done for fine-grained error correction uses a logarithmic approximation, so any time adjtimex() adjusts the clock steering, timekeeping_freqadjust() quickly approximates the correct clock frequency over a series of ticks. Unfortunately, the logic in timekeeping_freqadjust(), introduced in commit: dc491596f639 ("timekeeping: Rework frequency adjustments to work better w/ nohz") used the abs() function with a s64 error value to calculate the size of the approximated adjustment to be made. Per include/linux/kernel.h: "abs() should not be used for 64-bit types (s64, u64, long long) - use abs64()". Thus on 32-bit platforms, this resulted in the clocksteering to take a quite dampended random walk trying to converge on the proper frequency, which caused the adjustments to be made much slower then intended (most easily observed when large adjustments are made). This patch fixes the issue by using abs64() instead. Reported-by: Nuno Gonçalves <[email protected]> Tested-by: Nuno Goncalves <[email protected]> Signed-off-by: John Stultz <[email protected]> Cc: <[email protected]> # v3.17+ Cc: Linus Torvalds <[email protected]> Cc: Miroslav Lichvar <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Prarit Bhargava <[email protected]> Cc: Richard Cochran <[email protected]> Cc: Thomas Gleixner <[email protected]> Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Ingo Molnar <[email protected]>
2015-09-13perf/x86/intel: Fix constraint accessPeter Zijlstra1-1/+4
Sasha reported that we can get here with .idx==-1, and cpuc->event_constraints unallocated. Suggested-by: Stephane Eranian <[email protected]> Reported-by: Sasha Levin <[email protected]> Signed-off-by: Peter Zijlstra (Intel) <[email protected]> Cc: Linus Torvalds <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Thomas Gleixner <[email protected]> Cc: <[email protected]> Fixes: b371b5943178 ("perf/x86: Fix event/group validation") Signed-off-by: Ingo Molnar <[email protected]>
2015-09-13x86/cpu: Print family/model/stepping in hexBorislav Petkov1-2/+2
924e101a7ab6 ("x86/debug: Dump family, model, stepping of the boot CPU") had its good intentions to dump the exact F/M/S as an aid during debugging sessions but its output can be ambiguous. Fix that: -smpboot: CPU0: Intel Core Processor (Broadwell) (fam: 06, model: 47, stepping: 02) +smpboot: CPU0: Intel Core Processor (Broadwell) (family: 0x6, model: 0x47, stepping: 0x2) Also, spell out "family". Signed-off-by: Borislav Petkov <[email protected]> Cc: Andy Lutomirski <[email protected]> Cc: Linus Torvalds <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Thomas Gleixner <[email protected]> Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Ingo Molnar <[email protected]>
2015-09-12hwmon: (nct6775) Add support for NCT6793DGuenter Roeck3-18/+38
NCT6793D is register compatible with NCT6792D. Also move nct6775_sio_names[] closer to enum kinds to simplify adding new chips. Tested-by: Grazvydas Ignotas <[email protected]> Reviewed-by: Jean Delvare <[email protected]> Signed-off-by: Guenter Roeck <[email protected]>
2015-09-12hwmon: (nct6775) Swap STEP_UP_TIME and STEP_DOWN_TIME registers for most chipsGuenter Roeck1-6/+10
The STEP_UP_TIME and STEP_DOWN_TIME registers are swapped for all chips but NCT6775. Reported-by: Grazvydas Ignotas <[email protected]> Reviewed-by: Jean Delvare <[email protected]> Cc: [email protected] # v3.10+ Signed-off-by: Guenter Roeck <[email protected]>
2015-09-12Linux 4.3-rc1Linus Torvalds1-2/+2
2015-09-12Merge tag 'cris-for-4.3' of ↵Linus Torvalds50-421/+220
git://git.kernel.org/pub/scm/linux/kernel/git/jesper/cris Pull CRIS updates from Jesper Nilsson: "Mostly removal of old cruft of which we can use a generic version, or fixes for code not commonly run in the cris port, but also additions to enable some good debug" * tag 'cris-for-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/jesper/cris: (25 commits) CRISv10: delete unused lib/dmacopy.c CRISv10: delete unused lib/old_checksum.c CRIS: fix switch_mm() lockdep splat CRISv32: enable LOCKDEP_SUPPORT CRIS: add STACKTRACE_SUPPORT CRISv32: annotate irq enable in idle loop CRISv32: add support for irqflags tracing CRIS: UAPI: use generic types.h CRIS: UAPI: use generic shmbuf.h CRIS: UAPI: use generic msgbuf.h CRIS: UAPI: use generic socket.h CRIS: UAPI: use generic sembuf.h CRIS: UAPI: use generic sockios.h CRIS: UAPI: use generic auxvec.h CRIS: UAPI: use generic headers via Kbuild CRIS: UAPI: fix elf.h export CRIS: don't make asm/elf.h depend on asm/user.h CRIS: UAPI: fix ptrace.h CRISv32: Squash compile warnings for axisflashmap CRISv32: Add GPIO driver to the default configs ...
Powered by cgit, Gruvboxed by Blaster4385.