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2013-07-05drm/radeon: add support for 3d perf states on older asicsAlex Deucher2-3/+15
Certain older rv770 asics have both a performance and a 3D performance state rather than just multiple performance levels in the state power state. The current code would select the performance state rather than the 3D performance state when the "performance" profile was selected. This change switches to the "balanced" profile by default which ends up being the internal performance profile. When the user selects the "performance" profile, it selects the internal 3D performance state so the user can select the higher performance modes. For most asics this changes nothing. For certain rv770 asics with static performance and 3D performance states, this allows you to select between then using by selecting the "balanced" and "performance" dpm profiles. Signed-off-by: Alex Deucher <[email protected]>
2013-07-05drm/radeon: set default clocks for SI when DPM is disabledAlex Deucher3-8/+12
Fix patching of vddc values for SI and enable manually forcing clocks to default levels as per NI. This improves the out of the box performance with SI asics. Signed-off-by: Alex Deucher <[email protected]>
2013-07-05Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6Linus Torvalds48-2563/+2541
Pull crypto update from Herbert Xu: - Do not idle omap device between crypto operations in one session. - Added sha224/sha384 shims for SSSE3. - More optimisations for camellia-aesni-avx2. - Removed defunct blowfish/twofish AVX2 implementations. - Added unaligned buffer self-tests. - Added PCLMULQDQ optimisation for CRCT10DIF. - Added support for Freescale's DCP co-processor - Misc fixes. * git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (44 commits) crypto: testmgr - test hash implementations with unaligned buffers crypto: testmgr - test AEADs with unaligned buffers crypto: testmgr - test skciphers with unaligned buffers crypto: testmgr - check that entries in alg_test_descs are in correct order Revert "crypto: twofish - add AVX2/x86_64 assembler implementation of twofish cipher" Revert "crypto: blowfish - add AVX2/x86_64 implementation of blowfish cipher" crypto: camellia-aesni-avx2 - tune assembly code for more performance hwrng: bcm2835 - fix MODULE_LICENSE tag hwrng: nomadik - use clk_prepare_enable() crypto: picoxcell - replace strict_strtoul() with kstrtoul() crypto: dcp - Staticize local symbols crypto: dcp - Use NULL instead of 0 crypto: dcp - Use devm_* APIs crypto: dcp - Remove redundant platform_set_drvdata() hwrng: use platform_{get,set}_drvdata() crypto: omap-aes - Don't idle/start AES device between Encrypt operations crypto: crct10dif - Use PTR_RET crypto: ux500 - Cocci spatch "resource_size.spatch" crypto: sha256_ssse3 - add sha224 support crypto: sha512_ssse3 - add sha384 support ...
2013-07-05Merge tag 'upstream-3.11-rc1' of git://git.infradead.org/linux-ubiLinus Torvalds3-21/+47
Pull ubi fixes from Artem Bityutskiy: "A couple of fixes and clean-ups, allow for assigning user-defined UBI device numbers when attaching MTD devices by using the "mtd=" module parameter" * tag 'upstream-3.11-rc1' of git://git.infradead.org/linux-ubi: UBI: support ubi_num on mtd.ubi command line UBI: fastmap break out of used PEB search UBI: document UBI_IOCVOLUP better in user header UBI: do not abort init when ubi.mtd devices cannot be found UBI: drop redundant "UBI error" string
2013-07-05Merge tag 'upstream-3.11-rc1' of git://git.infradead.org/linux-ubifsLinus Torvalds1-1/+1
Pull ubifs fix from Artem Bityutskiy: "Only a single patch which fixes a message" * tag 'upstream-3.11-rc1' of git://git.infradead.org/linux-ubifs: UBIFS: correct mount message
2013-07-05mmc: bcm281xx SDHCI driverChristian Daudt4-0/+367
Add SDHCI driver for the Broadcom 281xx SoCs. Still missing: - power managemement Signed-off-by: Christian Daudt <[email protected]> Acked-by: Arnd Bergmann <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-07-05mmc: sdhci: add card_event callback to sdhciChristian Daudt2-0/+5
Add a card_event callback to sdhci so that clients can provide their own card_event to be called when card_detect is triggered. Signed-off-by: Christian Daudt <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-07-05mmc: core: Fixup Oops for SDIO shutdownUlf Hansson1-1/+2
Commit "mmc: core: Handle card shutdown from mmc_bus" introduced an Oops in the shutdown sequence for SDIO. The drv pointer, does not exist for SDIO since the probing of the SDIO card from the mmc_bus perspective is expected to fail by returning -ENODEV. This patch adds the proper check for the pointer before calling it. Signed-off-by: Ulf Hansson <[email protected]> Reported-by: Stephen Warren <[email protected]> Reported-by: Tuomas Tynkkynen <[email protected]> Tested-by: Tuomas Tynkkynen <[email protected]> Acked-by: Jaehoon Chung <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-07-05mmc: sdhci-pci: add another device idAdrian Hunter1-0/+9
Add another PCI device id for an eMMC host controller. Signed-off-by: Adrian Hunter <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-07-05mmc: esdhc: Fix bug when writing to SDHCI_HOST_CONTROL registerOded Gabbay2-0/+19
The P2020 has a non-standard implementation of the SDHCI_HOST_CONTROL register. This patch adds a QUIRK in the SDHCI header to signal that a host controller has a non-standard SDHCI_HOST_CONTROL register. The patch adds a check to the function esdhc_writeb in file sdhci-of-esdhc.c, where it checks if the write is done to the SDHCI_HOST_CONTROL register and th host has the above mentioned QUIRK, then the function simply returns instead of writing to the register. The patch also detects if the processor is P2020 (by looking in dev tree) and if so, adds the QUIRK to the host->quirk2 Signed-off-by: Oded Gabbay <[email protected]> Reviewed-by: Anton Vorontsov <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-07-05mmc: esdhc: Add support for 8-bit bus width and non-removable cardOded Gabbay2-1/+50
This patch adds support of connecting an MMC media using an 8-bit bus width connection to Freescale's P2020 H/W SDHC controller. During the probe function, the generic function mmc_of_parse is called to detect whether the controller is configured with 8-bit bus width. Also, the generic function detects if the non-removable property is set in the device tree. The function esdhc_pltfm_bus_width was added because the bus width configuration is platform specific. Signed-off-by: Oded Gabbay <[email protected]> Reviewed-by: Anton Vorontsov <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-07-05mmc: core: production year for eMMC 4.41 and laterRomain Izard1-0/+4
The field containing the production date in the CID register only uses 4 bits to encode the year, starting from 1997 in the original standard. In 2013, the production year field contains 0, and the kernel reports a 1997 production date. The eMMC 4.51 specification adds a new interpretation rule. For all devices implementing the 4.41 specification or later, the production year field will be interpreted as a value between 2010 and 2025, with 0 corresponding to 2013. Signed-off-by: Romain Izard <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-07-05mmc: omap: remove unnecessary #if 0'sLuciano Coelho1-16/+0
In commit 3451c067 (mmc: omap: add DMA engine support), some #if 0's were used to comment out parts of the code. This has been in the code for over a year and are not needed anymore (and the commented-out code doesn't even compile). Remove them. Signed-off-by: Luciano Coelho <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-07-05mmc: sdhci: fix ctrl_2 on super-speed selectionGiuseppe CAVALLARO1-4/+3
This patch fixes the HC ctrl_2 programming where, in case of SDR104 and HS200, we have to write 100b in the the UHS Mode bits. We wrote 101b that is reserved from Arasan Specs. Reported-by: Youssef Triki <[email protected]> Signed-off-by: Giuseppe Cavallaro <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-07-05mmc: dw_mmc-pltfm: add Rockchip variantHeiko Stübner2-1/+43
Cortex-A9 SoCs from Rockchip use a slightly modified variant of dw_mmc controllers that seems to require the SDMMC_CMD_USE_HOLD_REG bit to always be set. There also seem to be no other modifications (additional register etc) present, so to keep the footprint low, add this small variant to the pltfm driver. Signed-off-by: Heiko Stuebner <[email protected]> Acked-by: Seungwon Jeon <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-07-05mmc: dw_mmc-pltfm: move probe and remove below dt match tableHeiko Stübner1-14/+14
In a subsquent patch probe will need to do some handling of data from the dt match table. So to prevent the need for forward declarations, move probe and remove below the match table. Signed-off-by: Heiko Stuebner <[email protected]> Acked-by: Seungwon Jeon <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-07-05mmc: dw_mmc-pltfm: remove static from dw_mci_pltfm_removeHeiko Stübner1-1/+1
dw_mci_pltfm_remove gets exported and used by dw_mmc-exynos, so should not be static. Signed-off-by: Heiko Stuebner <[email protected]> Acked-by: Jaehoon Chung <[email protected]> Acked-by: Seungwon Jeon <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-07-05mmc: sdhci-acpi: add support for eMMC hardware reset for HID 80860F14Adrian Hunter1-1/+27
Add support for eMMC hardware reset for HID 80860F14. Signed-off-by: Adrian Hunter <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-07-05mmc: sdhci-pci: add support for eMMC hardware reset for BYT eMMC.Adrian Hunter1-2/+30
Add support for eMMC hardware reset for BYT eMMC. Signed-off-by: Adrian Hunter <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-07-05hrtimers: Move SMP function call to thread contextThomas Gleixner1-22/+15
smp_call_function_* must not be called from softirq context. But clock_was_set() which calls on_each_cpu() is called from softirq context to implement a delayed clock_was_set() for the timer interrupt handler. Though that almost never gets invoked. A recent change in the resume code uses the softirq based delayed clock_was_set to support Xens resume mechanism. linux-next contains a new warning which warns if smp_call_function_* is called from softirq context which gets triggered by that Xen change. Fix this by moving the delayed clock_was_set() call to a work context. Reported-and-tested-by: Artem Savkov <[email protected]> Reported-by: Sasha Levin <[email protected]> Cc: David Vrabel <[email protected]> Cc: Ingo Molnar <[email protected]> Cc: H. Peter Anvin <[email protected]>, Cc: Konrad Wilk <[email protected]> Cc: John Stultz <[email protected]> Cc: [email protected] Cc: [email protected] Signed-off-by: Thomas Gleixner <[email protected]>
2013-07-05lustre: kill the pointless wrapperAl Viro7-14/+12
Signed-off-by: Al Viro <[email protected]>
2013-07-05helper for reading ->d_countAl Viro12-17/+22
Signed-off-by: Al Viro <[email protected]>
2013-07-05clocksource: Reselect clocksource when watchdog validated high-res capabilityThomas Gleixner2-15/+43
Up to commit 5d33b883a (clocksource: Always verify highres capability) we had no sanity check when selecting a clocksource, which prevented that a non highres capable clocksource is used when the system already switched to highres/nohz mode. The new sanity check works as Alex and Tim found out. It prevents the TSC from being used. This happens because on x86 the boot process looks like this: tsc_start_freqency_validation(TSC); clocksource_register(HPET); clocksource_done_booting(); clocksource_select() Selects HPET which is valid for high-res switch_to_highres(); clocksource_register(TSC); TSC is not selected, because it is not yet flagged as VALID_HIGH_RES clocksource_watchdog() Validates TSC for highres, but that does not make TSC the current clocksource. Before the sanity check was added, we installed TSC unvalidated which worked most of the time. If the TSC was really detected as unstable, then the unstable logic removed it and installed HPET again. The sanity check is correct and needed. So the watchdog needs to kick a reselection of the clocksource, when it qualifies TSC as a valid high res clocksource. To solve this, we mark the clocksource which got the flag CLOCK_SOURCE_VALID_FOR_HRES set by the watchdog with an new flag CLOCK_SOURCE_RESELECT and trigger the watchdog thread. The watchdog thread evaluates the flag and invokes clocksource_select() when set. To avoid that the clocksource_done_booting() code, which is about to install the first real clocksource anyway, needs to go through clocksource_select and tick_oneshot_notify() pointlessly, split out the clocksource_watchdog_kthread() list walk code and invoke the select/notify only when called from clocksource_watchdog_kthread(). So clocksource_done_booting() can utilize the same splitout code without the select/notify invocation and the clocksource_mutex unlock/relock dance. Reported-and-tested-by: Alex Shi <[email protected]> Cc: Hans Peter Anvin <[email protected]> Cc: Tim Chen <[email protected]> Cc: Andi Kleen <[email protected]> Tested-by: Peter Zijlstra <[email protected]> Cc: Ingo Molnar <[email protected]> Cc: Davidlohr Bueso <[email protected]> Cc: John Stultz <[email protected]> Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Thomas Gleixner <[email protected]>
2013-07-05sfc: Fix memory leak when discarding scattered packetsBen Hutchings1-7/+20
Commit 2768935a4660 ('sfc: reuse pages to avoid DMA mapping/unmapping costs') did not fully take account of DMA scattering which was introduced immediately before. If a received packet is invalid and must be discarded, we only drop a reference to the first buffer's page, but we need to drop a reference for each buffer the packet used. I think this bug was missed partly because efx_recycle_rx_buffers() was not renamed and so no longer does what its name says. It does not change the state of buffers, but only prepares the underlying pages for recycling. Rename it accordingly. Signed-off-by: Ben Hutchings <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2013-07-05perf: Fix interrupt handler timing harnessStephane Eranian1-2/+2
This patch fixes a serious bug in: 14c63f17b1fd perf: Drop sample rate when sampling is too slow There was an misunderstanding on the API of the do_div() macro. It returns the remainder of the division and this was not what the function expected leading to disabling the interrupt latency watchdog. This patch also remove a duplicate assignment in perf_sample_event_took(). Signed-off-by: Stephane Eranian <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Link: http://lkml.kernel.org/r/20130704223010.GA30625@quad Signed-off-by: Ingo Molnar <[email protected]>
2013-07-05perf/x86/amd: Do not print an error when the device is not presentPeter Zijlstra1-3/+1
As Linus said its not an error to not have an AMD IOMMU; esp. when you're not even running on an AMD platform. Reported-by: Linus Torvalds <[email protected]> Signed-off-by: Peter Zijlstra <[email protected]> Acked-by: Suravee Suthikulpanit <[email protected]> Cc: Arnaldo Carvalho de Melo <[email protected]> Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Ingo Molnar <[email protected]>
2013-07-05DMA: shdma: add DT supportGuennadi Liakhovetski6-13/+205
This patch adds Device Tree support to the shdma driver. No special DT properties are used, only standard DMA DT bindings are implemented. Since shdma controllers reside on SoCs, their configuration is SoC-specific and shall be passed to the driver from the SoC platform data, using the auxdata procedure. Signed-off-by: Guennadi Liakhovetski <[email protected]> Acked-by: Arnd Bergmann <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2013-07-05DMA: shdma: shdma_chan_filter() has to be in shdma-base.hGuennadi Liakhovetski2-2/+1
shdma_chan_filter() is a function, provided by the shdma-base.c module, move its declaration to the appropriate header. Signed-off-by: Guennadi Liakhovetski <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2013-07-05DMA: shdma: (cosmetic) don't re-calculate a pointerGuennadi Liakhovetski1-1/+1
Use an existing pointer instead of retrieving it again. Signed-off-by: Guennadi Liakhovetski <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2013-07-05dmaengine: at_hdmac: prepare clk before calling enableBoris BREZILLON1-6/+9
Replace clk_enable/disable with clk_prepare_enable/disable_unprepare to avoid common clk framework warnings. Signed-off-by: Boris BREZILLON <[email protected]> [[email protected]: remove return code checking in at_dma_resume_noirq()] Signed-off-by: Nicolas Ferre <[email protected]>
2013-07-05dmaengine/trivial: at_hdmac: add curly brackets to if/else expressionsNicolas Ferre1-2/+4
Correct coding style following the patch: 7c407d3e54dcc0c79119553c8d5ef176c1d5bc3a (DMA: AT91: Get residual bytes in dma buffer). Signed-off-by: Nicolas Ferre <[email protected]>
2013-07-05dmaengine: at_hdmac: remove unsuded atc_cleanup_descriptors()Nicolas Ferre1-31/+0
Since patch 7c407d3e54dcc0c79119553c8d5ef176c1d5bc3a (DMA: AT91: Get residual bytes in dma buffer), the function atc_cleanup_descriptors() is not used anymore. We remove it to prevent warnings. Reported-by: Arnd Bergmann <[email protected]> Signed-off-by: Nicolas Ferre <[email protected]> Acked-by: Arnd Bergmann <[email protected]>
2013-07-05dmaengine: at_hdmac: add FIFO configuration parameter to DMA DT bindingLudovic Desroches2-6/+26
For most devices the FIFO configuration is the same i.e. when half FIFO size is available/filled, a source/destination request is serviced. But USART devices have to do it when there is enough space/data available to perform a single AHB access so the ASAP configuration. Acked-by: Nicolas Ferre <[email protected]> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <[email protected]> Signed-off-by: Ludovic Desroches <[email protected]> Signed-off-by: Nicolas Ferre <[email protected]>
2013-07-05ARM: at91: dt: add header to define at_hdmac configurationLudovic Desroches1-0/+27
DMA-cell content is a concatenation of several values. In order to keep this stuff human readable, macros are introduced. The values for the FIFO configuration are not the same as the ones used in the configuration register in order to keep backward compatibility. Most devices use the half FIFO configuration but USART ones have to use the ASAP configuration. This parameter was not initially planed to be into the at91 dma dt binding. The third cell will be used to store this parameter, it will become a concatenation of the FIFO configuration and of the peripheral ID. In order to keep backward compatibility i.e. FIFO configuration is equal to 0, we have to perform a translation since the value to put in the register to set half FIFO is 1. Acked-by: Arnd Bergmann <[email protected]> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <[email protected]> Signed-off-by: Ludovic Desroches <[email protected]> Signed-off-by: Nicolas Ferre <[email protected]>
2013-07-05MIPS: jz4740: Correct clock gate bit for DMA controllerMaarten ter Huurne1-1/+1
Signed-off-by: Maarten ter Huurne <[email protected]> Signed-off-by: Lars-Peter Clausen <[email protected]> Acked-by: Ralf Baechle <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2013-07-05MIPS: jz4740: Remove custom DMA APILars-Peter Clausen4-401/+222
Now that all users of the custom jz4740 DMA API have been converted to use the dmaengine API instead we can remove the custom API and move all the code talking to the hardware to the dmaengine driver. Signed-off-by: Lars-Peter Clausen <[email protected]> Acked-by: Ralf Baechle <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2013-07-05MIPS: jz4740: Register jz4740 DMA deviceLars-Peter Clausen3-0/+23
Register a device for the newly added jz4740 dmaengine driver. Signed-off-by: Lars-Peter Clausen <[email protected]> Acked-by: Ralf Baechle <[email protected]> [manually edited to align struct assignment] Signed-off-by: Vinod Koul <[email protected]>
2013-07-05dma: Add a jz4740 dmaengine driverLars-Peter Clausen3-0/+440
This patch adds dmaengine support for the JZ4740 DMA controller. For now the driver will be a wrapper around the custom JZ4740 DMA API. Once all users of the custom JZ4740 DMA API have been converted to the dmaengine API the custom API will be removed and direct hardware access will be added to the dmaengine driver. Signed-off-by: Lars-Peter Clausen <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2013-07-05MIPS: jz4740: Acquire and enable DMA controller clockMaarten ter Huurne1-2/+22
Previously, it was assumed that the DMA controller clock is not gated when the kernel starts running. While that is the power-on state, it is safer to not rely on that. Signed-off-by: Maarten ter Huurne <[email protected]> Signed-off-by: Lars-Peter Clausen <[email protected]> Acked-by: Ralf Baechle <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2013-07-05dma: mmp_tdma: disable irq when disabling dma channelQiao Zhou1-0/+4
mask dma irq when disabling dma channel, so that interrupt status will not be set and interrupt won't come again. Signed-off-by: Qiao Zhou <[email protected]> Acked-by: Zhangfei Gao <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2013-07-05dmaengine: PL08x: Avoid collisions with get_signal() macroMark Brown5-14/+14
As pointed out by Arnd Bergmann there is a get_signal macro definied in linux/signal.h which can conflict with the platform data callback function of the same name leading to confusing errors from the compiler (especially if signal.h manages to get pulled into the driver itself due to header dependencies). Avoid such errors by renaming get_signal and put_signal in the platform data to get_xfer_signal and put_xfer_signal. Signed-off-by: Mark Brown <[email protected]> Acked-by: Arnd Bergmann <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2013-07-05dmaengine: dw: select DW_DMAC_BIG_ENDIAN_IO automagicallyVinod Koul2-9/+8
Signed-off-by: Vinod Koul <[email protected]>
2013-07-05dma: dw: add PCI part of the driverAndy Shevchenko3-0/+113
This is the PCI part of the DesignWare DMAC driver. The controller is usually used in the Intel hardware such as Intel Medfield. Signed-off-by: Andy Shevchenko <[email protected]> Acked-by: Arnd Bergmann <[email protected]> Acked-by: Viresh Kumar <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2013-07-05dma: dw: split driver to library part and platform codeAndy Shevchenko7-279/+436
To simplify the driver development let's split driver to library and platform code parts. It helps us to add PCI driver in future. Signed-off-by: Andy Shevchenko <[email protected]> Acked-by: Arnd Bergmann <[email protected]> Acked-by: Viresh Kumar <[email protected]> [Fixed compile error and few checkpatch issues] Signed-off-by: Vinod Koul <[email protected]>
2013-07-05dma: move dw_dmac driver to an own directoryAndy Shevchenko7-23/+28
The dw_dmac driver is going to be split into multiple files. To make this more convenient move it to an own directory. Signed-off-by: Andy Shevchenko <[email protected]> Acked-by: Viresh Kumar <[email protected]> Acked-by: Arnd Bergmann <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2013-07-05dw_dmac: don't check resource with devm_ioremap_resourceAndy Shevchenko1-4/+1
devm_ioremap_resource does sanity checks on the given resource. No need to duplicate this in the driver. Signed-off-by: Andy Shevchenko <[email protected]> Acked-by: Viresh Kumar <[email protected]> Acked-by: Arnd Bergmann <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2013-07-05dma: pl330: use dma_addr_t for describing bus addressesWill Deacon1-1/+1
The microcode bus address (pl330_dmac.mcode_bus) is currently a u32, which fails to compile when building on a system with 64-bit bus addresses. This patch uses dma_addr_t to represent the address instead. Cc: Jassi Brar <[email protected]> Cc: Vinod Koul <[email protected]> Signed-off-by: Will Deacon <[email protected]> Acked-by: Jassi Brar <[email protected]> Acked-by: Grant Likely <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2013-07-05dma: pl330: rip out broken, redundant ID probingWill Deacon1-24/+3
The PL330 driver probes the peripheral and primecell IDs of the device to make sure that it is indeed an AMBA PL330. However, it does this by making byte accesses to a device mapping of the word-aligned ID registers, which is either UNPREDICTABLE or generates an alignment fault (depending on the presence of the virtualisation extensions). Rather than fix this code, we can actually rip most of it out and let the AMBA bus driver correctly do the probing for us. Cc: Jassi Brar <[email protected]> Cc: Vinod Koul <[email protected]> Signed-off-by: Will Deacon <[email protected]> Acked-by: Jassi Brar <[email protected]> Acked-by: Grant Likely <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2013-07-05dma: imx-sdma: move to generic device tree bindingsShawn Guo2-0/+96
Update imx-sdma driver to adopt generic DMA device tree bindings. It calls of_dma_controller_register() with imx-sdma specific of_dma_xlate to get the generic DMA device tree helper support. The #dma-cells for imx-sdma must be 3, which includes request ID, peripheral type and priority. The existing way of requesting channel, clients directly call dma_request_channel(), still work there, and will be removed after all imx-sdma clients get converted to generic DMA device tree helper. Signed-off-by: Shawn Guo <[email protected]> Signed-off-by: Vinod Koul <[email protected]> Acked-by: Arnd Bergmann <[email protected]>
2013-07-05dmaengine: sirf: set dma residue based on the current dma transfer positionRongjun Ying1-0/+17
read SIRFSOC_DMA_CH_ADDR register to get current dma transfer position, then update dma residue so that things like ALSA drivers work as ALSA drivers need the right residue value. Signed-off-by: Rongjun Ying <[email protected]> Signed-off-by: Barry Song <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
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