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The forthcoming Octeon watchdog driver will use them.
Signed-off-by: David Daney <[email protected]>
To: [email protected]
To: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1499/
Signed-off-by: Ralf Baechle <[email protected]>
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The forthcoming watchdog driver will use it.
Signed-off-by: David Daney <[email protected]>
To: [email protected]
To: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1499/
Signed-off-by: Ralf Baechle <[email protected]>
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A 'select EXPORT_UASM' in Kconfig will cause the uasm to be exported
for use in modules. When it is exported, all the uasm data and code
cease to be __init and __initdata.
Also daddiu_bug cannot be __cpuinitdata if uasm is exported. The
cleanest thing is to just make it normal data.
Signed-off-by: David Daney <[email protected]>
To: [email protected]
To: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1500/
Signed-off-by: Ralf Baechle <[email protected]>
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These are OCTEON specific instructions.
Signed-off-by: David Daney <[email protected]>
To: [email protected]
To: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1496/
Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: David Daney <[email protected]>
To: [email protected]
To: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1495/
Signed-off-by: Ralf Baechle <[email protected]>
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Power throttling make deterministic delay loops impossible.
Re-implement delays using the cycle counter. This also allows us to
get rid of the code that calculates loops per jiffy.
Signed-off-by: David Daney <[email protected]>
To: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1317/
Signed-off-by: Ralf Baechle <[email protected]>
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Add support for the qi_lb60 (a.k.a QI Ben NanoNote) clamshell device.
Signed-off-by: Lars-Peter Clausen <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1472/
Signed-off-by: Ralf Baechle <[email protected]>
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Add support for the battery voltage measurement part of the JZ4740 ADC unit.
Signed-off-by: Lars-Peter Clausen <[email protected]>
Acked-by: Anton Vorontsov <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1416/
Signed-off-by: Ralf Baechle <[email protected]>
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Add support for reading the ADCIN pin of the ADC unit on JZ4740 SoCs.
Signed-off-by: Lars-Peter Clausen <[email protected]>
Cc: [email protected]
Acked-by: Jean Delvare <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1425/
Signed-off-by: Axel Lin <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Add OHCI glue code for JZ4740 SoCs OHCI module.
Signed-off-by: Lars-Peter Clausen <[email protected]>
Cc: Greg Kroah-Hartman <[email protected]>
Cc: David Brownell <[email protected]>
Cc: [email protected]
Acked-by: Greg Kroah-Hartman <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1411/
Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Lars-Peter Clausen <[email protected]>
Acked-by: Matt Fleming <[email protected]>
Cc: Andrew Morton <[email protected]>
Cc: Matt Fleming <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1463/
Patchwork: https://patchwork.linux-mips.org/patch/1523/
Signed-off-by: Ralf Baechle <[email protected]>
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Add support for the NAND controller on JZ4740 SoCs.
Signed-off-by: Lars-Peter Clausen <[email protected]>
Cc: David Woodhouse <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1470/
Signed-off-by: Ralf Baechle <[email protected]>
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Add support for the LCD controller on JZ4740 SoCs.
Signed-off-by: Lars-Peter Clausen <[email protected]>
Cc: Andrew Morton <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1470/
Signed-off-by: Ralf Baechle <[email protected]>
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Add support for the RTC unit on JZ4740 SoCs.
Signed-off-by: Lars-Peter Clausen <[email protected]>
Cc: Alessandro Zummo <[email protected]>
Cc: Paul Gortmaker <[email protected]>
Cc: [email protected]
Acked-by: Wan ZongShun <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: Alessandro Zummo <[email protected]>,
Patchwork: https://patchwork.linux-mips.org/patch/1424/
Signed-off-by: Ralf Baechle <[email protected]>
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Add the Kbuild files for the JZ4740 architecture and adds JZ4740 support
to the MIPS Kbuild files.
Signed-off-by: Lars-Peter Clausen <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1406/
Signed-off-by: Ralf Baechle <[email protected]>
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Add platform devices for all the JZ4740 platform drivers.
Signed-off-by: Lars-Peter Clausen <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1469/
Signed-off-by: Ralf Baechle <[email protected]>
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Add support for initializing arcs_cmdline on JZ4740 based machines and
provides a prom_putchar implementation.
Signed-off-by: Lars-Peter Clausen <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1404/
Signed-off-by: Ralf Baechle <[email protected]>
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The JZ4740 UART interface is almost 16550 compatible.
The UART module needs to be enabled by setting a bit in the FCR register
and it has support for receive timeout interrupts. Instead of adding yet
another machine specific quirk to the 8250 serial driver we provide a
serial_out implementation which sets the required additional flags.
Signed-off-by: Lars-Peter Clausen <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1403/
Signed-off-by: Ralf Baechle <[email protected]>
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Add support for the PWM part of the timer unit on a JZ4740 SoC.
Signed-off-by: Lars-Peter Clausen <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1468/
Signed-off-by: Ralf Baechle <[email protected]>
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Add support for DMA transfers on JZ4740 SoCs.
Signed-off-by: Lars-Peter Clausen <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1401/
Signed-off-by: Ralf Baechle <[email protected]>
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Add gpiolib support for JZ4740 SoCs.
Signed-off-by: Lars-Peter Clausen <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1467/
Signed-off-by: Ralf Baechle <[email protected]>
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Add plat_mem_setup and get_system_type for JZ4740 SoCs.
Signed-off-by: Lars-Peter Clausen <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1399/
Signed-off-by: Ralf Baechle <[email protected]>
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Add support for suspend/resume and poweroff/reboot on a JZ4740 SoC.
Signed-off-by: Lars-Peter Clausen <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1398/
Signed-off-by: Ralf Baechle <[email protected]>
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Add clocksource and clockevent support for the timer/counter unit on
JZ4740 SoCs.
Signed-off-by: Lars-Peter Clausen <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1397/
Signed-off-by: Ralf Baechle <[email protected]>
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Add support for the timer/counter unit on a JZ4740 SoC. This code is used
as a common base for the JZ4740 clocksource/clockevent implementation and
PWM support.
Signed-off-by: Lars-Peter Clausen <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1396/
Signed-off-by: Ralf Baechle <[email protected]>
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Add support for IRQ handling on a JZ4740 SoC.
Signed-off-by: Lars-Peter Clausen <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1465/
Signed-off-by: Ralf Baechle <[email protected]>
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Add support for managing the clocks found on JZ4740 SoC through the
Linux clock API.
Signed-off-by: Lars-Peter Clausen <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1466/
Signed-off-by: Ralf Baechle <[email protected]>
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Adds a new cpu type for the JZ4740 to the Linux MIPS architecture code.
It also adds the iomem addresses for the different components found on
a JZ4740 SoC.
Signed-off-by: Lars-Peter Clausen <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1464/
Signed-off-by: Ralf Baechle <[email protected]>
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* Rename camel-case InitTLBStart_addr to octeon_bootloader_entry_addr.
* Convert calls to cvmx_read64_uint32(), to simple pointer
dereferences.
* Set proper ebase.
* Don't confuse coreid and cpu numbers.
* Try to maintain consistent bootloader coremask.
* Update the signature and boot_init_vector of supported bootloaders.
Signed-off-by: David Daney <[email protected]>
To: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1491/
Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: David Daney <[email protected]>
To: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1490/
Signed-off-by: Ralf Baechle <[email protected]>
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Also number offline CPUs that could potentially be brought on-line
later.
Signed-off-by: David Daney <[email protected]>
To: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1489/
Signed-off-by: Ralf Baechle <[email protected]>
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The use of handle_percpu_irq() is not really what we want for MSI, use
handle_simple_irq() instead. This is probably the prototypical case
for using handle_simple_irq(), because all the MSIs are dispatched from
the root interrupt service routine.
Also since the base IRQ is not shared, don't pass IRQF_SHARED.
Signed-off-by: David Daney <[email protected]>
To: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1488/
Signed-off-by: Ralf Baechle <[email protected]>
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MSI IRQ numbers are allocated dynamically, so there is no reason to
have all these static definitions.
Signed-off-by: David Daney <[email protected]>
To: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1487/
Signed-off-by: Ralf Baechle <[email protected]>
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The original version went behind the back of everything, leaving
things in an inconsistent state.
Now we use the irq_set_affinity() to do the work for us. This has the
advantage that the IRQ core's view of the affinity stays consistent.
Signed-off-by: David Daney <[email protected]>
To: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1486/
Signed-off-by: Ralf Baechle <[email protected]>
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The main change is to change most of the IRQs from handle_percpu_irq
to handle_fasteoi_irq. This necessitates extracting all the .ack code
to common functions that are not exposed to the irq core.
The affinity code now acts more sanely, by doing round-robin
distribution instead of broadcasting.
Because of the change to handle_fasteoi_irq and affinity, some of the
IRQs had to be split into separate groups with their own struct
irq_chip to prevent undefined operations on specific IRQ lines.
Signed-off-by: David Daney <[email protected]>
To: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1485/
Signed-off-by: Ralf Baechle <[email protected]>
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Put all the MSI code in one place (msi-octeon.c). This simplifies
octeon-irq.c and gets rid of some ugly #ifdefs
Signed-off-by: David Daney <[email protected]>
To: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1484/
Signed-off-by: Ralf Baechle <[email protected]>
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From: Wolfgang Grandegger <[email protected]>
Add basic support for the General Purpose Router (GPR) board from
Trapeze ITS.
Signed-off-by: Wolfgang Grandegger <[email protected]>
To: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1460/
Signed-off-by: Ralf Baechle <[email protected]>
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au1000_eth uses firmware calls to get a valid MAC address, and changes
it depending on platform device id. This patch moves this logic out of
the driver into the platform device registration part, where boards with
supported chips can use whatever firmware interface they need; the default
implementation maintains compatibility with existing, YAMON-based firmware.
Tested-by: Wolfgang Grandegger <[email protected]>
Acked-by: Florian Fainelli <[email protected]>
Signed-off-by: Manuel Lauss <[email protected]>
To: Linux-MIPS <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1481/
Acked-by: David S. Miller <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Remove the SERIAL_8250_AU1X00 config symbol. Instead, use the MIPS_ALCHEMY
one which is always defined when building an Au1x00-based platform.
Signed-off-by: Manuel Lauss <[email protected]>
To: Linux-MIPS <[email protected]>
Cc: Linux-serial <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/1461/
Signed-off-by: Ralf Baechle <[email protected]>
This one depends on a previous patch (which removes SOC_AU1X00 and changes
MACH_ALCHEMY) to apply cleanly (and then actually work), so I'd love for
this to go in via the mips tree.
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Remove the CONFIG_SOC_AU1X00 Kconfig symbol since its job can also be done
by MACH_ALCHEMY, now renamed to MIPS_ALCHEMY.
Signed-off-by: Manuel Lauss <[email protected]>
To: Linux-MIPS <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/1461/
Signed-off-by: Ralf Baechle <[email protected]>
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Add support for the external T-cache interface. Allow for platform
independent size probing from 512KB to 8MB in powers of two.
Signed-off-by: Ricardo Mendoza <[email protected]>
To: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1477/
Signed-off-by: Ralf Baechle <[email protected]>
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Small cleanup of the cache code to get rid of inline asm, in preparation
to give tertiary cache support.
Signed-off-by: Ricardo Mendoza <[email protected]>
To: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1476/
Signed-off-by: Ralf Baechle <[email protected]>
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The commit "MIPS: Tracing: Cleanup the arguments passing of
prepare_ftrace_return" has moved the "jal prepare_ftrace_return"
instruction after the handling of the 3rd argument but forgot to remove
the superfluous space before the related instructions.
Signed-off-by: Wu Zhangjin <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1475/
Signed-off-by: Ralf Baechle <[email protected]>
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Based somewhat on the PPC implementation.
32-bit processes have the heap randomized in an 8MB space, 256MB for
64-bit processes.
Signed-off-by: David Daney <[email protected]>
To: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1479/
Signed-off-by: Ralf Baechle <[email protected]>
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Fairly straight forward: For 32-bit address spaces randomize within a
16MB space, for 64-bit within a 256MB space.
Signed-off-by: David Daney <[email protected]>
To: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1480/
Signed-off-by: Ralf Baechle <[email protected]>
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Add some comments about mtx1_pci_idsel() and remove a dead block of old code.
Signed-off-by: Bruno Randolf <[email protected]>
To: [email protected]
To: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1449/
Signed-off-by: Ralf Baechle <[email protected]>
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* Remove unnecessary 'if (int_status & (1 <<10))' statement
* s/if (foo != 0)/if (foo)/
* Remove unused 'inst_status &= ~(1 << i);' line
Signed-off-by: Shinya Kuribayashi <[email protected]>
To: [email protected]
CC: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1433/
Acked-by: Wu Zhangjin <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Don't duplicate worthless lines.
Signed-off-by: Shinya Kuribayashi <[email protected]>
To: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1390/
Signed-off-by: Ralf Baechle <[email protected]>
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Don't duplicate worthless lines.
Signed-off-by: Shinya Kuribayashi <[email protected]>
To: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1389/
Signed-off-by: Ralf Baechle <[email protected]>
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Although all EMMAxxx SoCs can support IP2 and IP3 hardware interrupts,
current EMMA2RH plat_irq_dispatch() supports IP2 only. We can make it
configurable in the future, but for the time being, would like to make
things explicitly allcated to IP2 in accordance with plat_irq_dispatch().
Signed-off-by: Shinya Kuribayashi <[email protected]>
To: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/1388/
Signed-off-by: Ralf Baechle <[email protected]>
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