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2016-02-25drm/tilcdc: Use devm_kzalloc() and devm_kcalloc() for private dataJyri Sarha4-46/+21
Use devm_kzalloc() and devm_kcalloc() for private data allocation at driver load time. Signed-off-by: Jyri Sarha <[email protected]> Reviewed-by: Tomi Valkeinen <[email protected]>
2016-02-25drm/tilcdc: Initialize crtc->portJyri Sarha1-0/+20
Initialize port device node pointer in the tilcdc crtc. Fixes "Falling back to first CRTC" warning from tda998x driver. The tda998x encoder driver calls drm_of_find_possible_crtcs() to initialize possible_crtcs of struct drm_encoder. The crtc->port needs to be initialized for drm_of_find_possible_crtcs() to work. Signed-off-by: Jyri Sarha <[email protected]> Reviewed-by: Tomi Valkeinen <[email protected]>
2016-02-25drm/tilcdc: Disable sync lost interrupt if it fires on every frameJyri Sarha1-1/+20
Disable the sync lost interrupt if it fires on every frame for 50 consecutive frames in a row. This is relatively sure sign of the sync lost interrupt being stuck and firing on every frame even if the display otherwise appears to work OK. Signed-off-by: Jyri Sarha <[email protected]> Reviewed-by: Tomi Valkeinen <[email protected]>
2016-02-25drm/tilcdc: Add prints on sync lost and FIFO underrun interruptsJyri Sarha2-2/+10
Add ratelimited prints on sync lost and FIFO underrun interrupts. Signed-off-by: Jyri Sarha <[email protected]> Reviewed-by: Tomi Valkeinen <[email protected]>
2016-02-25drm/tilcdc: Remove the duplicate LCDC_INT_ENABLE_SET_REG in registers[]Jyri Sarha1-2/+1
Removes the duplicate LCDC_INT_ENABLE_SET_REG-entry in registers array. Signed-off-by: Jyri Sarha <[email protected]> Reviewed-by: Tomi Valkeinen <[email protected]>
2016-02-25drm/tilcdc: Fix interrupt enable/disable code for version 2 tilcdcJyri Sarha1-5/+6
Fix interrupt enable/disable code for version 2 tilcdc. In version 2 tilcdc there is a separate register for disabling interrupts. Writing 0 to enable registers bits does not have any effect. The interrupt clear register works the same way, writing 1 to specific bit disables the interrupt and writing 0 does not have any effect. The "bug" that is fixed here does not really do any harm since the interrupts are enabled only once in the power up and disabled before power down. Signed-off-by: Jyri Sarha <[email protected]> Reviewed-by: Tomi Valkeinen <[email protected]>
2016-02-25drm/tilcdc: Do not update the next frame buffer close to vertical blankTomi Valkeinen1-8/+53
Do not update the next frame buffer close to vertical blank. This is to avoid situation when the frame changes between writing of LCDC_DMA_FB_BASE_ADDR_0_REG and LCDC_DMA_FB_CEILING_ADDR_0_REG. Signed-off-by: Tomi Valkeinen <[email protected]> [Added description to the patch] Signed-off-by: Jyri Sarha <[email protected]>
2016-02-25drm/tilcdc: Get rid of complex ping-pong mechanismTomi Valkeinen2-95/+53
Get rid of complex ping-pong mechanism and replace it with simpler single buffer flipping code. The LCDC HW appears to be designed mainly static framebuffers in mind. There are two modes of operation, either static single buffer, or ping pong double buffering with two static buffers switching back and forth. Luckily the framebuffer start address is fetched only in the beginning of the frame and changing the address after that only takes effect after the next vertical blank. The page flipping code can simply write the address of the new framebuffer and the page is flipped automatically after the next vertical blank. Using the ping pong double buffering makes the flipping code way more complex and it does not provide any benefit, so it is better to switch to single buffer operation. There is still one problem in updating the framebuffer dma address on the fly. There are two registers defining the framebuffer dma area and things may break if the dma address is fetched in while the registers are are being updated. Signed-off-by: Tomi Valkeinen <[email protected]> [Added description to the patch] Signed-off-by: Jyri Sarha <[email protected]>
2016-02-25drm/tilcdc: cleanup irq handlingTomi Valkeinen1-4/+5
Cleanup irq handling. Clear the irq status unconditionally and restructure the status bit conditions. Signed-off-by: Tomi Valkeinen <[email protected]> [Added description to the patch] Signed-off-by: Jyri Sarha <[email protected]>
2016-02-25drm/tilcdc: remove broken error handlingTomi Valkeinen1-6/+1
Remove broken error handling. The condition for handling the LCDC_SYNC_LOST and LCDC_FIFO_UNDERFLOW could never be satisfied as the LCDC_SYNC_LOST interrupt is not enabled. Also the requirement to have both LCDC_SYNC_LOST and LCDC_FIFO_UNDERFLOW fired at once before handling the error looks weird. Signed-off-by: Tomi Valkeinen <[email protected]> [Added description to the patch] Signed-off-by: Jyri Sarha <[email protected]>
2016-02-25drm/tilcdc: split reset to a separate functionTomi Valkeinen1-7/+14
Split reset to a separate function and use usleep_range(250, 1000) instead of msleep(1) to to keep the reset bit on long enough. Signed-off-by: Tomi Valkeinen <[email protected]> [Added description to the patch, changed mdelay(500) to usleep_range(250, 1000)] Signed-off-by: Jyri Sarha <[email protected]>
2016-02-25drm/tilcdc: disable crtc on unloadTomi Valkeinen1-0/+2
Disable crtc on unload. Call tilcdc_crtc_dpms() with DRM_MODE_DPMS_OFF in the beginning of unload function. Signed-off-by: Tomi Valkeinen <[email protected]> [Added description to the patch] Signed-off-by: Jyri Sarha <[email protected]>
2016-02-25drm/tilcdc: cleanup runtime PM handlingTomi Valkeinen2-9/+11
Cleanup runtime PM handling. Before the patch the usage of pm_runtime calls was inconsistent and hard to follow. After the update the pm_runtime calls are removed from set_scanout() and called around major operations that access the HW. After the patch the DPMS code does not have pm_runtime_forbid/allow calls any more and pm_runtime_irq_safe() is not set anymore. Signed-off-by: Tomi Valkeinen <[email protected]> [Added description to the patch] Signed-off-by: Jyri Sarha <[email protected]>
2016-02-25drm/tilcdc: Allocate register storage based on the actual number registersJyri Sarha2-2/+21
Allocate suspend/resume register storage based on the actual number registers the driver is aware of. The static allocation for register storage had fallen behind badly. Reported-by: Michael Bode <[email protected]> Signed-off-by: Jyri Sarha <[email protected]> Reviewed-by: Tomi Valkeinen <[email protected]>
2016-02-25drm/tilcdc: fix build error when !CONFIG_CPU_FREQGrygorii Strashko1-1/+1
Fix build error when !CONFIG_CPU_FREQ drivers/gpu/drm/tilcdc/tilcdc_drv.c: In function 'tilcdc_load': drivers/gpu/drm/tilcdc/tilcdc_drv.c:327:1: error: label 'fail_put_clk' defined but not used [-Werror=unused-label] fail_put_clk: ^ Signed-off-by: Grygorii Strashko <[email protected]> Signed-off-by: Jyri Sarha <[email protected]> Reviewed-by: Tomi Valkeinen <[email protected]>
2016-02-25drm/tilcdc: Implement dma-buf support for tilcdcJyri Sarha1-1/+12
There is nothing special about tilcdc HW when the video memory is concerned. Just using the standard drm helpers for implementation is enough. Signed-off-by: Jyri Sarha <[email protected]> Reviewed-by: Tomi Valkeinen <[email protected]>
2016-02-25drm/tilcdc: disable the lcd controller/dma engine when suspend invokedDarren Etheridge3-2/+5
The LCD controller must be deactivated and all DMA transactions stopped when the suspend power state is entered otherwise the PRCM causes the L3 bus to get stuck in transition state. This commit forces the lcdc to be shut down and waits for all pending DMA transactions to complete as part of the suspend handler for this driver. Signed-off-by: Darren Etheridge <[email protected]> Tested-by: Dave Gerlach <[email protected]> Signed-off-by: Jyri Sarha <[email protected]> Reviewed-by: Tomi Valkeinen <[email protected]>
2016-02-25drm/tilcdc: make frame_done interrupt active at all timesDarren Etheridge1-2/+4
The frame_done interrupt was only being enabled when the vsync interrupts were being enabled by DRM. However the frame_done is used to determine if the LCD controller has successfully completed the raster_enable, raster_disable commands and the vsync interrupts are not always enabled during these operations. Signed-off-by: Darren Etheridge <[email protected]> Tested-by: Dave Gerlach <[email protected]> Signed-off-by: Jyri Sarha <[email protected]> Reviewed-by: Tomi Valkeinen <[email protected]>
2016-02-25drm/tilcdc: fix kernel panic on suspend when no hdmi monitor connectedDarren Etheridge2-6/+18
On BeagleBone Black if no HDMI monitor is connected and suspend is requested a kernel panic will result: root@am335x-evm:~# echo mem > /sys/power/state [ 65.548710] PM: Syncing filesystems ... done. [ 65.631311] Freezing user space processes ... (elapsed 0.006 seconds) done. [ 65.648619] Freezing remaining freezable tasks ... (elapsed 0.005 seconds) done. [ 65.833500] Unhandled fault: external abort on non-linefetch (0x1028) at 0xfa30e004 [ 65.841692] Internal error: : 1028 [#1] SMP ARM <snip> [ 66.105287] [<c03765f0>] (platform_pm_suspend) from [<c037b6d4>] (dpm_run_callback+0x34/0x70) [ 66.114370] [<c037b6d4>] (dpm_run_callback) from [<c037ba84>] (__device_suspend+0x10c/0x2f4) [ 66.123357] [<c037ba84>] (__device_suspend) from [<c037d004>] (dpm_suspend+0x58/0x218) [ 66.131796] [<c037d004>] (dpm_suspend) from [<c008d948>] (suspend_devices_and_enter+0x9c/0x3c0) [ 66.141055] [<c008d948>] (suspend_devices_and_enter) from [<c008de7c>] (pm_suspend+0x210/0x24c) [ 66.150312] [<c008de7c>] (pm_suspend) from [<c008cabc>] (state_store+0x68/0xb8) [ 66.158103] [<c008cabc>] (state_store) from [<c02e9654>] (kobj_attr_store+0x14/0x20) [ 66.166355] [<c02e9654>] (kobj_attr_store) from [<c0185c70>] (sysfs_kf_write+0x4c/0x50) [ 66.174883] [<c0185c70>] (sysfs_kf_write) from [<c018926c>] (kernfs_fop_write+0xb4/0x150) [ 66.183598] [<c018926c>] (kernfs_fop_write) from [<c0122638>] (vfs_write+0xa8/0x180) [ 66.191846] [<c0122638>] (vfs_write) from [<c01229f8>] (SyS_write+0x40/0x8c) [ 66.199365] [<c01229f8>] (SyS_write) from [<c000e580>] (ret_fast_syscall+0x0/0x48) [ 66.207426] Code: e595c210 e5932000 e59cc000 e08c2002 (e592c000) This is because the lcdc module is not enabled when no monitor is detected to save power. However the suspend handler just blindly tries to save the lcdc state by copying out the pertinent registers. However module is off so no good things happen when you try and access it. This patch only saves off the registers if the module is enabled, and then only restores the registers on resume if they were saved off during suspend. Signed-off-by: Darren Etheridge <[email protected]> Tested-by: Dave Gerlach <[email protected]> Acked-by: Felipe Balbi <[email protected]> Signed-off-by: Jyri Sarha <[email protected]> Reviewed-by: Tomi Valkeinen <[email protected]>
2016-02-25drm/tilcdc: adopt pinctrl supportDave Gerlach1-0/+8
Update tilcdc driver to set the state of the pins to: - "default on resume - "sleep" on suspend By optionally putting the pins into sleep state in the suspend callback we can accomplish two things. - minimize current leakage from pins and thus save power, - prevent the IP from driving pins output in an uncontrolled manner, which may happen if the power domain drops the domain regulator. Signed-off-by: Dave Gerlach <[email protected]> Signed-off-by: Darren Etheridge <[email protected]> Signed-off-by: Jyri Sarha <[email protected]> Reviewed-by: Tomi Valkeinen <[email protected]>
2016-02-25drm/tilcdc: verify fb pitchTomi Valkeinen1-0/+31
LCDC hardware does not support fb pitch that is different (i.e. larger) than the screen size. The driver currently does no checks for this, and the results of too big pitch are are flickering and lower fps. This issue easily happens when using libdrm's modetest tool with non-32 bpp modes. As modetest always allocated 4 bytes per pixel, it implies a bigger pitch for 16 or 24 bpp modes. This patch adds a check to reject pitches the hardware cannot support. Signed-off-by: Tomi Valkeinen <[email protected]> Signed-off-by: Darren Etheridge <[email protected]> Signed-off-by: Jyri Sarha <[email protected]>
2016-02-25drm/tilcdc: rewrite pixel clock calculationDarren Etheridge3-19/+9
Updating the tilcdc DRM driver code to calculate the LCD controller pixel clock more accurately. Based on a suggested implementation by Tomi Valkeinen. The current code does not work correctly and produces wrong results with many requested clock rates. It also oddly uses two different clocks, a display pll clock and a divider clock (child of display pll), instead of just using the clock coming to the lcdc. This patch removes the use of the display pll clock, and rewrites the code to calculate the clock rates. The idea is simply to request a clock rate of pixelclock*2, as the LCD controller has an internal divider which we set to 2. Signed-off-by: Darren Etheridge <[email protected]> [Rewrapped description] Signed-off-by: Jyri Sarha <[email protected]> Reviewed-by: Tomi Valkeinen <[email protected]>
2016-02-25Merge branch 'drm/next/du' of git://linuxtv.org/pinchartl/fbdev into drm-nextDave Airlie342-3969/+10717
rcar-du updates. * 'drm/next/du' of git://linuxtv.org/pinchartl/fbdev: (281 commits) drm: rcar-du: Add tri-planar memory formats support drm: rcar-du: Add probe deferral debug messages drm: rcar-du: lvds: Add R-Car Gen3 support drm: rcar-du: lvds: Rename PLLEN bit to PLLON drm: rcar-du: lvds: Fix PLL frequency-related configuration drm: rcar-du: lvds: Avoid duplication of clock clamp code drm: rcar-du: Add R8A7795 device support drm: rcar-du: Output the DISP signal on the ODDF pin drm: rcar-du: Output the DISP signal on the DISP pin drm: rcar-du: Support up to 4 CRTCs drm: rcar-du: Drop LVDS double dependency on OF drm: rcar-du: Enable compilation on ARM64 drm: rcar-du: Fix compile warning on 64-bit platforms drm: rcar-du: Expose the VSP1 compositor through KMS planes drm: rcar-du: Move plane allocator to rcar_du_plane.c drm: rcar-du: Restart the DU group when a plane source changes drm: rcar-du: Add VSP1 compositor support drm: rcar-du: Add VSP1 support to the planes allocator drm: rcar-du: Refactor plane setup drm: rcar-du: Compute plane DDCR4 register value directly ...
2016-02-23drm: rcar-du: Add tri-planar memory formats supportLaurent Pinchart2-10/+52
Those formats are supported on Gen3 only. Signed-off-by: Laurent Pinchart <[email protected]>
2016-02-23drm: rcar-du: Add probe deferral debug messagesLaurent Pinchart1-1/+8
Print a message when the HDMI I2C slave encoder can't be found to help debugging probe deferral issues. Signed-off-by: Laurent Pinchart <[email protected]>
2016-02-23drm: rcar-du: lvds: Add R-Car Gen3 supportKoji Matsuoka4-48/+123
The LVDS encoder differs slightly in Gen3 SoCs in its PLL configuration. Add support for the Gen3 LVDS PLL parameters and startup procedure. Signed-off-by: Koji Matsuoka <[email protected]> Signed-off-by: Laurent Pinchart <[email protected]>
2016-02-23drm: rcar-du: lvds: Rename PLLEN bit to PLLONLaurent Pinchart2-2/+2
The bit is named PLLON in the datasheet, rename it. Signed-off-by: Laurent Pinchart <[email protected]>
2016-02-23drm: rcar-du: lvds: Fix PLL frequency-related configurationLaurent Pinchart1-3/+3
The frequency checks don't match the datasheet, fix them. Signed-off-by: Laurent Pinchart <[email protected]>
2016-02-23drm: rcar-du: lvds: Avoid duplication of clock clamp codeLaurent Pinchart4-10/+18
Replace the duplicate code by a single central function. Signed-off-by: Laurent Pinchart <[email protected]>
2016-02-23drm: rcar-du: Add R8A7795 device supportLaurent Pinchart9-46/+149
Document the R8A7795-specific DT bindings and support them in the driver. The HDMI and LVDS outputs are currently not supported. Signed-off-by: Koji Matsuoka <[email protected]> Signed-off-by: Laurent Pinchart <[email protected]>
2016-02-23drm: rcar-du: Output the DISP signal on the ODDF pinLaurent Pinchart2-1/+13
The ODDF signal, output by default on the ODDF pin, isn't used on any board supported in the kernel. As the Gen3 Salvator-X board uses the ODDF pin as a DISP signal, hardcode that configuration in the driver. Use of the ODDF signal will be implemented later through proper DT-based configuration of the DU pins. Signed-off-by: Laurent Pinchart <[email protected]>
2016-02-23drm: rcar-du: Output the DISP signal on the DISP pinLaurent Pinchart1-1/+1
The DE signal is currently configured to be identical to the DISP signal and is used for the same purpose. To make it clearer that the DISP pin outputs the DISP signal, select it explicitly. Signed-off-by: Laurent Pinchart <[email protected]>
2016-02-23drm: rcar-du: Support up to 4 CRTCsKoji Matsuoka3-2/+3
The Gen3 R8A7795 DU has 4 CRTCs, support them all. Signed-off-by: Koji Matsuoka <[email protected]> Signed-off-by: Laurent Pinchart <[email protected]>
2016-02-23drm: rcar-du: Drop LVDS double dependency on OFLaurent Pinchart1-1/+0
LVDS support depends on DRM_RCAR_DU which already depends on OF. Drop the explicit dependency. Signed-off-by: Laurent Pinchart <[email protected]>
2016-02-23drm: rcar-du: Enable compilation on ARM64Koji Matsuoka1-1/+2
The R8A7795 SoC is ARM64-based and include a DU. Enable driver compilation on ARM64. Signed-off-by: Koji Matsuoka <[email protected]> Signed-off-by: Laurent Pinchart <[email protected]>
2016-02-23drm: rcar-du: Fix compile warning on 64-bit platformsKoji Matsuoka1-4/+4
Use %tu instead of %u to print difference between pointers. Signed-off-by: Koji Matsuoka <[email protected]> Signed-off-by: Laurent Pinchart <[email protected]>
2016-02-23drm: rcar-du: Expose the VSP1 compositor through KMS planesLaurent Pinchart10-16/+539
On R-Car Gen3 SoCs the DU lost its ability to access memory directly and needs to work in conjunction with the VSP to do so. This commit handles the VSP internally to hide it from the user. Signed-off-by: Laurent Pinchart <[email protected]>
2016-02-20drm: rcar-du: Move plane allocator to rcar_du_plane.cLaurent Pinchart3-275/+290
The plane allocator is specific to DU planes and won't be used for VSP-based planes, move it with the rest of the DU planes code where it belongs. Signed-off-by: Laurent Pinchart <[email protected]>
2016-02-20drm: rcar-du: Restart the DU group when a plane source changesLaurent Pinchart4-2/+28
Plane sources are configured by the VSPS bit in the PnDDCR4 register. Although the datasheet states that the bit is updated during vertical blanking, it seems that updates only occur when the DU group is held in reset through the DSYSR.DRES bit. Restart the group if the source changes. Signed-off-by: Laurent Pinchart <[email protected]>
2016-02-20drm: rcar-du: Add VSP1 compositor supportLaurent Pinchart6-49/+82
Configure the plane source at plane setup time to source frames from memory or from the VSP1. Signed-off-by: Laurent Pinchart <[email protected]>
2016-02-20drm: rcar-du: Add VSP1 support to the planes allocatorLaurent Pinchart3-6/+44
The R8A7790 DU can source frames directly from the VSP1 devices VSPD0 and VSPD1. VSPD0 feeds DU0/1 plane 0, and VSPD1 feeds either DU2 plane 0 or DU0/1 plane 1. Allocate the correct fixed plane when sourcing frames from VSPD0 or VSPD1, and allocate planes in reverse index order otherwise to ensure maximum availability of planes 0 and 1. Signed-off-by: Laurent Pinchart <[email protected]>
2016-02-20drm: rcar-du: Refactor plane setupLaurent Pinchart1-18/+21
Rename plane setup functions using more explicit names, and use local variables to store intermediate values to increase readability. This also prepares for VSP compositor support. Signed-off-by: Laurent Pinchart <[email protected]>
2016-02-20drm: rcar-du: Compute plane DDCR4 register value directlyLaurent Pinchart1-10/+3
There's no need for a read-modify-write pattern, all register bits can be set explicitly. Signed-off-by: Laurent Pinchart <[email protected]>
2016-02-20drm: rcar-du: Don't update planes on disabled CRTCsLaurent Pinchart1-1/+1
A disabled CRTC can't display planes, the driver shouldn't try to configure it when updating planes. The DRM core will store the plane state for us, and the plane will be configured appropriately the next time the CRTC is enabled. Signed-off-by: Laurent Pinchart <[email protected]>
2016-02-20drm: rcar-du: Remove local CRTC enabled stateLaurent Pinchart2-13/+1
The atomic framework guarantees that the CRTC enable and disable functions will only be called when needed, there's no need to duplicate the CRTC state check. By replacing the local CRTC enabled state check at resume time with the CRTC active state we can remove the local CRTC enabled state altogether. Signed-off-by: Laurent Pinchart <[email protected]>
2016-02-20drm: rcar-du: Perform initialization/cleanup at probe/remove timeLaurent Pinchart4-114/+106
The drm driver .load() operation is prone to race conditions as it initializes the driver after registering the device nodes. Its usage is deprecated, inline it in the probe function and call drm_dev_alloc() and drm_dev_register() explicitly. For consistency inline the .unload() handler in the remove function as well. Signed-off-by: Laurent Pinchart <[email protected]> Acked-by: Daniel Vetter <[email protected]>
2016-02-20Merge remote-tracking branch 'linuxtv/vsp1' into HEADLaurent Pinchart319-3434/+9323
2016-02-19[media] vsp1_drm.h: add missing prototypesMauro Carvalho Chehab1-0/+11
drivers/media/platform/vsp1/vsp1_drm.c:47:5: warning: no previous prototype for 'vsp1_du_init' [-Wmissing-prototypes] int vsp1_du_init(struct device *dev) ^ drivers/media/platform/vsp1/vsp1_drm.c:76:5: warning: no previous prototype for 'vsp1_du_setup_lif' [-Wmissing-prototypes] int vsp1_du_setup_lif(struct device *dev, unsigned int width, ^ drivers/media/platform/vsp1/vsp1_drm.c:221:6: warning: no previous prototype for 'vsp1_du_atomic_begin' [-Wmissing-prototypes] void vsp1_du_atomic_begin(struct device *dev) ^ drivers/media/platform/vsp1/vsp1_drm.c:273:5: warning: no previous prototype for 'vsp1_du_atomic_update' [-Wmissing-prototypes] int vsp1_du_atomic_update(struct device *dev, unsigned int rpf_index, ^ drivers/media/platform/vsp1/vsp1_drm.c:451:6: warning: no previous prototype for 'vsp1_du_atomic_flush' [-Wmissing-prototypes] void vsp1_du_atomic_flush(struct device *dev) ^ Signed-off-by: Mauro Carvalho Chehab <[email protected]>
2016-02-19[media] v4l: vsp1: Configure device based on IP versionLaurent Pinchart11-117/+116
The IP version number carries enough information to identify the exact device instance features. Drop the related DT properties and use the IP version instead. Signed-off-by: Laurent Pinchart <[email protected]> Signed-off-by: Mauro Carvalho Chehab <[email protected]>
2016-02-19[media] v4l: vsp1: Add display list supportTakashi Saito14-95/+543
Display lists contain lists of registers and associated values to be applied atomically by the hardware. They lower the pressure on interrupt processing delays when reprogramming the device as settings can be prepared well in advance and queued to the hardware without waiting for the end of the current frame. Display list support is currently limited to the DRM pipeline. Signed-off-by: Koji Matsuoka <[email protected]> Signed-off-by: Laurent Pinchart <[email protected]> Signed-off-by: Mauro Carvalho Chehab <[email protected]>
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