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2014-01-23drm/nouveau: make vga_switcheroo code depend on VGA_SWITCHEROOJeff Mahoney1-0/+6
Commit 8116188fdef594 ("nouveau/acpi: hook up to the MXM method for mux switching.") broke the build on non-x86 architectures due to the new dependency on MXM and MXM being an x86 platform driver. It built previously since the vga switcheroo registration routines were zereod out on !X86. The code was built in but unused. This patch makes all of the DSM code depend on CONFIG_VGA_SWITCHEROO, allowing it to build on non-x86 and shrinking the module size as well. [[email protected]: fix build eror when VGA_SWITCHEROO is not enabled] Signed-off-by: Jeff Mahoney <[email protected]> Signed-off-by: Jiri Slaby <[email protected]> Cc: David Airlie <[email protected]> Signed-off-by: Randy Dunlap <[email protected]> Signed-off-by: Andrew Morton <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2014-01-23drm/mgag200: on cards with < 2MB VRAM default to 16-bitDave Airlie2-2/+10
This aligns with what the userspace -mga driver does in the same situation. Signed-off-by: Dave Airlie <[email protected]>
2014-01-22Merge branch 'drm-vbl-timestamp' of git://gitorious.org/vsyrjala/linux into ↵Dave Airlie12-138/+144
drm-next Here's the vblank timestamp pull request you wanted. I addressed the few bugs that Mario pointed out and added the r-bs. As it has been a while since I made the changes, I gave it a quick spin on a few different i915 machines. Fortunately everything still seems to be fine. * 'drm-vbl-timestamp' of git://gitorious.org/vsyrjala/linux: drm/i915: Add a kludge for DSL incrementing too late and ISR not working drm/radeon: Move the early vblank IRQ fixup to radeon_get_crtc_scanoutpos() drm: Pass 'flags' from the caller to .get_scanout_position() drm: Fix vblank timestamping constants for interlaced modes drm/i915: Fix scanoutpos calculations for interlaced modes drm: Change {pixel,line,frame}dur_ns from s64 to int drm: Use crtc_clock in drm_calc_timestamping_constants() drm/radeon: Populate crtc_clock in radeon_atom_get_tv_timings() drm: Simplify the math in drm_calc_timestamping_constants() drm: Improve drm_calc_timestamping_constants() documentation drm/i915: Call drm_calc_timestamping_constants() earlier drm/i915: Kill hwmode save/restore drm: Pass the display mode to drm_calc_vbltimestamp_from_scanoutpos() drm: Pass the display mode to drm_calc_timestamping_constants()
2014-01-22Merge branch 'topic/core-stuff' of ↵Dave Airlie4-116/+182
git://people.freedesktop.org/~danvet/drm-intel into drm-next Some straggling drm core patches * 'topic/core-stuff' of git://people.freedesktop.org/~danvet/drm-intel: drm/gem: Always initialize the gem object in object_init drm/edid: Populate picture aspect ratio for CEA modes drm/edid: parse the list of additional 3D modes drm/edid: split VIC display mode lookup into a separate function drm: Make the connector mode_valid() vfunc return a drm_mode_status enum
2014-01-22Merge branch 'vmwgfx-next' of git://people.freedesktop.org/~thomash/linux ↵Dave Airlie5-28/+25
into drm-next Just a single fix for sparse/smatch warnings introduced by the previous vmwgfx-next pull. * 'vmwgfx-next' of git://people.freedesktop.org/~thomash/linux: drm/vmwgfx: Fix recently introduced sparse / smatch warnings and errors
2014-01-21drm/vmwgfx: Fix recently introduced sparse / smatch warnings and errorsThomas Hellstrom5-28/+25
Reported-by: Fengguang Wu <[email protected]> Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Jakob Bornecrant <[email protected]>
2014-01-21drm/gem: Always initialize the gem object in object_initDaniel Vetter1-1/+2
At least drm/i915 expects that the obj->dev pointer is set even in failure paths. Specifically when the shmem initialization fails we call i915_gem_object_free which needs to deref obj->base.dev to get at the slab pointer in the device private structure. And the shmem allocation can easily fail when userspace is hitting open file limits. Doing the structure init even when the shmem file allocation fails prevents this Oops. This is a regression from commit 89c8233f82d9c8af5b20e72e4a185a38a7d3c50b Author: David Herrmann <[email protected]> Date: Thu Jul 11 11:56:32 2013 +0200 drm/gem: simplify object initialization v2: Add regression note which Chris supplied. Testcase: igt/gem_fd_exhaustion Reported-and-Suggested-by: Linus Torvalds <[email protected]> Cc: Linus Torvalds <[email protected]> References: http://lists.freedesktop.org/archives/intel-gfx/2014-January/038433.html Cc: [email protected] Reviewed-by: David Herrmann <[email protected]> Cc: David Herrmann <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2014-01-21Merge branch 'drm-next-3.14' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie18-111/+178
into drm-next New tree with the INFO ioctl merge fixed up. This also adds a couple of additional minor fixes. A few more changes for 3.14, mostly just bug fixes. Note that: drm/radeon: add query to fetch the max engine clock. will conflict with 3.13 final, but the fix is pretty obvious. * 'drm-next-3.14' of git://people.freedesktop.org/~agd5f/linux: (22 commits) drm/radeon: add UVD support for OLAND drm/radeon: fix minor typos in si_dpm.c drm/radeon: set the full cache bit for fences on r7xx+ drm/radeon: fix surface sync in fence on cayman (v2) drm/radeon/dpm: disable mclk switching on desktop RV770 drm/radeon: fix endian handling in radeon_atom_init_mc_reg_table drm/radeon: write gfx pg bases even when gfx pg is disabled drm/radeon: bail early from enable ss in certain cases drm/radeon: handle ss percentage divider properly drm/radeon: add query to fetch the max engine clock (v2) drm/radeon/dp: sleep after powering up the display drm/radeon/dp: use usleep_range rather than udelay drm/radeon/dp: bump i2c-over-aux retries to 7 drm/radeon: disable ss on DP for DCE3.x drm/radeon/cik: use hw defaults for TC_CFG registers drm/radeon: disable dpm on BTC drm/radeon/cik: use WAIT_REG_MEM special op for CP HDP flush drm/radeon/cik: use POLL_REG_MEM special op for sDMA HDP flush drm/radeon: consolidate sdma hdp flushing code for CIK drm/radeon: consolidate cp hdp flushing code for CIK ...
2014-01-20drm/radeon: add UVD support for OLANDAlex Deucher2-0/+2
It seems this got dropped when we merged UVD support last year. Add this back now. Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2014-01-20drm/radeon: fix minor typos in si_dpm.cAlex Deucher1-2/+2
Copy/paste typos from the ni code. Should not have any functional change. Signed-off-by: Alex Deucher <[email protected]>
2014-01-20drm/radeon: set the full cache bit for fences on r7xx+Alex Deucher2-6/+8
Needed to properly flush the read caches for fences. Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2014-01-20drm/radeon: fix surface sync in fence on cayman (v2)Alex Deucher2-9/+8
We need to set the engine bit to select the ME and also set the full cache bit. Should help stability on TN and cayman. V2: fix up surface sync in ib execute as well Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2014-01-20drm/radeon/dpm: disable mclk switching on desktop RV770Alex Deucher1-0/+6
Mclk switching doesn't seem to work reliably on these cards. Most RV770 boards specify the same mclk for all performance levels anyway so in most cases, this has no affect. Bug: https://bugs.freedesktop.org/show_bug.cgi?id=73067 Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2014-01-20drm/radeon: fix endian handling in radeon_atom_init_mc_reg_tableAlex Deucher1-5/+7
Need to swap the data for big endian. Notcied by sylware in IRC. Signed-off-by: Alex Deucher <[email protected]>
2014-01-20drm/radeon: write gfx pg bases even when gfx pg is disabledAlex Deucher1-0/+3
For consistency. These buffers aren't used when pg is disabled. Signed-off-by: Alex Deucher <[email protected]>
2014-01-20drm/radeon: bail early from enable ss in certain casesAlex Deucher1-7/+12
If the ss percentage is 0 or we are using external ss, just bail when enabling ss. We disable it explicitly earlier in the modeset already. Signed-off-by: Alex Deucher <[email protected]>
2014-01-20drm/radeon: handle ss percentage divider properlyAlex Deucher3-3/+13
It's either 100 or 1000 depending on the flags in the table. Signed-off-by: Alex Deucher <[email protected]>
2014-01-20drm/radeon: add query to fetch the max engine clock (v2)Alex Deucher3-8/+15
This is needed for reporting the max GPU engine clock in OpenCL. This just reports the max possible engine clock, it does not take into account current conditions that may limit that clock. v2: fix query number for merge with 3.13 Signed-off-by: Alex Deucher <[email protected]>
2014-01-20drm/edid: Populate picture aspect ratio for CEA modesVandana Kannan2-64/+66
Adding picture aspect ratio for CEA modes based on CEA-861D Table 3 or CEA-861E Table 4. This is useful for filling up the detail in AVI infoframe. v2: Ville's review comments incorporated Added picture aspect ratio as part of edid_cea_modes instead of DRM_MODE Signed-off-by: Vandana Kannan <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2014-01-20drm/radeon/dp: sleep after powering up the displayAlex Deucher1-1/+3
According to the DP 1.1 spec, the sink must power up within 1ms. Noticed while reviewing Thierry's drm/dp patches. Signed-off-by: Alex Deucher <[email protected]>
2014-01-20drm/radeon/dp: use usleep_range rather than udelayAlex Deucher1-4/+4
Based on common dp code proposed by Thierry Reding. Signed-off-by: Alex Deucher <[email protected]>
2014-01-20drm/radeon/dp: bump i2c-over-aux retries to 7Alex Deucher1-3/+3
As per the DP1.2 spec. Noticed while reviewing Thierry's drm/dp patches. Also bump native aux retries to 7 for consistency. Signed-off-by: Alex Deucher <[email protected]>
2014-01-20drm/radeon: disable ss on DP for DCE3.xAlex Deucher1-1/+4
Seems to cause problems with certain DP monitors. Bug: https://bugs.freedesktop.org/show_bug.cgi?id=40699 Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2014-01-20drm/radeon/cik: use hw defaults for TC_CFG registersAlex Deucher1-14/+0
Use the hw power up values rather than 0. Signed-off-by: Alex Deucher <[email protected]>
2014-01-20drm/radeon: disable dpm on BTCAlex Deucher1-3/+3
Still unstable on some boards. Bugs: https://bugs.freedesktop.org/show_bug.cgi?id=73053 https://bugzilla.kernel.org/show_bug.cgi?id=68571 Signed-off-by: Alex Deucher <[email protected]> Cc: 3.13 <[email protected]> # 3.13
2014-01-20drm/radeon/cik: use WAIT_REG_MEM special op for CP HDP flushAlex Deucher1-9/+30
This is the preferred flushing method on CIK. Note, this only works on the PFP so the engine bit must be set. Signed-off-by: Alex Deucher <[email protected]>
2014-01-20drm/radeon/cik: use POLL_REG_MEM special op for sDMA HDP flushAlex Deucher1-6/+14
This is the preferred flushing method on CIK. Signed-off-by: Alex Deucher <[email protected]>
2014-01-20drm/radeon: consolidate sdma hdp flushing code for CIKAlex Deucher1-12/+23
It's used in several places so move to a common shared function. Signed-off-by: Alex Deucher <[email protected]>
2014-01-20drm/radeon: consolidate cp hdp flushing code for CIKAlex Deucher1-28/+27
It's used in several places so move to a common shared function. Signed-off-by: Alex Deucher <[email protected]>
2014-01-20drm/radeon: don't power gate paused UVD streamsChristian König2-0/+6
Signed-off-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2014-01-20Revert "drm/radeon: disable CIK CP semaphores for now"Alex Deucher1-5/+0
This reverts commit 99b4f25122f43210278cde17a9d100906235a074. Semaphores work fine after further review and testing. Cc: 3.13 <[email protected]> # 3.13
2014-01-20drm/edid: parse the list of additional 3D modesThomas Wood1-21/+73
Parse 2D_VIC_order_X and 3D_Structure_X from the list at the end of the HDMI Vendor Specific Data Block. v2: Use an offset value depending on 3D_Multi_present and add detail_present. (Ville Syrjälä) v3: Make sure the list is parsed even if 3D_Structure_ALL/MASK is not present. (Ville Syrjälä) Fix one length check and remove another. (Ville Syrjälä) Signed-off-by: Thomas Wood <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2014-01-20drm/edid: split VIC display mode lookup into a separate functionThomas Wood1-28/+39
Signed-off-by: Thomas Wood <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2014-01-20drm: Make the connector mode_valid() vfunc return a drm_mode_status enumDamien Lespiau1-2/+2
To make it clear what exactly mode_valid() should return. Signed-off-by: Damien Lespiau <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2014-01-20drm/i915: Add a kludge for DSL incrementing too late and ISR not workingVille Syrjälä1-40/+39
On pre-PCH platforms ISR doesn't seem to be an actual ISR, at least as far as display interrupts are concerned. Instead it sort of looks like some ISR bits just directly reflect the corresponding bit from PIPESTAT. The bit appears in the ISR only if the PIPESTAT interrupt is enabled. So in that sense it sort of looks a bit like the south interrupt scheme on PCH platforms. So it goes something a bit like this: PIPESTAT.status & PIPESTAT.enable -> ISR -> IMR -> IIR -> IER -> actual interrupt In any case that means the intel_pipe_in_vblank_locked() doesn't actually work for pre-PCH platforms. As a last resort, add a similar kludge as radeon has that fixes things up if we got called from the vblank interrupt, but the scanline counter value indicates that we're not quite there yet. We know that the scanline counter increments at hsync but is otherwise accurate, so we can limit the kludge to the line just prior to vblank start, instead of the relative distance that radeon uses. Reviewed-by: [email protected] Signed-off-by: Ville Syrjälä <[email protected]>
2014-01-20drm/radeon: Move the early vblank IRQ fixup to radeon_get_crtc_scanoutpos()Ville Syrjälä2-23/+24
i915 doesn't need this kludge for most platforms. Although we do appear to need something similar on certain platforms, but we can be more accurate when we apply the adjustment since we know exactly why the scanline counter doesn't always quite match the vblank status. Also the current code doesn't handle interlaced modes correctly, and we already deal with interlaced modes in i915 code. So let's just move the current code to radeon_get_crtc_scanoutpos() since that's why it was added. For i915 we'll add a more finely targeted variant. v2: Fix vpos vs. *vpos bug (Mario) Reviewed-by: [email protected] Signed-off-by: Ville Syrjälä <[email protected]>
2014-01-20drm: Pass 'flags' from the caller to .get_scanout_position()Ville Syrjälä7-6/+12
Preparation for moving the early vblank IRQ logic into radeon_get_crtc_scanoutpos(). v2: Fix radeon_drv.c compile warning (Mario) Reviewed-by: [email protected] Signed-off-by: Ville Syrjälä <[email protected]>
2014-01-20drm: Fix vblank timestamping constants for interlaced modesVille Syrjälä1-6/+6
We're currently miscalculating the line and pixel durations for interlaced modes. crtc_htotal and crtc_vtotal are the full frame timings, and so is crtc_clock, so we can compute the line and pixel durations from those w/o any extra adjustments. But we actually want framedur_ns to be the field, not frame, duration, so we must divide it by two. This should make the scanout based vblank timestamp corrections work correctly with interlaced modes, at least for i915. It all depends whether we keep the field or frame timings in the display mode crtc_ timings. v2: Preserve halve->half typo fix that happened in the meantine Reviewed-by: [email protected] Signed-off-by: Ville Syrjälä <[email protected]>
2014-01-20drm/i915: Fix scanoutpos calculations for interlaced modesVille Syrjälä1-0/+6
The scanline counter counts lines in the current field, not the entire frame. But the crtc_ timings are the values for the entire frame. Divide the vertical timings by 2 to make them match the scanline counter. The rounding was carefully chosen to make it do the right thing wrt. the observed scanline counter and ISR vblank bit behaviour. Reviewed-by: [email protected] Signed-off-by: Ville Syrjälä <[email protected]>
2014-01-20drm: Change {pixel,line,frame}dur_ns from s64 to intVille Syrjälä2-10/+10
Using s64 for the timestamping constants is wasteful. Signed 32bit integers get us a range of over +-2 seconds. Presuming that no-one wants to a vrefresh rate less than 0.5, we can switch to using int for the timestamping constants. We save a few bytes in drm_crtc and avoid a bunch of 64bit math. Reviewed-by: [email protected] Signed-off-by: Ville Syrjälä <[email protected]>
2014-01-20drm: Use crtc_clock in drm_calc_timestamping_constants()Ville Syrjälä1-1/+1
drm_calc_timestamping_constants() computes the pixel/line/frame durations based on the crtc_ timing values. The corresponding pixel clock is in mode->crtc_clock, so we need to use that instead of mode->clock. This should fix drm_calc_timestamping_constants() for frame packing stereo modes. Reviewed-by: [email protected] Signed-off-by: Ville Syrjälä <[email protected]>
2014-01-20drm/radeon: Populate crtc_clock in radeon_atom_get_tv_timings()Ville Syrjälä1-2/+4
crtc_clock is now supposed to be the actual pixel clock corresponding to the other crtc_ timing values. Populate crtc_clock appropriately in radeon_atom_get_tv_timings(). This was the only obvious place where we frob with the crtc_ timigns directly instead of calling drm_mode_set_crtcinfo() which would also update crtc_clock. Reviewed-by: [email protected] Signed-off-by: Ville Syrjälä <[email protected]>
2014-01-20drm: Simplify the math in drm_calc_timestamping_constants()Ville Syrjälä1-15/+11
drm_calc_timestamping_constants() makes the math more complex than necessary. - multipying the dotclock by 1000 is pointless, just makes all the numbers bigger - div64_u64() is also pointless, div_u64 is enough - pixeldur_ns doesn't need any 64bit math Reviewed-by: [email protected] Signed-off-by: Ville Syrjälä <[email protected]>
2014-01-20drm: Improve drm_calc_timestamping_constants() documentationVille Syrjälä1-7/+6
Move the long blurp to into the body of the comment, leaving only a short summary line at the top. Reviewed-by: [email protected] Signed-off-by: Ville Syrjälä <[email protected]>
2014-01-20drm/i915: Call drm_calc_timestamping_constants() earlierVille Syrjälä1-9/+8
Update the pixel/line/frame duration information when we switch to the new pipe config. This will keep the timestamping constants in better sync with the real hardware state. Reviewed-by: [email protected] Signed-off-by: Ville Syrjälä <[email protected]>
2014-01-20drm/i915: Kill hwmode save/restoreVille Syrjälä1-10/+3
drm core no longer uses crtc->hwmode, and neither does i915, so we can totally ignore it in i915. Reviewed-by: [email protected] Signed-off-by: Ville Syrjälä <[email protected]>
2014-01-20drm: Pass the display mode to drm_calc_vbltimestamp_from_scanoutpos()Ville Syrjälä4-6/+8
Rather than using crtc->hwmode, just pass the relevant mode to drm_calc_vbltimestamp_from_scanoutpos(). This removes the last hwmode usage from core drm. Reviewed-by: [email protected] Signed-off-by: Ville Syrjälä <[email protected]>
2014-01-20drm: Pass the display mode to drm_calc_timestamping_constants()Ville Syrjälä4-11/+14
We don't really use hwmode anymore in i915, so eliminating its use from the core code seems prudent. Just pass the appropriate mode to drm_calc_timestamping_constants(). Reviewed-by: [email protected] Signed-off-by: Ville Syrjälä <[email protected]>
2014-01-20Merge branch 'drm-intel-next' of ↵Dave Airlie542-3642/+5616
git://people.freedesktop.org/~danvet/drm-intel into drm-next drm-intel-next-2014-01-10: - final bits for runtime D3 on Haswell from Paul (now enabled fully) - parse the backlight modulation freq information in the VBT from Jani (but not yet used) - more watermark improvements from Ville for ilk-ivb and bdw - bugfixes for fastboot from Jesse - watermark fix for i830M (but not yet everything) - vlv vga hotplug w/a (Imre) - piles of other small improvements, cleanups and fixes all over Note that the pull request includes a backmerge of the last drm-fixes pulled into Linus' tree - things where getting a bit too messy. So the shortlog also contains a bunch of patches from Linus tree. Please yell if you want me to frob it for you a bit. * 'drm-intel-next' of git://people.freedesktop.org/~danvet/drm-intel: (609 commits) drm/i915/bdw: make sure south port interrupts are enabled properly v2 drm/i915: Include more information in disabled hotplug interrupt warning drm/i915: Only complain about a rogue hotplug IRQ after disabling drm/i915: Only WARN about a stuck hotplug irq ONCE drm/i915: s/hotplugt_status_gen4/hotplug_status_g4x/
2014-01-20Merge tag 'vmwgfx-next-2014-01-17' of ↵Dave Airlie19-373/+4716
git://people.freedesktop.org/~thomash/linux into drm-next Pull request of 2014-01-17 Pull request for 3.14. One not so urgent fix, One huge device update. The pull request corresponds to the patches sent out on dri-devel, except: [PATCH 02/33], review tag typo pointed out by Matt Turner. [PATCH 04/33], dropped. The new surface formats are never used. The upcoming vmware svga2 hardware version 11 will introduce the concept of "guest backed objects" or -resources. The device will in principle get all of its memory from the guest, which has big advantages from the device point of view. This means that vmwgfx contexts, shaders and surfaces need to be backed by guest memory in the form of buffer objects called MOBs, presumably short for MemoryOBjects, which are bound to the device in a special way. This patch series introduces guest backed object support. Some new IOCTLs are added to allocate these new guest backed object, and to optionally provide them with a backing MOB. There is an update to the gallium driver that comes with this update, and it will be pushed in the near timeframe presumably to a separate mesa branch before merged to master. * tag 'vmwgfx-next-2014-01-17' of git://people.freedesktop.org/~thomash/linux: (33 commits) drm/vmwgfx: Invalidate surface on non-readback unbind drm/vmwgfx: Silence the device command verifier drm/vmwgfx: Implement 64-bit Otable- and MOB binding v2 drm/vmwgfx: Fix surface framebuffer check for guest-backed surfaces drm/vmwgfx: Update otable definitions drm/vmwgfx: Use the linux DMA api also for MOBs drm/vmwgfx: Ditch the vmw_dummy_query_bo_prepare function drm/vmwgfx: Persistent tracking of context bindings drm/vmwgfx: Track context bindings and scrub them upon exiting execbuf drm/vmwgfx: Block the BIND_SHADERCONSTS command drm/vmwgfx: Add a parameter to get max MOB memory size drm/vmwgfx: Implement a buffer object synccpu ioctl. drm/vmwgfx: Make sure that the multisampling is off drm/vmwgfx: Extend the command verifier to handle guest-backed on / off drm/vmwgfx: Fix up the vmwgfx_drv.h header for new files drm/vmwgfx: Enable 3D for new hardware version drm/vmwgfx: Add new unused (by user-space) commands to the verifier drm/vmwgfx: Validate guest-backed shader const commands drm/vmwgfx: Add guest-backed shaders drm/vmwgfx: Hook up guest-backed surfaces ...
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