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2019-06-18drm/i915: Constify intel_pipe_config_compare()Ville Syrjälä1-26/+17
Now that intel_pipe_config_compare() no longer clobbers the passed in state we can make both crtc states const. And while at we simplify the calling convention, and clean up intel_compare_link_m_n() a bit. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Imre Deak <[email protected]>
2019-06-18drm/i915: Don't clobber M/N values during fastset checkVille Syrjälä1-8/+28
We're now calling intel_pipe_config_compare(..., true) uncoditionally which means we're always going clobber the calculated M/N values with the old values if the fuzzy M/N check passes. That causes problems because the fuzzy check allows for a huge difference in the values. I'm actually tempted to just make the M/N checks exact, but that might prevent fastboot from kicking in when people want it. So for now let's overwrite the computed values with the old values only if decide to skip the modeset. v2: Copy has_drrs along with M/N M2/N2 values Cc: [email protected] Cc: [email protected] Cc: Maarten Lankhorst <[email protected]> Cc: Hans de Goede <[email protected]> Tested-by: [email protected] Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110782 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110675 Fixes: d19f958db23c ("drm/i915: Enable fastset for non-boot modesets.") Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Imre Deak <[email protected]>
2019-06-18drm/panfrost: Expose performance counters through unstable ioctlsBoris Brezillon9-1/+414
Expose performance counters through 2 driver specific ioctls: one to enable/disable the perfcnt block, and one to dump the counter values. There are discussions to expose global performance monitors (those counters that can't be retrieved on a per-job basis) in a consistent way, but this is likely to take time to settle on something that works for various HW/users. The ioctls are marked unstable so we can get rid of them when the time comes. We initally went for a debugfs-based interface, but this was making the transition to per-FD address space more complicated (we need to specify the namespace the GPU has to use when dumping the perf counters), hence the decision to switch back to driver specific ioctls which are passed the FD they operate on and thus will have a dedicated address space attached to them. Other than that, the implementation is pretty simple: it basically dumps all counters and copy the values to a userspace buffer. The parsing is left to userspace which has to know the specific layout that's used by the GPU (layout differs on a per-revision basis). Signed-off-by: Boris Brezillon <[email protected]> Acked-by: Alyssa Rosenzweig <[email protected]> Signed-off-by: Rob Herring <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-06-18drm/panfrost: Add an helper to check the GPU generationBoris Brezillon1-0/+5
All models with an ID >= 0x1000 are Bifrost GPUs for now (might change with new gens). Suggested-by: Alyssa Rosenzweig <[email protected]> Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Signed-off-by: Rob Herring <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-06-18drm/panfrost: Add a module parameter to expose unstable ioctlsBoris Brezillon2-0/+13
We plan to expose performance counters through 2 driver specific ioctls until there's a solution to expose them in a generic way. In order to be able to deprecate those ioctls when this new infrastructure is in place we add an unsafe module parameter that will keep those ioctls hidden unless it's set to true (which also has the effect of tainting the kernel). All unstable ioctl handlers should use panfrost_unstable_ioctl_check() to check whether they're supposed to handle the request or reject it with ENOSYS. Suggested-by: Emil Velikov <[email protected]> Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Signed-off-by: Rob Herring <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-06-18drm/panfrost: Move gpu_{write, read}() macros to panfrost_regs.hBoris Brezillon2-3/+3
So they can be used from other files. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Signed-off-by: Rob Herring <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-06-18drm/i915: Use drm_gem_object.resvChris Wilson13-52/+35
Since commit 1ba627148ef5 ("drm: Add reservation_object to drm_gem_object"), struct drm_gem_object grew its own builtin reservation_object rendering our own private one bloat. Remove our redundant reservation_object and point into obj->base.resv instead. References: 1ba627148ef5 ("drm: Add reservation_object to drm_gem_object") Signed-off-by: Chris Wilson <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Cc: Matthew Auld <[email protected]> Cc: Mika Kuoppala <[email protected]> Reviewed-by: Matthew Auld <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-06-18drm/i915: Keep engine alive as we retire the contextChris Wilson1-2/+20
Though we pin the context first before taking the pm wakeref, during retire we need to unpin before dropping the pm wakeref (breaking the "natural" onion). During the unpin, we may need to attach a cleanup operation on to the engine wakeref, ergo we want to keep the engine awake until after the unpin. v2: Push the engine wakeref into the barrier so we keep the onion unwind ordering in the request itself Fixes: ce476c80b8bf ("drm/i915: Keep contexts pinned until after the next kernel context switch") Signed-off-by: Chris Wilson <[email protected]> Cc: Mika Kuoppala <[email protected]> Reviewed-by: Mika Kuoppala <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-06-18drm/vmwgfx: Kill unneeded legacy security featuresThomas Hellstrom5-311/+3
At one point, the GPU command verifier and user-space handle manager couldn't properly protect GPU clients from accessing each other's data. Instead there was an elaborate mechanism to make sure only the active master's primary clients could render. The other clients were either put to sleep or even killed (if the master had exited). VRAM was evicted on master switch. With the advent of render-node functionality, we relaxed the VRAM eviction, but the other mechanisms stayed in place. Now that the GPU command verifier and ttm object manager properly isolate primary clients from different master realms we can remove the master switch related code and drop those legacy features. Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Deepak Rawat <[email protected]> Acked-by: Emil Velikov <[email protected]>
2019-06-18drm/vmwgfx: Use VMW_DEBUG_KMS for vmwgfx mode-setting user errorsDeepak Rawat1-5/+10
For errors during layout change ioctl use VMW_DEBUG_KMS instead of DRM_ERROR. Signed-off-by: Deepak Rawat <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Signed-off-by: Thomas Hellstrom <[email protected]>
2019-06-18drm/vmwgfx: Add debug message for layout change ioctlDeepak Rawat2-0/+16
Add debug code to check user-space layout change request. Signed-off-by: Deepak Rawat <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Signed-off-by: Thomas Hellstrom <[email protected]>
2019-06-18drm/vmwgfx: Add surface dirty-tracking callbacksThomas Hellstrom4-7/+629
Add the callbacks necessary to implement emulated coherent memory for surfaces. Add a flag to the gb_surface_create ioctl to indicate that surface memory should be coherent. Also bump the drm minor version to signal the availability of coherent surfaces. Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Deepak Rawat <[email protected]>
2019-06-18drm/vmwgfx: Implement an infrastructure for read-coherent resourcesThomas Hellstrom5-11/+177
Similar to write-coherent resources, make sure that from the user-space point of view, GPU rendered contents is automatically available for reading by the CPU. Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Deepak Rawat <[email protected]>
2019-06-18drm/vmwgfx: Use an RBtree instead of linked list for MOB resourcesThomas Hellstrom3-16/+32
With emulated coherent memory we need to be able to quickly look up a resource from the MOB offset. Instead of traversing a linked list with O(n) worst case, use an RBtree with O(log n) worst case complexity. Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Deepak Rawat <[email protected]>
2019-06-18drm/vmwgfx: Implement an infrastructure for write-coherent resourcesThomas Hellstrom11-20/+584
This infrastructure will, for coherent resources, make sure that from the user-space point of view, data written by the CPU is immediately automatically available to the GPU at resource validation time. Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Deepak Rawat <[email protected]>
2019-06-18drm/ttm: TTM fault handler helpersThomas Hellstrom2-62/+111
With the vmwgfx dirty tracking, the default TTM fault handler is not completely sufficient (vmwgfx need to modify the vma->vm_flags member, and also needs to restrict the number of prefaults). We also want to replicate the new ttm_bo_vm_reserve() functionality So start turning the TTM vm code into helpers: ttm_bo_vm_fault_reserved() and ttm_bo_vm_reserve(), and provide a default TTM fault handler for other drivers to use. Cc: "Christian König" <[email protected]> Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: "Christian König" <[email protected]> #v1
2019-06-18drm/ttm: Allow the driver to provide the ttm struct vm_operations_structThomas Hellstrom3-3/+10
Add a pointer to the struct vm_operations_struct in the bo_device, and assign that pointer to the default value currently used. The driver can then optionally modify that pointer and the new value can be used for each new vma created. Cc: "Christian König" <[email protected]> Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Christian König <[email protected]>
2019-06-18mm: Add write-protect and clean utilities for address space rangesThomas Hellstrom5-1/+313
Add two utilities to a) write-protect and b) clean all ptes pointing into a range of an address space. The utilities are intended to aid in tracking dirty pages (either driver-allocated system memory or pci device memory). The write-protect utility should be used in conjunction with page_mkwrite() and pfn_mkwrite() to trigger write page-faults on page accesses. Typically one would want to use this on sparse accesses into large memory regions. The clean utility should be used to utilize hardware dirtying functionality and avoid the overhead of page-faults, typically on large accesses into small memory regions. The added file "as_dirty_helpers.c" is initially listed as maintained by VMware under our DRM driver. If somebody would like it elsewhere, that's of course no problem. Notable changes since RFC: - Added comments to help avoid the usage of these function for VMAs it's not intended for. We also do advisory checks on the vm_flags and warn on illegal usage. - Perform the pte modifications the same way softdirty does. - Add mmu_notifier range invalidation calls. - Add a config option so that this code is not unconditionally included. - Tell the mmu_gather code about pending tlb flushes. Cc: Andrew Morton <[email protected]> Cc: Matthew Wilcox <[email protected]> Cc: Will Deacon <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Rik van Riel <[email protected]> Cc: Minchan Kim <[email protected]> Cc: Michal Hocko <[email protected]> Cc: Huang Ying <[email protected]> Cc: Souptick Joarder <[email protected]> Cc: "Jérôme Glisse" <[email protected]> Cc: [email protected] Cc: [email protected] Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Ralph Campbell <[email protected]> #v1
2019-06-18mm: Add an apply_to_pfn_range interfaceThomas Hellstrom2-32/+113
This is basically apply_to_page_range with added functionality: Allocating missing parts of the page table becomes optional, which means that the function can be guaranteed not to error if allocation is disabled. Also passing of the closure struct and callback function becomes different and more in line with how things are done elsewhere. Finally we keep apply_to_page_range as a wrapper around apply_to_pfn_range The reason for not using the page-walk code is that we want to perform the page-walk on vmas pointing to an address space without requiring the mmap_sem to be held rather than on vmas belonging to a process with the mmap_sem held. Notable changes since RFC: Don't export apply_to_pfn range. Cc: Andrew Morton <[email protected]> Cc: Matthew Wilcox <[email protected]> Cc: Will Deacon <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Rik van Riel <[email protected]> Cc: Minchan Kim <[email protected]> Cc: Michal Hocko <[email protected]> Cc: Huang Ying <[email protected]> Cc: Souptick Joarder <[email protected]> Cc: "Jérôme Glisse" <[email protected]> Cc: [email protected] Cc: [email protected] Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Ralph Campbell <[email protected]> #v1
2019-06-18mm: Allow the [page|pfn]_mkwrite callbacks to drop the mmap_semThomas Hellstrom1-4/+6
Driver fault callbacks are allowed to drop the mmap_sem when expecting long hardware waits to avoid blocking other mm users. Allow the mkwrite callbacks to do the same by returning early on VM_FAULT_RETRY. In particular we want to be able to drop the mmap_sem when waiting for a reservation object lock on a GPU buffer object. These locks may be held while waiting for the GPU. Cc: Andrew Morton <[email protected]> Cc: Matthew Wilcox <[email protected]> Cc: Will Deacon <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Rik van Riel <[email protected]> Cc: Minchan Kim <[email protected]> Cc: Michal Hocko <[email protected]> Cc: Huang Ying <[email protected]> Cc: Souptick Joarder <[email protected]> Cc: "Jérôme Glisse" <[email protected]> Cc: [email protected] Cc: [email protected] Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Ralph Campbell <[email protected]>
2019-06-18drm/vmwgfx: Assign eviction priorities to resourcesThomas Hellstrom8-20/+141
TTM provides a means to assign eviction priorities to buffer object. This means that all buffer objects with a lower priority will be evicted first on memory pressure. Use this to make sure surfaces and in particular non-dirty surfaces are evicted first. Evicting in particular shaders, cotables and contexts imply a significant performance hit on vmwgfx, so make sure these resources are evicted last. Some buffer objects are sub-allocated in user-space which means we can have many resources attached to a single buffer object or resource. In that case the buffer object is given the highest priority of the attached resources. Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Deepak Rawat <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
2019-06-18drm/i915/guc: Reduce verbosity on log overflowsChris Wilson1-1/+3
If the user is clearing the log buffer too slowly, we overflow. As this is an expected condition, and the driver tries to handle it, reduce the error message down to a notice. Michal mentioned that another cause would be incorrect reset handling, so we don't want to lose the notification entirely. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110817 Signed-off-by: Chris Wilson <[email protected]> Cc: Michal Wajdeczko <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Reviewed-by: Tvrtko Ursulin <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-06-18Documentation/i915: fix file references after display/ subdir renamesJani Nikula1-33/+33
Fix the plethora of Sphinx build errors after moving the display files under a subdirectory. Fixes: 379bc100232a ("drm/i915: move modesetting output/encoder code under display/") Fixes: df0566a641f9 ("drm/i915: move modesetting core code under display/") Cc: Chris Wilson <[email protected]> Cc: Rodrigo Vivi <[email protected]> Cc: Ville Syrjälä <[email protected]> Cc: Maarten Lankhorst <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-06-17drm/i915/ehl: Introduce Mule Creek Canyon PCHMatt Roper7-10/+74
Although EHL introduces a new PCH, the South Display part of the PCH that we care about is nearly identical to ICP, just with some pins remapped. Most notably, Port C is mapped to the pins that ICP uses for TC Port 1. Signed-off-by: Matt Roper <[email protected]> Reviewed-by: José Roberto de Souza <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-06-17drm/i915/gtt: Serialise both updates to PDE and our shadowChris Wilson1-60/+73
Currently, we perform a locked update of the shadow entry when allocating a page directory entry such that if two clients are concurrently allocating neighbouring ranges we only insert one new entry for the pair of them. However, we also need to serialise both clients wrt to the actual entry in the HW table, or else we may allow one client or even a third client to proceed ahead of the HW write. My handwave before was that under the _pathological_ condition we would see the scratch entry instead of the expected entry, causing a temporary glitch. That starvation condition will eventually show up in practice, so fix it. The reason for the previous cheat was to avoid having to free the extra allocation while under the spinlock. Now, we keep the extra entry allocated until the end instead. v2: Fix error paths for gen6 Fixes: 1d1b5490b91c ("drm/i915/gtt: Replace struct_mutex serialisation for allocation") Signed-off-by: Chris Wilson <[email protected]> Cc: Matthew Auld <[email protected]> Cc: Mika Kuoppala <[email protected]> Reviewed-by: Matthew Auld <[email protected]> Reviewed-by: Mika Kuoppala <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-06-17drm/i915/dmc: protect against loading wrong firmwareLucas De Marchi1-3/+11
In intel_package_header version 2 there's a new field in the fw_info table that must be 0, otherwise it's not the correct DMC firmware. Add a check for version 2 or later. Signed-off-by: Lucas De Marchi <[email protected]> Reviewed-by: Anusha Srivatsa <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-06-17drm/i915/dmc: remove redundant return in parse_csr_fw()Lucas De Marchi1-11/+6
parse_csr_fw() is responsible to set up several fields in struct intel_csr, including the payload. We don't need to assign it again. Signed-off-by: Lucas De Marchi <[email protected]> Reviewed-by: Anusha Srivatsa <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-06-17drm/i915/dmc: add support to load dmc_header version 3Lucas De Marchi2-30/+95
Main difference is that now there are up to 20 MMIOs that can be set and a lot of noise due to the struct changing the fields in the middle. Signed-off-by: Lucas De Marchi <[email protected]> Reviewed-by: Anusha Srivatsa <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-06-17drm/i915/dmc: extract function to parse dmc_headerLucas De Marchi1-56/+74
Complete the extraction of functions to parse specific parts of the firmware. The return of the function parse_csr_fw() is now redundant since it already sets the dmc_payload field. Changing it is left for later to avoid noise in the commit. Signed-off-by: Lucas De Marchi <[email protected]> Reviewed-by: Anusha Srivatsa <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-06-17drm/i915/dmc: extract function to parse package_headerLucas De Marchi1-51/+66
Like parse_csr_fw_css() this parses the package_header from firmware and saves the relevant fields in the csr struct. In this function we also lookup the fw_info we are interested in. Signed-off-by: Lucas De Marchi <[email protected]> Reviewed-by: Anusha Srivatsa <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-06-17drm/i915/dmc: extract function to parse css headerLucas De Marchi1-25/+41
Let's start splitting the parse function, making all of them return the number of bytes parsed - different versions of the firmware header may require different sizes for the structures. v2: rework remaining bytes calculation on new protection for amount of bytes read Signed-off-by: Lucas De Marchi <[email protected]> Reviewed-by: Anusha Srivatsa <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-06-17drm/i915/dmc: add support for package_header with version 2Lucas De Marchi1-12/+26
The only meaninful change is that it supports up to 32 fw_info entries rather than the previous max=20. Signed-off-by: Lucas De Marchi <[email protected]> Reviewed-by: Anusha Srivatsa <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-06-17drm/i915/dmc: extract fw_info and table walk from intel_package_headerLucas De Marchi1-17/+55
Move fw_info out of struct intel_package_header to allow it to grow more easily in future. To make a cleaner move, let's also extract a function to search the header for the dmc_offset. While reviewing this code I wondered why we continued the search even after finding a suitable firmware. Add a comment to explain we will continue to try to find a more specific firmware version, even if this is not required by the spec. Signed-off-by: Lucas De Marchi <[email protected]> Reviewed-by: Anusha Srivatsa <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-06-17drm/i915/dmc: use kernel typesLucas De Marchi1-5/+5
Change all fields in intel_package_header and intel_dmc_header whose meaning are 1-byte numbers to use u8. Signed-off-by: Lucas De Marchi <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Reviewed-by: Anusha Srivatsa <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-06-17drm/gem: Unexport drm_gem_(un)pin/v(un)mapDaniel Vetter3-37/+5
They're purely for internal use, not for drivers. Cc: Noralf Trønnes <[email protected]> Cc: Christian König <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Daniel Vetter <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-06-17drm/todo: Improve drm_gem_object funcs todoDaniel Vetter1-0/+4
We're kinda going in the wrong direction. Spotted while typing better gem/prime docs. Cc: Thomas Zimmermann <[email protected]> Cc: Gerd Hoffmann <[email protected]> Cc: Rob Herring <[email protected]> Cc: Noralf Trønnes <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Acked-by: Gerd Hoffmann <[email protected]> Signed-off-by: Daniel Vetter <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-06-17drm/i915/gtt: Generalize alloc_pdMika Kuoppala1-52/+36
Allocate all page directory variants with alloc_pd. As the lvl3 and lvl4 variants differ in manipulation, we need to check for existence of backing phys page before accessing it. v2: use err in returns Signed-off-by: Mika Kuoppala <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-06-17drm/i915/gtt: Introduce init_pdMika Kuoppala1-23/+14
All page directories, excluding last level, are initialized with pointer to next level page directories. Make common function for it. Signed-off-by: Mika Kuoppala <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-06-17drm/i915/gtt: Introduce init_pd_with_pageMika Kuoppala1-8/+8
We set the page directory entries to point into a page table. There is no gen specifics in here so make it simple and obvious. Signed-off-by: Mika Kuoppala <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-06-17drm/i915/gtt: Use a common type for page directoriesMika Kuoppala6-215/+236
All page directories are identical in function, only the position in the hierarchy differ. Use same base type for directory functionality. v2: cleanup, size always 512, init to null Cc: Chris Wilson <[email protected]> Cc: Joonas Lahtinen <[email protected]> Cc: Matthew Auld <[email protected]> Cc: Abdiel Janulgue <[email protected]> Signed-off-by: Mika Kuoppala <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-06-17drm/i915/gtt: No need to zero the table for page dirsMika Kuoppala1-2/+2
We set them to scratch right after allocation so prevent useless zeroing before. v2: atomic_t v3: allow pdp alloc fail Cc: Chris Wilson <[email protected]> Signed-off-by: Mika Kuoppala <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-06-17drm/i915: no need to check return value of debugfs_create functionsGreg Kroah-Hartman1-13/+7
When calling debugfs functions, there is no need to ever check the return value. The function can work or not, but the code logic should never do something different based on this. Cc: Jani Nikula <[email protected]> Cc: Joonas Lahtinen <[email protected]> Cc: Rodrigo Vivi <[email protected]> Cc: David Airlie <[email protected]> Cc: Daniel Vetter <[email protected]> Cc: [email protected] Cc: [email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-06-17drm/i915: move modesetting core code under display/Jani Nikula77-103/+94
Now that we have a new subdirectory for display code, continue by moving modesetting core code. display/intel_frontbuffer.h sticks out like a sore thumb, otherwise this is, again, a surprisingly clean operation. v2: - don't move intel_sideband.[ch] (Ville) - use tabs for Makefile file lists and sort them Cc: Chris Wilson <[email protected]> Cc: Joonas Lahtinen <[email protected]> Cc: Rodrigo Vivi <[email protected]> Cc: Ville Syrjälä <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Acked-by: Rodrigo Vivi <[email protected]> Acked-by: Maarten Lankhorst <[email protected]> Acked-by: Ville Syrjälä <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-06-17drm/i915/icl: Add Multi-segmented gamma supportShashank Sharma2-5/+123
ICL introduces a new gamma correction mode in display engine, called multi-segmented-gamma mode. This mode allows users to program the darker region of the gamma curve with sueprfine precision. An example use case for this is HDR curves (like PQ ST-2084). If we plot a gamma correction curve from value range between 0.0 to 1.0, ICL's multi-segment has 3 different sections: - superfine segment: 9 values, ranges between 0 - 1/(128 * 256) - fine segment: 257 values, ranges between 0 - 1/(128) - corase segment: 257 values, ranges between 0 - 1 This patch: - Changes gamma LUTs size for ICL/GEN11 to 262144 entries (8 * 128 * 256), so that userspace can program with highest precision supported. - Changes default gamma mode (non-legacy) to multi-segmented-gamma mode. - Adds functions to program/detect multi-segment gamma. V2: Addressed review comments from Ville - separate function for superfine and fine segments. - remove enum for segments. - reuse last entry of the LUT as gc_max value. - replace if() ....cond with switch...case in icl_load_luts. - add an entry variable, instead of 'word' V3: Addressed review comments from Ville - extra newline - s/entry/color/ - remove LUT size checks - program ilk_lut_12p4_ldw value before ilk_lut_12p4_udw - Change the comments in description of fine and coarse segments, and try to make more sense. - use 8 * 128 instead of 1024 - add 1 entry in LUT for GCMAX V4: Addressed review comments from Ville - Remove unused macro - missing shift entry in blue - pick correct entry for GCMAX - Added Ville's R-B Note: Tested and confirmed the programming sequence of odd/even registers in the HW. The correct sequence should be: ilk_lut_12p4_udw ilk_lut_12p4_ldw v5: Addressed Ville's review comments and renamed odd/even register helpers to be more consistent with the values. Cc: Ville Syrjälä <[email protected]> Cc: Maarten Lankhorst <[email protected]> Cc: Daniel Vetter <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Suggested-by: Ville Syrjälä <[email protected]> Signed-off-by: Shashank Sharma <[email protected]> Signed-off-by: Uma Shankar <[email protected]> Signed-off-by: Maarten Lankhorst <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-06-17drm/i915: Rename ivb_load_lut_10_maxShashank Sharma1-7/+7
This patch renames function ivb_load_lut_10_max to ivb_load_lut_ext_max. V3: Added Vill'es r-b. Cc: Uma Shankar <[email protected]> Suggested-by: Ville Syrjala <[email protected]> Reviewed-by: Ville Syrjala <[email protected]> Signed-off-by: Shashank Sharma <[email protected]> Signed-off-by: Maarten Lankhorst <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-06-17drm/i915/icl: Add register definitions for Multi Segmented gammaUma Shankar1-1/+18
Add macros to define multi segmented gamma registers V2: Addressed Ville's comments: Add gen-lable before bit definition Addressed Jani's comment - Use REG_GENMASK() and REG_BIT() V3: Addressed Ville's comments: - Put comments at the end of line. - Change the comment at start of ICL multisegmented gamma registers. Added Ville's r-b Cc: Ville Syrjälä <[email protected]> Cc: Jani Nikula <[email protected]> Cc: Maarten Lankhorst <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: Uma Shankar <[email protected]> Signed-off-by: Shashank Sharma <[email protected]> Signed-off-by: Maarten Lankhorst <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-06-17drm/i915: Change gamma/degamma_lut_size data type to u32Shashank Sharma1-2/+2
Currently, data type of gamma_lut_size & degamma_lut_size elements in intel_device_info is u16, which means it can accommodate maximum 64k values. In case of ICL multisegmented gamma, the size of gamma LUT is 256K. This patch changes the data type of both of these elements to u32. Cc: Ville Syrjälä <[email protected]> Cc: Maarten Lankhorst <[email protected]> Cc: Uma Shankar <[email protected]> V4: Added Uma's r-b. Reviewed-by: Uma Shankar <[email protected]> Signed-off-by: Shashank Sharma <[email protected]> Signed-off-by: Maarten Lankhorst <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-06-17drm/i915: Nuke atomic set/get prop plane stubsMaarten Lankhorst4-67/+0
They have been unused since rotation was added to drm core in 2015, time to get rid of them. Signed-off-by: Maarten Lankhorst <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Ville Syrjälä <[email protected]>
2019-06-17drm/i915: move modesetting output/encoder code under display/Jani Nikula61-70/+82
Add a new subdirectory for display code, and start off by moving modesetting output/encoder code. Judging by the include changes, this is a surprisingly clean operation. v2: - move intel_sdvo_regs.h too - use tabs for Makefile file lists and sort them Cc: Chris Wilson <[email protected]> Cc: Joonas Lahtinen <[email protected]> Cc: Rodrigo Vivi <[email protected]> Cc: Ville Syrjälä <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Acked-by: Rodrigo Vivi <[email protected]> Acked-by: Maarten Lankhorst <[email protected]> Acked-by: Ville Syrjälä <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-06-17drm/i915: make intel_sdvo_regs.h self-containedJani Nikula2-0/+9
Ensure intel_sdvo_regs.h is self-contained and remains that way. v2: - include <linux/compiler.h> for __packed (Chris) Cc: Chris Wilson <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Acked-by: Maarten Lankhorst <[email protected]> Acked-by: Ville Syrjälä <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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