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All clockevent devices have the same open coded initialization
functions. Provide an interface which does all necessary
initialization in the core code.
Signed-off-by: Thomas Gleixner <[email protected]>
Cc: John Stultz <[email protected]>
Reviewed-by: Ingo Molnar <[email protected]>
Link: http://lkml.kernel.org/r/%3C20110518210136.331975870%40linutronix.de%3E
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Group the hot path members of struct clock_event_device together so we
have a better cache line footprint. Make it cacheline aligned.
Signed-off-by: Thomas Gleixner <[email protected]>
Cc: John Stultz <[email protected]>
Reviewed-by: Ingo Molnar <[email protected]>
Link: http://lkml.kernel.org/r/%3C20110518210136.223607682%40linutronix.de%3E
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Slow clocksources can have a way longer sleep time than 5 seconds and
even fast ones can easily cope with 600 seconds and still maintain
proper accuracy.
Signed-off-by: Thomas Gleixner <[email protected]>
Cc: John Stultz <[email protected]>
Reviewed-by: Ingo Molnar <[email protected]>
Link: http://lkml.kernel.org/r/%3C20110518210136.109811585%40linutronix.de%3E
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Group the hot path members of struct clocksource together so we have a
better cache line footprint. Make it cacheline aligned.
Signed-off-by: Thomas Gleixner <[email protected]>
Cc: John Stultz <[email protected]>
Cc: Eric Dumazet <[email protected]>
Reviewed-by: Ingo Molnar <[email protected]>
Link: http://lkml.kernel.org/r/%3C20110518210136.003081882%40linutronix.de%3E
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Modifications to recordmcount must be performed on all object
files to stay consistent with what the kernel code may expect.
Add the recordmcount files to the main dependencies to make sure
any change to them causes a full recompile.
Signed-off-by: Michal Marek <[email protected]>
Link: http://lkml.kernel.org/r/[email protected]
Signed-off-by: Steven Rostedt <[email protected]>
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It never really belonged into syscall.c and it's about to become well more
complex.
Signed-off-by: Ralf Baechle <[email protected]>
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As noticed by Kevin Cernekee <[email protected]> in
http://www.linux-mips.org/cgi-bin/extract-mesg.cgi?a=linux-mips&m=2011-05&i=BANLkTikq04wuK%3Dbz%2BLieavmm3oDtoYWKxg%40mail.gmail.com
Patchwork: https://patchwork.linux-mips.org/patch/2387/
Signed-off-by: Ralf Baechle <[email protected]>
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We only use the three low-order mailbox bits. Leave the upper bits alone
for possible use by drivers and other software.
Signed-off-by: David Daney <[email protected]>
To: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/2090/
Signed-off-by: Ralf Baechle <[email protected]>
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Octeon uses different interrupt irq for timer and performance counters.
Set CvmCtl[IPPCI] to correct irq value very early.
Signed-off-by: Chandrakala Chavva <[email protected]>
Signed-off-by: David Daney <[email protected]>
To: [email protected]
Cc: Chandrakala Chavva <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/2085/
Signed-off-by: Ralf Baechle <[email protected]>
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Since d45dcef77019012fc6769e657fc2f1a5d681bbbb ["Bluetooth: Fix BT_L2CAP
and BT_SCO in Kconfig"] BT_L2CAP=m and BT_SCO=m are no longer valid so
change the settings from m to y.
[[email protected]: Merging only the MIPS parts of this patch.]
Signed-off-by: Wanlong Gao <[email protected]>
To: [email protected]
To: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/2277/
Signed-off-by: Ralf Baechle <[email protected]>
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Since 5ada28bf76752e33dce3d807bf0dfbe6d1b943ad ["led-class: always
implement blinking"] LEDS_CLASS=m is no longer valid so change the setting
from m to y.
Signed-off-by: Wanlong Gao <[email protected]>
To: [email protected]
To: [email protected]
To: [email protected]
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/2276/
Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Robert Millan <[email protected]>
Acked-by: David Daney <[email protected]>
Signed-off-by: Kevin Cernekee <[email protected]>
Cc: David Daney <[email protected]>
Cc: wu zhangjin <[email protected]>
Cc: Aurelien Jarno <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/2302/
Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Kevin Cernekee <[email protected]>
Cc: Robert Millan <[email protected]>
Cc: David Daney <[email protected]>
Cc: wu zhangjin <[email protected]>
Cc: Aurelien Jarno <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/2300/
Signed-off-by: Ralf Baechle <[email protected]>
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Replace these sequences:
if (cpu == 0)
__elf_platform = "foo";
with a trivial inline function.
Signed-off-by: Robert Millan <[email protected]>
Signed-off-by: Kevin Cernekee <[email protected]>
Signed-off-by: David Daney <[email protected]>
Cc: wu zhangjin <[email protected]>
Cc: Aurelien Jarno <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/2304/
Patchwork: https://patchwork.linux-mips.org/patch/2374/
Signed-off-by: Ralf Baechle <[email protected]>
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Assume that the boot loader knows the physical memory of the system and
deduce that information from the contents of the SDRAM control register.
It is still possible to override with with the "mem=" parameter, but we
have a sensible default now.
Signed-off-by: Maarten ter Huurne <[email protected]>
Acked-by: Lars-Peter Clausen <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/2319/
Signed-off-by: Ralf Baechle <[email protected]>
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Some devices like the Netgear WGT634u are using minuses between the blocks
of the MAC address and other devices are using colons to separate them.
Signed-off-by: Hauke Mehrtens <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/2366/
Signed-off-by: Ralf Baechle <[email protected]>
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Some members of the struct ssb_sprom where not filled with data available
in the NVRAM. Some attribute names in the NVRAM changed from SPROM version
3 to version 4. This patch was done by analyzing the the pci sprom parser
in the ssb code and some open source parts of the braodcom wireless driver
used on embedded devices.
Signed-off-by: Hauke Mehrtens <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/2365/
Signed-off-by: Ralf Baechle <[email protected]>
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We are generating the prefix based on the PCI bus address the device is
on. This is done like Broadcom does it in their code expect that the the
bus number is increased by one. In the SB bus implementation used by
Broadcom the SB bus emulates a PCI bus so the kernel sees one PCI bus
more then in our implementation. We do not handle prefixes like sb/1/
yet as they are only used on the new bus which is not implemented yet.
Signed-off-by: Hauke Mehrtens <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/2364/
Signed-off-by: Ralf Baechle <[email protected]>
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When an other SSB based device without an own SPROM is attached, using the
PCI bus to the main SSB based device, the data normally found in the SPROM
will be stored in the NVRAM on modern devices. The keys, to load the data
from the NVRAM, are all using some sort of prefix like pci/1/1/, pci/1/3/
or sb/1/ before the actual key. This patch extends bcm47xx_fill_sprom() to
make it possible to read out these values when some prefix was used.
The keys for the SPROM data used on the main chip does not have a prefix.
Signed-off-by: Hauke Mehrtens <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/2363/
Signed-off-by: Ralf Baechle <[email protected]>
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Some embedded devices like the Netgear WNDR3300 have two SSB based cards
without an own sprom on the pci bus. We have to provide two different
fallback sproms for these and this was not possible with the old solution.
In the bcm47xx architecture the sprom data is stored in the nvram in the
main flash storage. The architecture code will be able to fill the sprom
with the stored data based on the bus where the device was found.
The bcm63xx code should do the same thing as before, just using the new
API.
Acked-by: Michael Buesch <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: Florian Fainelli <[email protected]>
Signed-off-by: Hauke Mehrtens <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/2362/
Signed-off-by: Ralf Baechle <[email protected]>
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remove au_readl/au_writel, remove the predefined GPIO1/2 KSEG1 register
addresses and fix the fallout in all boards and drivers.
This also fixes a bug in the mtx-1_wdt driver which was introduced by
commit 6ea8115bb6f359df4f45152f2b40e1d4d1891392
("Convert mtx1 wdt to be a platform device and use generic GPIO API")
before this patch mtx-1_wdt only modified GPIO215, the patch then
used the gpio resource information as bit index into the GPIO2 register
but the conversion to the GPIO API didn't realize that.
With this patch the drivers original behaviour is restored and GPIO15
is left alone.
Signed-off-by: Manuel Lauss <[email protected]>
Cc: Florian Fainelli <[email protected]>
To: Linux-MIPS <[email protected]>
Cc: [email protected]
Cc: Wim Van Sebroeck <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/2381/
Signed-off-by: Ralf Baechle <[email protected]
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According to the databooks, the Au1000 DMA engine must be programmed with
the physical FIFO addresses. This patch does that; furthermore this
opened the possibility to get rid of a lot of now unnecessary address
defines.
Signed-off-by: Manuel Lauss <[email protected]>
To: Linux-MIPS <[email protected]>
Cc: Florian Fainelli <[email protected]>
Cc: Wolfgang Grandegger <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/2348/
Signed-off-by: Ralf Baechle <[email protected]
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Rewrite ethernet setup to use runtime cpu detection, and also clean up
the ethernet base address mess as far as possible.
Signed-off-by: Manuel Lauss <[email protected]>
To: Linux-MIPS <[email protected]>
Cc: Florian Fainelli <[email protected]>
Cc: Wolfgang Grandegger <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/2353/
Signed-off-by: Ralf Baechle <[email protected]
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Detect CPU type at runtime and setup uarts accordingly; also clean up the
uart base address mess in the process as far as possible.
Signed-off-by: Manuel Lauss <[email protected]>
To: Linux-MIPS <[email protected]>
Cc: Florian Fainelli <[email protected]>
Cc: Wolfgang Grandegger <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/2352/
Signed-off-by: Ralf Baechle <[email protected]
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Convert the PM sysdev to syscore_ops and clean up the ddma addresses a bit.
Signed-off-by: Manuel Lauss <[email protected]>
To: Linux-MIPS <[email protected]>
Cc: Florian Fainelli <[email protected]>
Cc: Wolfgang Grandegger <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/2351/
Signed-off-by: Ralf Baechle <[email protected]>
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Convert the PM sysdev to use syscore_ops instead.
Signed-off-by: Manuel Lauss <[email protected]>
To: Linux-MIPS <[email protected]>
Cc: Florian Fainelli <[email protected]>
Cc: Wolfgang Grandegger <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/2350/
Signed-off-by: Ralf Baechle <[email protected]>
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replace au_readl/au_writel with __raw_readl/__raw_writel,
and clean up IC-related stuff from the headers.
Signed-off-by: Manuel Lauss <[email protected]>
To: Linux-MIPS <[email protected]>
Cc: Florian Fainelli <[email protected]>
Cc: Wolfgang Grandegger <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/2354/
Signed-off-by: Ralf Baechle <[email protected]>
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This fixes a build failure with gpio_keys and CONFIG_GPIOLIB=n (mtx1):
CC drivers/input/keyboard/gpio_keys.o
gpio_keys.c: In function 'gpio_keys_report_event':
gpio_keys.c:325:2: error: implicit declaration of function 'gpio_get_value_cansleep'
gpio_keys.c: In function 'gpio_keys_setup_key':
gpio_keys.c:390:3: error: implicit declaration of function 'gpio_set_debounce'
Also add stubs for the other new functions.
Signed-off-by: Manuel Lauss <[email protected]>
To: Linux-MIPS <[email protected]>
Cc: Florian Fainelli <[email protected]>
Cc: Wolfgang Grandegger <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/2346/
Signed-off-by: Ralf Baechle <[email protected]>
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Setting Config[OD] gets rid of a _LOT_ of spurious CPLD interrupts,
but also decreases overall performance a bit.
Signed-off-by: Manuel Lauss <[email protected]>
To: Linux-MIPS <[email protected]>
Cc: Florian Fainelli <[email protected]>
Cc: Wolfgang Grandegger <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/2347/
Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Ralf Baechle <[email protected]>
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This patch adds the driver for the watchdog found inside the Lantiq SoC family.
Signed-off-by: John Crispin <[email protected]>
Signed-off-by: Ralph Hempel <[email protected]>
Cc: Wim Van Sebroeck <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/2327/
Signed-off-by: Ralf Baechle <[email protected]>
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Register the etop platform device inside the machtype specific init code.
Signed-off-by: John Crispin <[email protected]>
Signed-off-by: Ralph Hempel <[email protected]>
Signed-off-by: David Daney <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/2356/
Patchwork: https://patchwork.linux-mips.org/patch/2370/
Signed-off-by: Ralf Baechle <[email protected]>
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This patch adds the driver for the ETOP Packet Processing Engine (PPE32)
found inside the XWAY family of Lantiq MIPS SoCs. This driver makes 100MBit
ethernet work. Support for all 8 dma channels, gbit and the embedded switch
found on the ar9/vr9 still needs to be implemented.
Signed-off-by: John Crispin <[email protected]>
Signed-off-by: Ralph Hempel <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/2357/
Acked-by: David S. Miller <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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This patch adds support for the DMA engine found inside the XWAY family of
SoCs. The engine has 5 ports and 20 channels.
Signed-off-by: John Crispin <[email protected]>
Signed-off-by: Ralph Hempel <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/2355/
Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: John Crispin <[email protected]>
Signed-off-by: Ralph Hempel <[email protected]>
Signed-off-by: Felix Fietkau <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/2269/
Acked-by: Alan Cox <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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The XWAY family allows to extend the number of gpios by using shift
registers or latches. This patch adds the 2 drivers needed for this. The
extended gpios are output only.
[[email protected]: Fixed ltq_stp_probe section() attributes.]
Signed-off-by: John Crispin <[email protected]>
Signed-off-by: Ralph Hempel <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/2258/
Signed-off-by: Ralf Baechle <[email protected]>
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This patch adds mach specific code for the Lantiq EASY50712/50601 evaluation
boards
Signed-off-by: John Crispin <[email protected]>
Signed-off-by: Ralph Hempel <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/2255/
Patchwork: https://patchwork.linux-mips.org/patch/2361/
Signed-off-by: Ralf Baechle <[email protected]>
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This patch adds support for Gabor's mips_machine patch.
Signed-off-by: John Crispin <[email protected]>
Signed-off-by: Ralph Hempel <[email protected]>
Cc: Gabor Juhos <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/2251/
Patchwork: https://patchwork.linux-mips.org/patch/2358/
Signed-off-by: Ralf Baechle <[email protected]>
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This patch adds the wrappers for registering our platform devices.
Signed-off-by: John Crispin <[email protected]>
Signed-off-by: Ralph Hempel <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/2254/
Patchwork: https://patchwork.linux-mips.org/patch/2360/
Patchwork: https://patchwork.linux-mips.org/patch/2359/
Signed-off-by: Ralf Baechle <[email protected]>
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This patch adds the driver/map for NOR devices attached to the SoC via the
External Bus Unit (EBU).
Signed-off-by: John Crispin <[email protected]>
Signed-off-by: Ralph Hempel <[email protected]>
Cc: David Woodhouse <[email protected]>
Cc: Daniel Schwierzeck <[email protected]>
Cc: [email protected]
Cc: [email protected]
Acked-by: Artem Bityutskiy <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/2285/
Signed-off-by: Ralf Baechle <[email protected]>
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The Lantiq family of SoCs have a EBU (External Bus Unit). This patch adds
the driver that allows us to use the EBU as a PCI controller. In order for
PCI to work the EBU is set to endianess swap all the data. In addition we
need to make use of SWAP_IO_SPACE for device->host DMA to work.
The clock of the PCI works in several modes (internal/external). If this
is not configured correctly the SoC will hang.
Signed-off-by: John Crispin <[email protected]>
Signed-off-by: Ralph Hempel <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/2250/
Signed-off-by: Ralf Baechle <[email protected]>
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Add support for the Lantiq XWAY family of Mips24KEc SoCs.
* Danube (PSB50702)
* Twinpass (PSB4000)
* AR9 (PSB50802)
* Amazon SE (PSB5061)
The Amazon SE is a lightweight SoC and has no PCI as well as a different
clock. We split the code out into seperate files to handle this.
The GPIO pins on the SoCs are multi function and there are several bits
we can use to configure the pins. To be as compatible as possible to
GPIOLIB we add a function
int lq_gpio_request(unsigned int pin, unsigned int alt0,
unsigned int alt1, unsigned int dir, const char *name);
which lets you configure the 2 "alternate function" bits. This way drivers like
PCI can make use of GPIOLIB without a cubersome wrapper.
The PLL code inside arch/mips/lantiq/xway/clk-xway.c is voodoo to me. It was
taken from a 2.4.20 source tree and was never really changed by me since then.
Signed-off-by: John Crispin <[email protected]>
Signed-off-by: Ralph Hempel <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/2249/
Signed-off-by: Ralf Baechle <[email protected]>
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Add initial support for Mips based SoCs made by Lantiq. This series will add
support for the XWAY family.
The series allows booting a minimal system using a initramfs or NOR. Missing
drivers and support for Amazon and GPON family will be provided in a later
series.
[Ralf: Remove some cargo cult programming and fixed formatting.]
Signed-off-by: John Crispin <[email protected]>
Signed-off-by: Ralph Hempel <[email protected]>
Signed-off-by: David Daney <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/2252/
Patchwork: https://patchwork.linux-mips.org/patch/2371/
Signed-off-by: Ralf Baechle <[email protected]>
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Signed-off-by: Maxin B. John <[email protected]>
To: Catalin Marinas <[email protected]>
Cc: Daniel Baluta <[email protected]>
Cc: naveen yadav <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/2244/
Signed-off-by: Ralf Baechle <[email protected]>
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Adds pci/pci-xlr.c to support for XLR PCI/PCI-X interface and XLS PCIe
interface.
Update irq.c to ack PCI interrupts, use irq handler data to do the
PCI/PCIe bus ack.
Signed-off-by: Jayachandran C <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/2337/
Signed-off-by: Ralf Baechle <[email protected]>
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Enable XLR CPU support, SMP, initramfs based root filesystem etc.
[[email protected]: shrink the defconfig file through make savedefconfig.]
Signed-off-by: Jayachandran C <[email protected]>
To: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/2338/
Signed-off-by: Ralf Baechle <[email protected]>
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Add NLM_XLR_BOARD, CPU_XLR and other config options
Makefile updates, mostly based on r4k
Signed-off-by: Jayachandran C <[email protected]>
To: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/2334/
Signed-off-by: Ralf Baechle <[email protected]>
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* include/asm/netlogic added with files common for all Netlogic processors
(common with XLP which will be added later)
* include/asm/netlogic/xlr for XLR/XLS chip specific files
* netlogic/xlr for XLR/XLS platform files
Signed-off-by: Jayachandran C <[email protected]>
To: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/2334/
Signed-off-by: Ralf Baechle <[email protected]>
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