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2010-10-05drm/nouveau: parse voltage from perf 0x40 entiresBen Skeggs1-1/+1
This was disabled previously because of some uncertainty that +2 was indeed the voltage. It appears it is, checked on a NVA8 and a NVA3M. Signed-off-by: Ben Skeggs <[email protected]>
2010-10-05drm/nouveau: don't use the default pll limits in table v2.1 on nv50+ cardsEmil Velikov1-0/+6
This fixes issues bug 30370 and prevents another possible divide by zero on the original nv50 cards, by returning -ENOENT Signed-off-by: Emil Velikov <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2010-10-05drm/nv50: Fix large 3D performance regression caused by the interchannel ↵Francisco Jerez2-7/+40
sync patches. Reported-by: Christoph Bumiller <[email protected]> Signed-off-by: Francisco Jerez <[email protected]> Tested-by: Maarten Maathuis <[email protected]> Tested-by: Xavier Chantry <[email protected]> Tested-by: Ben Skeggs <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2010-10-05drm/nouveau: Synchronize buffer object moves in hardware.Francisco Jerez1-3/+8
Signed-off-by: Francisco Jerez <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2010-10-05drm/nouveau: Use semaphores to handle inter-channel sync in hardware.Francisco Jerez4-3/+212
Signed-off-by: Francisco Jerez <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2010-10-05drm/nouveau: Provide a means to have arbitrary work run on fence completion.Francisco Jerez2-0/+33
Signed-off-by: Francisco Jerez <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2010-10-05drm/nouveau: Minor refactoring/cleanup of the fence code.Francisco Jerez6-55/+59
Mainly to make room for inter-channel sync. Signed-off-by: Francisco Jerez <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2010-10-05drm/nouveau: Add a module option to force card POST.Marcin Kościelnicki3-0/+7
Signed-off-by: Ben Skeggs <[email protected]>
2010-10-05drm/nv50: prevent (IB_PUT == IB_GET) for occurring unless idleBen Skeggs1-1/+1
Should fix a DMA race condition I've never seen myself, but could be the culprit in some random hangs that have been reported. Signed-off-by: Ben Skeggs <[email protected]>
2010-10-05drm/nv0x-nv4x: Leave the 0x40 bit untouched when changing CRE_LCD.Francisco Jerez5-11/+7
It's an unrelated PLL filtering control bit, leave it alone when changing the CRTC-encoder binding. Signed-off-by: Francisco Jerez <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2010-10-05drm/nv30-nv40: Fix postdivider mask when writing engine/memory PLLs.Francisco Jerez1-1/+1
Signed-off-by: Francisco Jerez <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2010-10-05drm/nouveau: Fix perf table parsing on BMP v5.25.Francisco Jerez1-1/+1
Signed-off-by: Francisco Jerez <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2010-10-05drm/nouveau: fix required mode bandwidth calculation for DPBen Skeggs2-1/+20
This should fix eDP on certain laptops with 18-bit panels, we were rejecting the panel's native mode due to thinking there was insufficient bandwidth for it. Signed-off-by: Ben Skeggs <[email protected]>
2010-10-05drm/nouveau: fix typo in c2aa91afea5f7e7ae4530fabd37414a79c03328cBen Skeggs1-1/+1
Signed-off-by: Ben Skeggs <[email protected]>
2010-10-05drm/nva3: split pm backend out from nv50Ben Skeggs5-42/+137
This will end up quite different, it makes sense for it to be completely separate. Signed-off-by: Ben Skeggs <[email protected]>
2010-10-05drm/nouveau: run perflvl and M table scripts on mem clock changeBen Skeggs3-0/+25
Signed-off-by: Ben Skeggs <[email protected]>
2010-10-05drm/nouveau: pass perflvl struct to clock_pre()Ben Skeggs5-11/+17
On certain boards, there's BIOS scripts and memory timings that need to be modified with the memclk. Just pass in the entire perflvl struct and let the chipset-specific code decide what to do. Signed-off-by: Ben Skeggs <[email protected]>
2010-10-05drm/nouveau: enable enhanced framing only if DP display supports itBen Skeggs2-2/+6
Reported-by: Adam Jackson <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2010-10-05drm/nouveau: Import initial memory timing workRoy Spliet4-1/+169
This isn't correct everywhere yet, but since we don't use the data yet it's perfectly safe to push in, and the information we gain from logs will help to fix the remaining issues. v2 (Ben Skeggs <[email protected]>): - fixed up formatting - free parsed timing info on takedown - switched timing table printout to debug loglevel Signed-off-by: Roy Spliet <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2010-09-24drm/nv50: use pll type rather than register for CRTC PLLBen Skeggs1-19/+14
Just in case someone, somewhere, does something difficult. This also removes one path that was different between fermi and non-fermi. Signed-off-by: Ben Skeggs <[email protected]>
2010-09-24drm/nouveau: v3.0 pll limits tables have type<->register mapping tooBen Skeggs1-1/+1
Signed-off-by: Ben Skeggs <[email protected]>
2010-09-24drm/nouveau: Misc cleanup of the PM code.Francisco Jerez3-7/+6
Signed-off-by: Francisco Jerez <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2010-09-24drm/nouveau: Add support for I2C hardware monitoring devices.Francisco Jerez5-9/+58
Signed-off-by: Francisco Jerez <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2010-09-24drm/nouveau: Refactor nouveau_temp_get() into engine pointers.Francisco Jerez5-39/+43
Signed-off-by: Francisco Jerez <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2010-09-24drm/nouveau: Double the perf table memory clocks on pre-G71 cards.Francisco Jerez1-2/+8
Signed-off-by: Francisco Jerez <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2010-09-24drm/nouveau: Fix parsing of the temperature constant correction.Francisco Jerez1-2/+2
Signed-off-by: Francisco Jerez <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2010-09-24drm/nouveau: Add sane sensor correction defaults for nv4a.Francisco Jerez1-0/+1
Signed-off-by: Francisco Jerez <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2010-09-24drm/nv40: fix reading temp valueFrancesco Marella1-2/+2
Signed-off-by: Francesco Marella <[email protected]> Signed-off-by: Francisco Jerez <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2010-09-24drm/nouveau: Don't try to parse a GPIO table on early DCBv2.2 BIOSes.Francisco Jerez1-1/+14
Signed-off-by: Francisco Jerez <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2010-09-24drm/nv10: Don't oops if the card wants to switch to a channel with no grctx.Francisco Jerez1-1/+1
Signed-off-by: Francisco Jerez <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2010-09-24drm/nouveau: fix panels using straps-based mode detectionBen Skeggs1-2/+4
nouveau_bios_fp_mode() zeroes the mode struct before filling in relevant entries. This nukes the mode id initialised by drm_mode_create(), and causes warnings from idr when we try to remove the mode. Signed-off-by: Ben Skeggs <[email protected]>
2010-09-24drm/nouveau: fix chipset vs card_type thinkoBen Skeggs1-1/+1
Signed-off-by: Ben Skeggs <[email protected]>
2010-09-24drm/nv50: assume smaller tiles for bo movesBen Skeggs1-4/+4
Somehow fixes some corruption seen in KDE.. Signed-off-by: Ben Skeggs <[email protected]>
2010-09-24drm/nouveau: add debugfs file to forcibly evict everything from vramBen Skeggs1-0/+16
Very useful for debugging buffer migration issues. Signed-off-by: Ben Skeggs <[email protected]>
2010-09-24drm/nouveau: Add temperature support (vbios parsing, readings, hwmon)Martin Peres5-39/+518
Signed-off-by: Martin Peres <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2010-09-24drm/nouveau: correct INIT_DP_CONDITION subcondition 5Ben Skeggs1-1/+1
Fixes DP output on a GTX 465 board I have. Signed-off-by: Ben Skeggs <[email protected]>
2010-09-24drm/nouveau: Parse old style perf tables.Francisco Jerez2-4/+53
Used on nv17-nv28, they contain memory clocks and timings, only one of the table entries can actually be used, depending on the RAMCFG straps, and it's usually higher than the frequency programmed on boot by the BIOS. The memory timings listed in table version 0x1x are used to init the 0x12xx range but they aren't required for reclocking to work. Signed-off-by: Francisco Jerez <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2010-09-24drm/nv50: flush bar1 vm / dma object setup before poking 0x1708Ben Skeggs1-0/+2
Should fix issues noticed on NVAC (MacBook Pro / ION) since gpuobj rework. Signed-off-by: Ben Skeggs <[email protected]>
2010-09-24drm/nouveau: fix thinko in volt 0x1x parsingBen Skeggs1-3/+6
Signed-off-by: Ben Skeggs <[email protected]>
2010-09-24drm/nouveau: implement parsing of DCB 2.2 GPIO tableBen Skeggs1-93/+63
Found on NV3x boards, this should allow voltage modifications to work on these chipsets. Signed-off-by: Ben Skeggs <[email protected]>
2010-09-24drm/nouveau: fix potential accuracy loss when parsing perf 0x1c tablesBen Skeggs1-20/+14
Reported-by: Roy Spliet <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2010-09-24drm/nouveau: Fix build regression, undefined reference to `acpi_video_get_edid'Phil Turmel1-0/+1
Build breakage: drivers/built-in.o: In function `nouveau_acpi_edid': (.text+0x13404e): undefined reference to `acpi_video_get_edid' make: *** [.tmp_vmlinux1] Error 1 Introduced by: a6ed76d7ffc62ffa474b41d31b011b6853c5de32 is the first bad commit commit a6ed76d7ffc62ffa474b41d31b011b6853c5de32 Author: Ben Skeggs <[email protected]> Date: Mon Jul 12 15:33:07 2010 +1000 drm/nouveau: support fetching LVDS EDID from ACPI Based on a patch from Matthew Garrett. Signed-off-by: Ben Skeggs <[email protected]> Acked-by: Matthew Garrett <[email protected]> It doesn't seem to revert cleanly, but the problem lies in these two config entries: CONFIG_ACPI=y CONFIG_ACPI_VIDEO=m Adding a select for ACPI_VIDEO appears to be the best solution, and is comparable to what is done in DRM_I915. Builds, boots, and appears to work correctly. Signed-off-by: Philip J. Turmel <[email protected]> Signed-off-by: Francisco Jerez <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2010-09-24drm/nouveau: restore perflvl on resume, and restore boot perflvl on unloadBen Skeggs3-19/+49
Signed-off-by: Ben Skeggs <[email protected]>
2010-09-24drm/nouveau: allow static performance level settingBen Skeggs6-4/+104
Guarded by a module parameter for the moment, read the code for the magic value which enables it. Signed-off-by: Ben Skeggs <[email protected]>
2010-09-24drm/nv04-nv40: import initial pm backendBen Skeggs5-3/+110
Currently just hooked up to the already-existing nouveau_hw, which should handle all relevant chipsets as well as we currently can. This will likely be eventually split out and improved into chipset specific code at a later point. Signed-off-by: Ben Skeggs <[email protected]>
2010-09-24drm/nv50: import initial clock get/set routines + hook up pm engineBen Skeggs4-1/+138
This will make nouveau_pm attempt to report the card's current performance level both during bootup, and through sysfs. This is a very initial implementation, and can be improved a *lot* Signed-off-by: Ben Skeggs <[email protected]>
2010-09-24drm/nouveau: import initial work on vbios performance table parsingBen Skeggs7-0/+678
Signed-off-by: Ben Skeggs <[email protected]>
2010-09-24drm/nouveau: make bios code easier to use externallyBen Skeggs2-23/+50
Signed-off-by: Ben Skeggs <[email protected]>
2010-09-24drm/nouveau: make the behaviour of get_pll_limits() consistentBen Skeggs6-59/+135
This replaces all the pll_types definitions for ones that match the types used in the tables in recent VBIOS versions. get_pll_limits() will now accept either type or register value as input across all limits table versions, and will store the actual register ID that a PLL type refers to in the returned structure. Signed-off-by: Ben Skeggs <[email protected]>
2010-09-24drm/nv50: fix 100c90 write on nva3Ben Skeggs1-0/+1
Signed-off-by: Ben Skeggs <[email protected]>
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