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git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux into next/dt
DT for 4.13
- Switch to the new NAND binding
- A few non urgent fixes
* tag 'at91-ab-4.13-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux:
ARM: dts: at91: sama5d2_xplained: remove wrong memory node
ARM: dts: at91: sama5d2_xplained: add pwm controller
ARM: dts: at91: Add the NOR flash available on sama5d3 dev kits
ARM: dts: at91: Switch to the new NAND bindings
ARM: dts: at91: Declare EBI/NAND controllers
dt-bindings: mtd: atmel-nand: Document the nfc-io bindings
ARM: dts: at91-sama5d4: use IRQ_TYPE_* to specify irq flags
dts: gpio_atmel: adapt binding doc to reality
ARM: dts: at91: sama5d2: add m_can nodes
ARM: dts: at91: Add generic compatible string for I2C EEPROM
Signed-off-by: Olof Johansson <[email protected]>
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https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Second Round of Renesas ARM Based SoC DT Bindings Updates for v4.13
* Document:
- Add Renesas H3-based Salvator-XS board DT bindings
- Add iW-RainboW-G20D-Qseven-RZG1M board
- Add iW-RainboW-G20M-Qseven-RZG1M system on module
- Update R-Car Gen3 ULCB board part numbers
* Add clock bit definitions for r7s72100 SoC
* tag 'renesas-dt-bindings2-for-v4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: Document Renesas H3-based Salvator-XS board DT bindings
ARM: shmobile: Update R-Car Gen3 ULCB board part numbers
ARM: shmobile: document iW-RainboW-G20D-Qseven-RZG1M board
ARM: shmobile: document iW-RainboW-G20M-Qseven-RZG1M system on module
ARM: dts: r7s72100: add clock bit definitions
Signed-off-by: Olof Johansson <[email protected]>
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https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Second Round of Renesas ARM Based SoC DT Updates for v4.13
Cleanup:
* Correct PCI bus dtc warnings for r8a779x SoCs
Enhancements:
* Add support for iWave G20D-Q7 board based on RZ/G1M SoC
* Add support for GR-Peach board based on r7s72100 SoC
* Add composite video and HDMI input to gose board
* tag 'renesas-dt2-for-v4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: dts: r8a779x: Fix PCI bus dtc warnings
ARM: dts: iwg20d-q7: Add support for iWave G20D-Q7 board based on RZ/G1M
ARM: dts: iwg20m: Add iWave RZG1M Qseven SOM
ARM: dts: gose: add composite video input
ARM: dts: r7s72100: Add support for GR-Peach
ARM: dts: gose: add HDMI input
Signed-off-by: Olof Johansson <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt
Qualcomm Device Tree Changes for v4.13
* Fix IPQ4019 i2c0 node
* Add GSBI7 on IPQ8064
* Add misc APQ8060 devices
* Fixup USB related devices on APQ8064 and MSM8974
* tag 'qcom-dts-for-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
ARM: dts: add core I2C devices to the APQ8060 Dragonboard
ARM: dts: add GSBI8 defines to the MSM8660 family
ARM: dts: Qualcomm APQ8060 DragonBoard ALS sensor
ARM: dts: add XOADC and IIO HWMON to MSM8660/APQ8060
ARM: dts: qcom: ipq4019: fix i2c_0 node
ARM: dts: qcom: add gsbi7 serial to ipq8064 SoC device tree
ARM: dts: qcom-apq8064: Collapse usb support into one node
ARM: dts: qcom-msm8974: Add HS usb node and OTG detection mechanisms
ARM: dts: qcom: add charger otg regulator
ARM: dts: qcom: Remove s4/5vs1,2 from RPM pm8941 control
Signed-off-by: Olof Johansson <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt
ARM: tegra: Device tree changes for v4.13-rc1
This removes support for the Whistler board, which only a handful of
people ever had access to and which doesn't provide any features over
other Tegra20 devices that we support.
Also this cleans up some PCI related device tree content in preparation
for a future DTC release that has additional checks for the PCI bus.
* tag 'tegra-for-4.13-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: dts: tegra: fix PCI bus dtc warnings
ARM: tegra: remove Whistler support
Signed-off-by: Olof Johansson <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Second set of device tree changes for omaps for v4.13 merge
window:
- Updates for droid 4 proximity sensor, WLAN and battery
- Configure clocks for remoteproc devices for omap5 and dra7
- Configure omap4 crypto accelerators
* tag 'omap-for-v4.13/dt-part2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: omap4: add SHAM node
ARM: dts: omap4: add aes2 instance
ARM: dts: omap4.dtsi: remove aes[12]_fck
ARM: dts: omap4: Fix aes entry
ARM: dts: omap4-droid4: Configure CPCAP battery driver
ARM: dts: dra7xx-clocks: Use DPLL_GPU for GPU clocks
ARM: dts: dra7xx-clocks: Set IVA DPLL and its output clock rates
ARM: dts: dra7xx-clocks: Set DSP DPLL and its output clock rates
ARM: dts: dra7xx-clocks: Source IPU1 functional clock from CORE DPLL
ARM: dts: omap54xx-clocks: Set IVA DPLL and its output clock rates
ARM: dts: omap44xx-clocks: Set IVA DPLL and its output clock rates
ARM: dts: omap4-droid4: Fix WLAN compatible
ARM: dts: omap4-droid4: Add isl29030 ALS/proximity sensor
Signed-off-by: Olof Johansson <[email protected]>
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https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
Allwinner H3 changes for 4.13
This tag is about bringing the EMAC support to the H3 boards.
* tag 'sunxi-dt-h3-for-4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: sun8i: h3: Enable EMAC with external PHY on Orange Pi Plus 2E
arm: sun8i: orangepi-zero: Enable dwmac-sun8i
ARM: sun8i: bananapi-m2-plus: Enable dwmac-sun8i
ARM: sun8i: orangepi-plus: Enable dwmac-sun8i
arm: sun8i: nanopi-neo: Enable dwmac-sun8i
arm: sun8i: orangepi-pc-plus: Set EMAC activity LEDs to active high
arm: sun8i: orangepi-2: Enable dwmac-sun8i
arm: sun8i: orangepi-one: Enable dwmac-sun8i
arm: sun8i: orangepi-pc: Enable dwmac-sun8i
arm: sun8i: sunxi-h3-h5: add dwmac-sun8i ethernet driver
arm: sun8i: sunxi-h3-h5: Add dt node for the syscon control module
ARM: sunxi: h3-h5: Convert R_CCU raw numbers to macros
Signed-off-by: Olof Johansson <[email protected]>
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https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
Allwinner DT changes for 4.13
The usual chunk of patches. The most notable improvements are the power
supplies improvements (battery and AC-IN), crypto support for the sun5i
family, HDMI support for the A10s, plus a lot of new things for the V3S and
the A83T.
* tag 'sunxi-dt-for-4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (47 commits)
ARM: sun6i: a31s: primo81: Enable battery power supply
ARM: sun6i: a31s: primo81: Change USB OTG to OTG mode
ARM: sun8i: a83t: Add dt node for the syscon control module
ARM: sun8i: a83t: Add device node for R_PIO
ARM: sun8i: v3s: add device nodes for DE2 display pipeline
ARM: dts: sunxi: add SoC specific compatibles for the crypto nodes
ARM: sun5i: add a cryptographic engine node
ARM: sun8i: a83t: Add device node for PRCM
ARM: dts: sun8i: h3: Add initial NanoPi M1 Plus support
ARM: dts: orange-pi-zero: add node for SPI NOR
ARM: sun7i: a20: cubietruck: Tie AXP209's USB power supply to USB PHY
ARM: sun6i: a31: hummingbird: Enable AXP221's ACIN power supply
ARM: sun4i: a10: cubieboard: Enable AXP209's ACIN power supply
ARM: sun7i: a20: bananapi-m1-plus: Enable AXP209's ACIN power supply
ARM: sun7i: a20: cubieboard2: Enable AXP209's ACIN power supply
ARM: sun7i: a20: cubieboard2: Move usb_otg node for alphabetical ordering
ARM: sun8i: a83t: cubietruck-plus: Enable SPDIF output
ARM: sun8i: a83t: cubietruck-plus: Add LED device nodes
ARM: sun8i: a83t: Add device node for SPDIF transmitter
ARM: sun8i: a83t: Add device node for DMA controller
...
Signed-off-by: Olof Johansson <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt
Amlogic 32-bit DT changes for v4.13:
- minor reorganization to support different busses
- add/use real clock controller
* tag 'amlogic-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM: dts: meson8: add and use the real clock controller
ARM: dts: meson: Extend L2 cache controller node for Meson8 and Meson8b
ARM: dts: meson8b: inherit meson.dtsi from meson8b.dtsi
ARM: dts: meson: organize devices in their corresponding busses
Signed-off-by: Olof Johansson <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into next/dt
Gemini DTS patches for v4.13, take 2:
- Add DMA controller
- Add PATA controller and SATA bridge
* tag 'gemini-v4.13-dts-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: add Gemini PATA/SATA support
ARM: dts: Add Gemini DMA controller
Signed-off-by: Olof Johansson <[email protected]>
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http://github.com/Broadcom/stblinux into next/dt
This pull request contains Broadcom ARM-based Device Tree changes for 4.13.
Note that Baruch's changes are fixes that are currently included in v4.12-rc2,
but they are also included here in order to keep this tag based off v4.12-rc1.
Please pull the following:
- Rafal adds CPU and thermal zones to the Northstar (BCM5301X) Device Tree and he
also adds the MDIO controller nodes for later use by USB PHYs
- Eric adds support for the V3D engine and Ethernet switch on the Cygnus
platforms, he also adds a set of Device Tree sources and include files for the
Raspberry Pi 3 (BCM2837) to be used with the ARM/Linux kernel,
- Jon adds CPU and thermal zones to the Northstar Plus Device Tree files
- Stefan updates the Raspberry Pi DTS files with thermal trip points and zones,
adds support for the USB OTG on the Raspberry Pi Zero which includes the
proper dwc2 configuration, a generic USB PHY and finally the enabling of the
OTG controller by including the proper DTS include file
- Gerd switches the Raspberry Pi DTS files to use the SDHOST controller (faster
than the SDHCI)
* tag 'arm-soc/for-4.13/devicetree' of http://github.com/Broadcom/stblinux:
ARM: dts: bcm2835-rpi-zero: Enable OTG mode
ARM: dts: bcm283x: Add generic USB PHY
ARM: dts: bcm283x: Add dtsi for OTG mode
ARM: dts: Cygnus: Add the ethernet switch and ethernet PHY
ARM: dts: NSP: Add Thermal Support
ARM: dts: Cygnus: Add BCM11360's V3D device
ARM: dts: BCM5301X: Specify MDIO bus in the DT
ARM: dts: BCM5301X: Add CPU thermal sensor and zone
ARM: dts: bcm283x: switch from &sdhci to &sdhost
ARM: dts: bcm283x: Add CPU thermal zone with 1 trip point
ARM: dts: Add devicetree for the Raspberry Pi 3, for arm32 (v6)
Signed-off-by: Olof Johansson <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into next/dt
UniPhier ARM SoC DT updates for v4.13
- fix W=1 build warnings
- use SPDX License Identifier
- add generic compatible string for I2C EEPROM
* tag 'uniphier-dt-v4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier:
ARM: dts: uniphier: Add generic compatible string for I2C EEPROM
ARM: dts: uniphier: use SPDX-License-Identifier
ARM: dts: uniphier: fix simple-bus unit address format error
ARM: dts: uniphier: Use - instead of @ for DT OPP entries
Signed-off-by: Olof Johansson <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into next/dt
STM32 DT updates for v4.13, round 1
Highlights:
----------
- Add stm32h743-disco board support
- Add stm32f746-disco board support
- Add stm32f769-disco board support
- Enable LTDC & simple pannel on stm32f429-eval
- Enable Watchdog on stm32f429-eval
- Enable DCMI on stm32f429-eval
- Enable STMPE1600 io expander on stm32f429-eval
- Enable OV2640 camera on stm32f429-eval
- Enable CRC on stm32f429-eval & stm32f429-disco
* tag 'stm32-dt-for-v4.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
ARM: dts: stm32: Add stm32h743i-disco board
ARM: dts: stm32: Add usart2 support on stm32h743
ARM: dts: stm32: Add usart2_pins on stm32h743
ARM: dts: stm32: enable CRC32 on stm32429i-eval board
ARM: dts: stm32: enable CRC32 on stm32429-disco board
ARM: dts: stm32: Add CRC support to stm32f429
ARM: dts: stm32: Enable OV2640 camera support of STM32F429-EVAL board
ARM: dts: stm32: Enable STMPE1600 gpio expander of STM32F429-EVAL board
ARM: dts: stm32: Enable DCMI camera interface on STM32F429-EVAL board
ARM: dts: stm32: Enable DCMI support on STM32F429 MCU
ARM: dts: stm32: Add missing reset-cells node in stm32f746
ARM: dts: stm32: Set gpio controller as interrupt controller on F4 and F7
ARM: dts: stm32: Add watchdog support for STM32F429 eval board
ARM: dts: stm32: Add watchdog support for STM32F429 SoC
ARM: dts: stm32: Enable ltdc & simple panel on stm32f429-Eval board
ARM: dts: stm32: Add ltdc support on stm32f429 MCU
ARM: dts: stm32: add stm32f769I & stm32f746 discovery board support
Signed-off-by: Olof Johansson <[email protected]>
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next/dt
Add device tree nodes for
mt7623:
- clocks
- power domain
- pmic-wrapper
- pinctrl
- i2c
- spi
- nand
- mmc
- usb
- pwm
- ethernet
- crypto engine
- infared remote control
- audio controller
- ADC
- efuse
- thermal driver
- HW random generator
mt2701:
- NOR flash
- JPEG decoder
- i2c
- audio controller
* tag 'v4.12-next-dts32' of https://github.com/mbgg/linux-mediatek: (25 commits)
arm: dts: mediatek: Add audio driver node for MT2701
arm: dts: Add Mediatek MT2701 i2c device node
arm: dts: mt2701: Add node for Mediatek JPEG Decoder
arm: dts: mt2701: add nor flash node
ARM: dts: mt2701: Add mtk-cirq node for mt2701
arm: dts: mt7623: add Sean as one of authors for mt7623.dtsi files
arm: dts: mt7623: add thermal nodes to the mt7623.dtsi file
arm: dts: mt7623: add efuse nodes to the mt7623.dtsi file
arm: dts: mt7623: add auxadc nodes to the mt7623.dtsi file
arm: dts: mt7623: add rng nodes to the mt7623.dtsi file
arm: dts: mt7623: add afe nodes to the mt7623.dtsi file
arm: dts: mt7623: add ir nodes to the mt7623.dtsi file
arm: dts: mt7623: add crypto engine nodes to the mt7623.dtsi file
arm: dts: mt7623: add ethernet nodes to the mt7623.dtsi file
arm: dts: mt7623: add pwm nodes to the mt7623.dtsi file
arm: dts: mt7623: add usb nodes to the mt7623.dtsi file
arm: dts: mt7623: add mmc nodes to the mt7623.dtsi file
arm: dts: mt7623: add nand nodes to the mt7623.dtsi file
arm: dts: mt7623: add spi nodes to the mt7623.dtsi file
arm: dts: mt7623: add i2c nodes to the mt7623.dtsi file
...
Signed-off-by: Olof Johansson <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/dt
ARM: dts: Keystone K2G ICE EVM support for v4.13
* tag 'keystone_dts_for_4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
ARM: dts: keystone: Add minimum support for K2G ICE evm
ARM: keystone: Create new binding for K2G ICE evm
ARM: dts: k2g-evm: Add unit address to memory node
ARM: dts: keystone-k2g: Remove skeleton.dtsi
Signed-off-by: Olof Johansson <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt
Samsung DeviceTree update for v4.13:
1. Add HDMI CEC to Exynos5 SoCs.
2. Minor cleanups and readability improvements.
* tag 'samsung-dt-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: Use human-friendly symbols for GIC interrupt properties
ARM: dts: exynos: Use human-friendly symbols for interrupt flags in board sources
ARM: dts: exynos: Add HDMI CEC device to Exynos5 SoC family
ARM: dts: exynos: Remove MFC reserved buffers
Signed-off-by: Olof Johansson <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
A bunch of changes including mali gpu nodes for rk3288 boards
following (and including) the new Mali Midgard binding; a lot of
improvements for the rk3228/rk3229 socs (tsadc, operating points,
usb, clock-rates, pinctrl, watchdog); finalizing the rk1108->rv1108
rename and adc buttons for the rk3288 firefly boards.
* tag 'v4.13-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: enable usb for rk3229 evb board
ARM: dts: rockchip: add usb nodes on rk322x
ARM: dts: rockchip: add adc button for Firefly
ARM: dts: rockchip: enable ARM Mali GPU on rk3288-veyron
ARM: dts: rockchip: enable ARM Mali GPU on rk3288-firefly
ARM: dts: rockchip: enable ARM Mali GPU on rk3288-rock2-som
ARM: dts: rockchip: add ARM Mali GPU node for rk3288
dt-bindings: gpu: add bindings for the ARM Mali Midgard GPU
ARM: dts: rockchip: set a sane frequence for tsadc on rk322x
ARM: dts: rockchip: add operating-points-v2 for cpu on rk322x
ARM: dts: rockchip: set default rates for core clocks on rk322x
ARM: dts: rockchip: add second uart2 pinctrl on rk322x
ARM: dts: rockchip: correct rk322x uart2 pinctrl
ARM: dts: rockchip: add watchdog device node on rk322x
clk: rockchip: add clock-ids for more rk3228 clocks
clk: rockchip: add ids for camera on rk3399
ARM: dts: rockchip: fix rk322x i2s1 pinctrl error
ARM: dts: rockchip: rename RK1108-evb to RV1108-evb
ARM: dts: rockchip: rename core dtsi from RK1108 to RV1108
ARM: dts: rockchip: Setup usb vbus-supply on rk3288-rock2
Signed-off-by: Olof Johansson <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/dt
Miscellaneous DT support updates for DA850. Includes Lego mindstorms
EV3 battery support, DMA support for MUSB, and non-critical fixes to
GPIO nodes of DA850's GPIO controller and GPIO expander available on
DA850 EVM.
* tag 'davinci-for-v4.13/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: dts: da850-evm: fix tca6416 for use with GPIO hogs
ARM: dts: da850: Add interrupt-controller property to gpio node
ARM: dts: da850: Add CPPI 4.1 DMA to USB OTG controller
ARM: dts: da850-lego-ev3: Add node for LEGO MINDSTORMS EV3 Battery
Signed-off-by: Olof Johansson <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Device tree changes for omaps for v4.13 merge window.
This adds support for am335x-boneblue. The rest of
the changes are for enabling features on various
devices with the git shortlog describing the changes.
* tag 'omap-for-v4.13/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
arm: dts: am33xx: Remove redundant interrupt-parent property
ARM: dts: bonegreen-wireless: add WL1835 Bluetooth device node
ARM: dts: AM43XX: Remove min and max voltage values for dcdc3
ARM: dts: Add am335x-boneblue
ARM: dts: twl4030: Add missing madc reference for bci subnode
ARM: dts: am43xx-clocks: Add support for CLKOUT2
ARM: dts: Configure USB host for 37xx-evm
ARM: dts: omap: Add generic compatible string for I2C EEPROM
ARM: dts: Enable earlycon stdout path for LogicPD torpedo
ARM: dts: Enable earlycon stdout path for duovero
arm: dts: boneblack-wireless: add WL1835 Bluetooth device node
ARM: dts: am571x-idk: Enable the system mailboxes 5 and 6
ARM: dts: am572x-idk: Enable the system mailboxes 5 and 6
ARM: dts: omap4-devkit8000: fix gpmc ranges property
ARM: dts: omap3: Remove 'enable-active-low' property
ARM: dts: OMAP5: uevm: add µSD card detect
ARM: dts: omap4-droid4: Add bluetooth
ARM: dts: dra7x-evm: Enable dual-role mode for USB1
ARM: dts: Use - instead of @ for DT OPP entries for TI SoCs
ARM: dts: am335x-phycore-som: fix rv4162 compatible
Signed-off-by: Olof Johansson <[email protected]>
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The MSI Primo81 tablet has a 3500 mAh 3.7V LiPo battery.
Enable the PMIC's battery power supply so the battery can be monitored.
Signed-off-by: Chen-Yu Tsai <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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Now that we have support for the AXP221 PMIC's USB VBUS detection and
DRIVEVBUS vbus control, we can use the USB OTG port in proper OTG mode.
This patch enables the aforementioned PMIC functions, adds the OTG ID
detection pin to the USB PHY node, and changes the mode of USB OTG to
"otg".
Signed-off-by: Chen-Yu Tsai <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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This patch add the dt node for the syscon register present on the
Allwinner A83T
Signed-off-by: Corentin Labbe <[email protected]>
Reviewed-by: Chen-Yu Tsai <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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Add SHAM crypto accelerator.
Signed-off-by: Tero Kristo <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
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OMAP4 has AES2 instance, so add its integration data under DT.
Signed-off-by: Tero Kristo <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
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"aes1_fck" and "aes2_fck" are controlled by hwmod. Drop clock
entries to avoid conflicts.
Signed-off-by: Sebastian Reichel <[email protected]>
Acked-by: Tero Kristo <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
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OMAP4 has a second aes module, so let's use proper name for
the first instance.
Signed-off-by: Sebastian Reichel <[email protected]>
Acked-by: Tero Kristo <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
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The NAS4229B and SQ201 Gemini systems have a PATA controller
which is linked to a SATA bridge in the SoC. Enable both
platforms to use the PATA/SATA devices.
Cc: John Feng-Hsin Chiang <[email protected]>
Cc: Greentime Hu <[email protected]>
Acked-by: Hans Ulli Kroll <[email protected]>
Signed-off-by: Linus Walleij <[email protected]>
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This adds the Faraday Technology FTDMAC020 DMA controller to
the Gemini SoC DTSI file. It is only used for memcpy work so
we can activate it for all users of the chipset.
Signed-off-by: Linus Walleij <[email protected]>
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This pull request brings in installation of the RPi3 DT in 32-bit
mode, the new thermal nodes, switches to the faster sdhost controller
for MMC, and enables USB OTG mode on the Pi 0.
Signed-off-by: Florian Fainelli <[email protected]>
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The APQ8060 Dragonboard has an Atmel AT24c128 EEPROM and a
Wolfson Micro WM8903 codec connected to its GSBI8 I2C bus.
Add entries for these to the device tree. The interrupt line
from the WM8903 chip is not routed anywhere on this design
so it can not be used.
Signed-off-by: Linus Walleij <[email protected]>
Acked-by: Bjorn Andersson <[email protected]>
Signed-off-by: Andy Gross <[email protected]>
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dtc recently added PCI bus checks. Fix these warnings.
Signed-off-by: Rob Herring <[email protected]>
Cc: Stephen Warren <[email protected]>
Cc: Thierry Reding <[email protected]>
Cc: Alexandre Courbot <[email protected]>
Cc: [email protected]
Signed-off-by: Thierry Reding <[email protected]>
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Whistler is an ancient Tegra 2 reference board. I may have been the only
person who ever used it with upstream software, and I've just recycled
the board hardware. Hence, it makes sense to remove support from software.
Signed-off-by: Stephen Warren <[email protected]>
Acked-by: Mark Brown <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
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Since 635c21068cf ("usb: dwc2: gadget: Fix WARN_ON messages
during FIFO init") the dwc2 driver is able to handle OTG and gadget
mode for bcm2835. So enable this feature for the Raspberry Pi Zero.
Signed-off-by: Stefan Wahren <[email protected]>
Signed-off-by: Eric Anholt <[email protected]>
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In order to use dwc2 in OTG or gadget mode the USB PHY should be
specified. Since there is no bcm283x USB PHY driver use the generic
one.
Signed-off-by: Stefan Wahren <[email protected]>
Acked-by: Stephen Warren <[email protected]>
Signed-off-by: Eric Anholt <[email protected]>
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The Raspberry Pi Zero also supports OTG mode. So provide a dtsi file
to configure the USB interface accordingly. The fifo sizes are optimized
for device endpoint 6 and 7 with the maximum of 768.
Signed-off-by: Stefan Wahren <[email protected]>
Signed-off-by: Eric Anholt <[email protected]>
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Cygnus has a single amac controller connected to the B53 switch with 2
PHYs. On the BCM911360_EP platform, those two PHYs are connected to the
external ethernet jacks.
Signed-off-by: Eric Anholt <[email protected]>
Reviewed-by: Florian Fainelli <[email protected]>
Signed-off-by: Florian Fainelli <[email protected]>
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Add thermal support via the ns-thermal driver and create a single
thermal zone for the entire SoC.
Signed-off-by: Jon Mason <[email protected]>
Acked-by: Eduardo Valentin <[email protected]>
Signed-off-by: Florian Fainelli <[email protected]>
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This loads the VC4 driver on the 911360_entphn platform (with the
corresponding series sent to dri-devel), which is supported by master
of the Mesa tree.
Signed-off-by: Eric Anholt <[email protected]>
Acked-by: Scott Branden <[email protected]>
Signed-off-by: Florian Fainelli <[email protected]>
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Northstar devices have MDIO bus that may contain various PHYs attached.
A common example is USB 3.0 PHY (that doesn't have an MDIO driver yet).
Signed-off-by: Rafał Miłecki <[email protected]>
Signed-off-by: Florian Fainelli <[email protected]>
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This uses CPU thermal sensor available on every Northstar chipset to
monitor temperature. We don't have any cooling or throttling so only a
critical trip was added.
Signed-off-by: Rafał Miłecki <[email protected]>
Acked-by: Jon Mason <[email protected]>
Signed-off-by: Florian Fainelli <[email protected]>
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Configure CPCAP battery driver.
Cc: [email protected]
Cc: Marcel Partap <[email protected]>
Cc: Michael Scott <[email protected]>
Reviewed-by: Sebastian Reichel <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
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The GPU has two functional clocks - GPU_CORE_GCLK and GPU_HYD_GCLK.
Both of these are mux clocks and are derived from the DPLL_CORE
H14 output clock CORE_GPU_CLK by default. These clocks can also be
be derived from DPLL_PER or DPLL_GPU.
The GPU DPLL provides the output clocks primarily for the GPU.
Configuring the GPU for different OPP clock frequencies is easier
to achieve when using the DPLL_GPU rather than the other two DPLLs
due to:
1. minimal affect on any other output clocks from these DPLLs
2. may require an impossible post-divider values on existing DPLLs
without affecting other clocks.
So, switch the GPU functional clocks to be sourced from GPU DPLL by
default. This is done using the DT standard properties "assigned-clocks"
and "assigned-clock-parents". Newer u-boots (from 2017.01 onwards) reuse
and can update these properties to choose an appropriate one-time fixed
OPP configuration as all the required ABB/AVS setup is performed within
the bootloader. Note that there is no DVFS supported for any of the
non-MPU domains. The DPLL will automatically transition into a low-power
stop mode when the associated output clocks are not utilized or gated
automatically.
This patch also sets the initial values for the DPLL_GPU outputs.
These values are chosen based on the OPP_NOM values defined as per
recommendation from design team. The DPLL locked frequency is kept
at 1277 MHz, so that the value for the divider clock, dpll_gpu_m2_ck,
can be set to 425.67 MHz for OPP_NOM.
Signed-off-by: Subhajit Paul <[email protected]>
[[email protected]: revise patch description]
Signed-off-by: Suman Anna <[email protected]>
Acked-by: Tero Kristo <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
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The IVA DPLL in DRA7xx provides the output clocks for only the IVAHD
subsystem in DRA7xx as compared to previous OMAP generations when it
provided the clocks for both DSP and IVAHD subsystems. This DPLL is
currently not configured by older bootloaders. Use the DT standard
properties "assigned-clocks" and "assigned-clock-rates" to set the
IVA DPLL clock rate and the rates for its derivative clocks at boot
time to properly initialize/lock this DPLL and be independent of the
bootloader version. Newer u-boots (from 2017.01 onwards) reuse and
can update these properties to choose an appropriate one-time fixed
OPP configuration. The DPLL will automatically transition into a
low-power stop mode when the associated output clocks are not
utilized or gated automatically.
The reset value of the divider M2 (that supplies the IVA_GFLCK, the
functional clock for the IVAHD subsystem) does not match a specific
OPP. So, the derived output clock from this IVA DPLL has to be
initialized as well to avoid initializing these divider outputs to an
incorrect frequencies.
The OPP_NOM clock frequencies are defined in the AM572x SR2.0 Data
Sheet vB, section 5.5.2 "Voltage And Core Clock Specifications". The
clock rates are chosen based on these OPP_NOM values and defined as per
a DRA7xx PLL spec document. The DPLL locked frequency is 2300 MHz, so
the dpll_iva_ck clock rate used is half of this value. The value for the
divider clock, dpll_iva_m2_ck, has to be set to 388.333334 MHz or more
for the divider clk logic to compute the appropriate divider value for
OPP_NOM.
Signed-off-by: Suman Anna <[email protected]>
Acked-by: Tero Kristo <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
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The DSP DPLL is a new DPLL compared to previous OMAP generations and
supplies the root clocks for the DSP processors, as well as a mux
input source for EVE sub-system (on applicable SoCs). This DPLL is
currently not configured by older bootloaders. Use the DT standard
properties "assigned-clocks" and "assigned-clock-rates" to set the
DSP DPLL clock rate and the rates for its derivative clocks at boot
time to properly initialize/lock this DPLL and be independent of the
bootloader version. Newer u-boots (from 2017.01 onwards) reuse and
can update these properties to choose an appropriate one-time fixed
OPP configuration. The DPLL will automatically transition into a
low-power stop mode when the associated output clocks are not
utilized or gated automatically.
The DSP DPLL provides two output clocks, DSP_GFCLK and EVE_GCLK. The
desired rate for DSP_GFCLK is 600 MHz (same as DSP DPLL CLKOUT frequency),
and is currently auto set due to the desired M2 divider value being the
same as reset value for the locked frequency of 600 MHz. The EVE_GCLK
however is required to be 400 MHz, so set the dpll_dsp_m3x2_ck's rate
explicitly so that the divider is set properly. The dpll_dsp_m2_ck rate
is also set explicitly to not rely on any implicit matching divider reset
values to the locked DPLL frequency.
The OPP_NOM clock frequencies are defined in the AM572x SR2.0 Data
Sheet vB, section 5.5.2 "Voltage And Core Clock Specifications". The
clock rates are chosen based on these OPP_NOM values and defined as per
a DRA7xx PLL spec document. The DPLL locked frequency is 1200 MHz, so
the dpll_dsp_ck clock rate used is half of this value.
Signed-off-by: Suman Anna <[email protected]>
Acked-by: Tero Kristo <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
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The IPU1 functional clock is actually the output of a mux clock,
ipu1_gfclk_mux. The mux clock is sourced by default from the
DPLL_ABE_X2_CLK, and this results in a rather odd clock frequency
(361 MHz) for the IPU1 functional clock on platforms where ABE_DPLL
is configured properly. Reconfigure the mux clock to be sourced from
CORE_IPU_ISS_BOOST_CLK (dpll_core_h22x2_ck), so that both the IPU1
and IPU2 are running from the same clock and clocked at the same
nominal frequency of 425 MHz.
This also ensures that IPU1 functional clock is always configured
properly and becomes independent of the state of the ABE DPLL on
all boards.
Signed-off-by: Suman Anna <[email protected]>
Acked-by: Tero Kristo <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
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The IVA DPLL is not an essential DPLL for the functionality of a
bootloader and is usually not configured (e.g. older u-boots configure
it only if CONFIG_SYS_CLOCKS_ENABLE_ALL is enabled and u-boots newer
than 2014.01 do not even have an option), and this results in incorrect
operating frequencies when trying to use a DSP or IVAHD, whose root
clocks are derived from this DPLL. Use the DT standard properties
"assigned-clocks" and "assigned-clock-rates" to set the IVA DPLL clock
rate and the rates for its derivative clocks at boot time to properly
initialize/lock this DPLL. The DPLL will automatically transition
into a low-power stop mode when the associated output clocks are
not utilized or gated automatically.
The reset values of the dividers H11 & H12 (functional clocks for DSP
and IVAHD respectively) are identical to each other, but are different
at each OPP. The reset values also do not match a specific OPP. So, the
derived output clocks from the IVA DPLL have to be initialized as well
to avoid initializing these divider outputs to incorrect frequencies.
The clock rates are chosen based on the OPP_NOM values as defined in
the OMAP5432 SR2.0 Data Manual Book vK, section 5.2.3.5 "DPLL_IVA
Preferred Settings". The recommended maximum DPLL locked frequency is
2330 MHz for OPP_NOM (value for DPLL_IVA_X2_CLK), so the dpll_iva_ck
clock rate used is half of this value. The value 465.92 MHz is used
instead of 465.9 MHz for dpll_iva_h11x2_ck so that proper divider
value can be calculated.
Signed-off-by: Suman Anna <[email protected]>
Acked-by: Tero Kristo <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
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The IVA DPLL is not an essential DPLL for the functionality of a
bootloader and is usually not configured (e.g. older u-boots configure
it only if CONFIG_SYS_CLOCKS_ENABLE_ALL is enabled and u-boots newer
than 2014.01 do not even have an option), and this results in incorrect
operating frequencies when trying to use a DSP or IVAHD, whose root
clocks are derived from this DPLL. Use the DT standard properties
"assigned-clocks" and "assigned-clock-rates" to set the IVA DPLL clock
rate and the rates for its derivative clocks at boot time to properly
initialize/lock this DPLL. The DPLL will automatically transition
into a low-power stop mode when the associated output clocks are
not utilized or gated automatically.
The reset values of the dividers M4 & M5 (functional clocks for DSP and
IVAHD respectively) are identical to each other, but are different at
each OPP. The reset values also do not match a specific OPP. So, the
derived output clocks from the IVA DPLL have to be initialized as well
to avoid initializing these divider outputs to incorrect frequencies.
The clock rates are chosen based on the OPP100 values as defined in the
OMAP4430 ES2.x Public TRM vAP, section "3.6.3.8.7 DPLL_IVA Preferred
Settings". The DPLL locked frequency is 1862.4 MHz (value for
DPLL_IVA_X2_CLK), so the dpll_iva_ck clock rate used is half of
this value.
Signed-off-by: Suman Anna <[email protected]>
Acked-by: Tero Kristo <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
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The Renesas Salvator-XS (Salvator-X 2nd version) development board can
be equipped with either an R-Car H3 ES2.0 or M3-W ES1.x SiP, which are
pin-compatible.
Document board part number and compatible values for the version with
R-Car H3.
Signed-off-by: Geert Uytterhoeven <[email protected]>
Signed-off-by: Simon Horman <[email protected]>
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The board part numbers for the R-Car H3 and M3 ULCB boards corresponded
to versions predating mass production. Update them for mass production.
Note that the H3 ULCB board can be equipped with either revision ES1.1
or ES2.0 of the R-Car H3 SoC. While these have different board part
numbers, no new compatible values are needed, as the revision can be
detected at runtime using the PRR register.
Signed-off-by: Geert Uytterhoeven <[email protected]>
Reviewed-by: Vladimir Barinov <[email protected]>
Acked-by: Rob Herring <[email protected]>
Signed-off-by: Simon Horman <[email protected]>
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Document the iW-RainboW-G20D-Qseven-RZG1M device tree bindings,
listing it as a supported board.
Signed-off-by: Biju Das <[email protected]>
Reviewed-by: Chris Paterson <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
Signed-off-by: Simon Horman <[email protected]>
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