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2015-12-21drm/radeon: clean up fujitsu quirksAlex Deucher1-9/+3
Combine the two quirks. bug: https://bugzilla.kernel.org/show_bug.cgi?id=109481 Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2015-12-21drm/amdgpu: Fix off-by-one errors in amdgpu_vm_bo_mapFelix Kuehling1-5/+5
eaddr is sometimes treated as the last address inside the address range, and sometimes as the first address outside the range. This was resulting in errors when a test filled up the entire address space. Make it consistent to always be the last address within the range. Signed-off-by: Felix.Kuehling <[email protected]> Reviewed-by: Christian König <[email protected]> Cc: [email protected]
2015-12-21drm/radeon: Fix off-by-one errors in radeon_vm_bo_set_addrFelix Kuehling1-6/+6
eoffset is sometimes treated as the last address inside the address range, and sometimes as the first address outside the range. This was resulting in errors when a test filled up the entire address space. Make it consistent to always be the last address within the range. Also fixed related errors when checking the VA limit and in radeon_vm_fence_pts. Signed-off-by: Felix.Kuehling <[email protected]> Reviewed-by: Christian König <[email protected]> Cc: [email protected]
2015-12-21drm/radeon: fix dp link rate selection (v2)Alex Deucher3-77/+49
Need to properly handle the max link rate in the dpcd. This prevents some cases where 5.4 Ghz is selected when it shouldn't be. v2: simplify logic, add array bounds check Reviewed-by: Tom St Denis <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-12-21drm/amdgpu: fix dp link rate selection (v2)Alex Deucher1-60/+36
Need to properly handle the max link rate in the dpcd. This prevents some cases where 5.4 Ghz is selected when it shouldn't be. v2: simplify logic, add array bounds check Reviewed-by: Tom St Denis <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-12-18drm/radeon: only increment sync_seq when a fence is really emittedNicolai Hähnle1-2/+2
In the rare situation where the kmalloc fails we're probably screwed anyway, but let's try to be more robust about it. Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Nicolai Hähnle <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-12-18drm/radeon: fix typo in cik_ring_ib_execute documentation (v2)Nicolai Hähnle1-2/+2
v2: agd: clarify commit message, fix "an" as spotted by Michel. Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Nicolai Hähnle <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-12-18drm/ttm: fix documentation of ttm_bo_reserveNicolai Hähnle1-2/+2
Previously, the comment was inconsistent. EDEADLK is what the ww_mutex mechanism really returns. Signed-off-by: Nicolai Hähnle <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-12-18drm/radeon: Update radeon_get_vblank_counter_kms()Thierry Reding1-12/+12
Commit 88e72717c2de ("drm/irq: Use unsigned int pipe in public API") updated the prototype of this function but not the implementation. This wasn't noticed even through compile tests because the prototype is part of the source file that uses it and hence the compiler won't know the prototype when it compiles the implementation. The right thing would've been to move the prototype to a header that's included in radeon_kms.c so that the implementation signature could be checked against it, but the closest thing would've been radeon_drv.h and including that results in a lot of build errors, so we'll leave it as is for now. Cc: Christian König <[email protected]> Cc: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Thierry Reding <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-12-18drm/radeon: Fixup hw vblank counter/ts for new drm_update_vblank_count() (v2)Mario Kleiner9-29/+164
commit 4dfd6486 "drm: Use vblank timestamps to guesstimate how many vblanks were missed" introduced in Linux 4.4-rc1 makes the drm core more fragile to drivers which don't update hw vblank counters and vblank timestamps in sync with firing of the vblank irq and essentially at leading edge of vblank. This exposed a problem with radeon-kms/amdgpu-kms which do not satisfy above requirements: The vblank irq fires a few scanlines before start of vblank, but programmed pageflips complete at start of vblank and vblank timestamps update at start of vblank, whereas the hw vblank counter increments only later, at start of vsync. This leads to problems like off by one errors for vblank counter updates, vblank counters apparently going backwards or vblank timestamps apparently having time going backwards. The net result is stuttering of graphics in games, or little hangs, as well as total failure of timing sensitive applications. See bug #93147 for an example of the regression on Linux 4.4-rc: https://bugs.freedesktop.org/show_bug.cgi?id=93147 This patch tries to align all above events better from the viewpoint of the drm core / of external callers to fix the problem: 1. The apparent start of vblank is shifted a few scanlines earlier, so the vblank irq now always happens after start of this extended vblank interval and thereby drm_update_vblank_count() always samples the updated vblank count and timestamp of the new vblank interval. To achieve this, the reporting of scanout positions by radeon_get_crtc_scanoutpos() now operates as if the vblank starts radeon_crtc->lb_vblank_lead_lines before the real start of the hw vblank interval. This means that the vblank timestamps which are based on these scanout positions will now update at this earlier start of vblank. 2. The driver->get_vblank_counter() function will bump the returned vblank count as read from the hw by +1 if the query happens after the shifted earlier start of the vblank, but before the real hw increment at start of vsync, so the counter appears to increment at start of vblank in sync with the timestamp update. 3. Calls from vblank irq-context and regular non-irq calls are now treated identical, always simulating the shifted vblank start, to avoid inconsistent results for queries happening from vblank irq vs. happening from drm_vblank_enable() or vblank_disable_fn(). 4. The radeon_flip_work_func will delay mmio programming a pageflip until the start of the real vblank iff it happens to execute inside the shifted earlier start of the vblank, so pageflips now also appear to execute at start of the shifted vblank, in sync with vblank counter and timestamp updates. This to avoid some races between updates of vblank count and timestamps that are used for swap scheduling and pageflip execution which could cause pageflips to execute before the scheduled target vblank. The lb_vblank_lead_lines "fudge" value is calculated as the size of the display controllers line buffer in scanlines for the given video mode: Vblank irq's are triggered by the line buffer logic when the line buffer refill for a video frame ends, ie. when the line buffer source read position enters the hw vblank. This means that a vblank irq could fire at most as many scanlines before the current reported scanout position of the crtc timing generator as the number of scanlines the line buffer can maximally hold for a given video mode. This patch has been successfully tested on a RV730 card with DCE-3 display engine and on a evergreen card with DCE-4 display engine, in single-display and dual-display configuration, with different video modes. A similar patch is needed for amdgpu-kms to fix the same problem. Limitations: - Line buffer sizes in pixels are hard-coded on < DCE-4 to a value i just guessed to be high enough to work ok, lacking info on the true sizes atm. Fixes: fdo#93147 Signed-off-by: Mario Kleiner <[email protected]> Cc: Alex Deucher <[email protected]> Cc: Michel Dänzer <[email protected]> Cc: Harry Wentland <[email protected]> Cc: Ville Syrjälä <[email protected]> (v1) Tested-by: Dave Witbrodt <[email protected]> (v2) Refine radeon_flip_work_func() for better efficiency: In radeon_flip_work_func, replace the busy waiting udelay(5) with event lock held by a more performance and energy efficient usleep_range() until at least predicted true start of hw vblank, with some slack for scheduler happiness. Release the event lock during waits to not delay other outputs in doing their stuff, as the waiting can last up to 200 usecs in some cases. Retested on DCE-3 and DCE-4 to verify it still works nicely. (v2) Signed-off-by: Mario Kleiner <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-12-18drm/radeon: Fix "slow" audio over DP on DCE8+Slava Grigorev4-0/+29
DP audio is derived from the dfs clock. Signed-off-by: Slava Grigorev <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Cc: [email protected]
2015-12-18drm/amdgpu: keep the PTs validation list in the VM v2Christian König4-47/+27
This avoids allocating it on the fly. v2: fix grammar in comment Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Chunming Zhou <[email protected]>
2015-12-18drm/amdgpu: split VM PD and PT handling during CSChristian König4-29/+51
This way we avoid the extra allocation for the page directory entry. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Chunming Zhou <[email protected]>
2015-12-18drm/amdgpu: put VM page tables directly into duplicates listChristian König4-9/+12
They share the reservation object with the page directory anyway. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Chunming Zhou <[email protected]>
2015-12-18drm/amdgpu: restrict the sched jobs number to power of twoChunming Zhou2-2/+11
Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> CC: [email protected]
2015-12-17drm/amdgpu: limit visible vram if it's smaller than the BARAlex Deucher2-0/+8
In some cases the amount of vram may be less than the BAR size, if so, limit visible vram to the amount of actual vram, not the BAR size. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-12-14drm/amdgpu: change default sched jobs to 32Chunming Zhou1-2/+2
Change the default scheduler queue size from 16 to 32. Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-12-14drm/amdgpu: unify AMDGPU_CTX_MAX_CS_PENDING and amdgpu_sched_jobsChunming Zhou2-10/+20
Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-12-14drm/amdgpu: handle error case for ctxChunming Zhou1-2/+5
Properly handle ctx init failure. Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-12-14drm/amdgpu: add entity only when first job comeChunming Zhou1-5/+8
umd somtimes will create a context for every ring, that means some entities wouldn't be used at all. Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-12-11drm/amdgpu: add more debugging output for driver failuresAlex Deucher1-16/+57
Add more fine grained debugging output for init/fini/suspend/ resume failures. Signed-off-by: Alex Deucher <[email protected]>
2015-12-11drm/amdgpu: update rev id register for VIFlora Cui1-6/+3
Change-Id: I2ae9bb4a929f7c0c8783e0be563ae04be77596e2 Signed-off-by: Flora Cui <[email protected]> Reviewed-by: Jammy Zhou <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
2015-12-11drm/amdgpu/gfx8: update PA_SC_RASTER_CONFIG:PKR_MAP onlyFlora Cui1-1/+1
Use default value as a base. Signed-off-by: Flora Cui <[email protected]> Reviewed-by: Jammy Zhou <[email protected]>
2015-12-11drm/amdgpu/gfx8: Enable interrupt on ME1_PIPE3Flora Cui1-0/+5
Otherwise FW cannot see the RLC ACK for the memory clean request It's for Stoney. Signed-off-by: Flora Cui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Jammy Zhou <[email protected]>
2015-12-04drm/amdgpu: add spin lock to protect freed list in vm (v2)jimqu2-3/+15
there is a protection fault about freed list when OCL test. add a spin lock to protect it. v2: drop changes in vm_fini Signed-off-by: JimQu <[email protected]> Reviewed-by: Christian König <[email protected]>
2015-12-04amdgpu/gfxv8: Remove magic numbers from function ↵Tom St Denis1-2/+2
gfx_v8_0_tiling_mode_table_init() Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
2015-12-04drm/amdgpu: fix race condition in amd_sched_entity_push_jobNicolai Hähnle1-2/+3
As soon as we leave the spinlock after the job has been added to the job queue, we can no longer rely on the job's data to be available. I have seen a null-pointer dereference due to sched == NULL in amd_sched_wakeup via amd_sched_entity_push_job and amd_sched_ib_submit_kernel_helper. Since the latter initializes sched_job->sched with the address of the ring scheduler, which is guaranteed to be non-NULL, this race appears to be a likely culprit. Signed-off-by: Nicolai Hähnle <[email protected]> Bugzilla: https://bugs.freedesktop.org/attachment.cgi?bugid=93079 Reviewed-by: Christian König <[email protected]>
2015-12-04drm/amdgpu: add err check for pin userptrChunming Zhou1-3/+7
Missing error check if the operation failed. Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]>
2015-12-04amdgpu/gfxv8: Simplification in gfx_v8_0_enable_gui_idle_interrupt()Tom St Denis1-11/+5
Simplified the function by folding the two paths into one. Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
2015-12-04amdgpu/gfxv8: Simplification of gfx_v8_0_create_bitmask()Tom St Denis1-7/+1
Simplification of the function gfx_v8_0_create_bitmask(). Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
2015-12-04amdgpu/gfxv8: Cleanup of gfx_v8_0_tiling_mode_table_init() (v2)Tom St Denis1-1388/+898
Simplification and LOC reduction of function gfx_v8_0_tiling_mode_table_init() v2: remove spurious break bug: https://bugs.freedesktop.org/show_bug.cgi?id=93236 Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
2015-12-02amdgpu/gfxv8: Add missing break to switch statement from states init codeTom St Denis1-0/+1
Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]>
2015-12-02drm/amd: abstract kernel rq and normal rq to priority of run queueChunming Zhou5-15/+23
Allows us to set priorities in the scheduler. Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Junwei Zhang <[email protected]>
2015-12-02drm/amdgpu: add EDC support for CZ (v3)Alex Deucher1-1/+330
This adds EDC support for CZ. EDC = Error Correction and Detection This code properly initializes the EDC hardware and resets the error counts. This is done in late_init since it requires the IB pool which is not initialized during hw_init. v2: fix the IB size as noted by Felix, fix shader pgm register programming v3: use the IB for the shaders as suggested by Christian Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-12-02drm/amd: add new gfx8 register definitions for EDCAlex Deucher1-0/+13
EDC is a RAS feature for on chip memory. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-12-02drm/radeon: Use unlocked gem unreferencingDaniel Vetter1-1/+1
For drm_gem_object_unreference callers are required to hold dev->struct_mutex, which these paths don't. Enforcing this requirement has become a bit more strict with commit ef4c6270bf2867e2f8032e9614d1a8cfc6c71663 Author: Daniel Vetter <[email protected]> Date: Thu Oct 15 09:36:25 2015 +0200 drm/gem: Check locking in drm_gem_object_unreference Cc: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Daniel Vetter <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-12-02drm/amdgpu: Use unlocked gem unreferencingDaniel Vetter1-1/+1
For drm_gem_object_unreference callers are required to hold dev->struct_mutex, which these paths don't. Enforcing this requirement has become a bit more strict with commit ef4c6270bf2867e2f8032e9614d1a8cfc6c71663 Author: Daniel Vetter <[email protected]> Date: Thu Oct 15 09:36:25 2015 +0200 drm/gem: Check locking in drm_gem_object_unreference Cc: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Daniel Vetter <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-12-02drm/amdgpu: Use new read bios from rom callbackmonk.liu1-8/+50
Read the vbios directly from the rom. In some cases, e.g., virtualization, the rom is not available via the BAR or other means. Access it directly. This is an updated version of Monks original patch which uses family specific callbacks and unifies some of the validation checking. Reviewed-by: Christian König <[email protected]> Reviewed-by: Jammy Zhou <[email protected]> Signed-off-by: Monk Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-12-02drm/amdgpu: add read_bios_from_rom callback for VI partsAlex Deucher1-0/+33
Read the vbios image directly from the rom. Reviewed-by: Jammy Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Monk Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-12-02drm/amdgpu: add read_bios_from_rom callback for CI partsAlex Deucher1-0/+32
Read the vbios image directly from the rom. Reviewed-by: Jammy Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Monk Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-12-02drm/amdgpu: add a callback for reading the bios from the rom directlyAlex Deucher1-0/+3
This is necessary when the vbios image is not directly accessible via the rom BAR or legacy vga location. Reviewed-by: Jammy Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Monk Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-12-02drm/radeon: constify radeon_asic_ring structuresJulia Lawall2-20/+20
The radeon_asic_ring structures are never modified, so declare them as const. Done with the help of Coccinelle. Reviewed-by: Christian König <[email protected]> Signed-off-by: Julia Lawall <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-12-02drm/amdgpu: use $(src) in Makefile (v2)Jammy Zhou1-4/+6
This can solve the path problem when compile amdgpu with DKMS. v2: agd: rebase on current drm-next Signed-off-by: Jammy Zhou <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-12-02drm/radeon: call hpd_irq_event on resumeAlex Deucher1-0/+1
Need to call this on resume if displays changes during suspend in order to properly be notified of changes. Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2015-12-02drm/amdgpu: call hpd_irq_event on resumeAlex Deucher1-0/+1
Need to call this on resume if displays changes during suspend in order to properly be notified of changes. Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2015-12-02drm/radeon: remove UMS supportAlex Deucher14-13506/+0
It's been deprecated behind a kconfig option for almost two years and hasn't really been supported for years before that. DDX support was dropped more than three years ago. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-12-01Merge tag 'drm-intel-next-2015-11-20-merged' of ↵Dave Airlie68-4316/+5268
git://anongit.freedesktop.org/drm-intel into drm-next drm-intel-next-2015-11-20-rebased: 4 weeks because of my vacation, so a bit more: - final bits of the typesafe register mmio functions (Ville) - power domain fix for hdmi detection (Imre) - tons of fixes and improvements to the psr code (Rodrigo) - refactoring of the dp detection code (Ander) - complete rework of the dmc loader and dc5/dc6 handling (Imre, Patrik and others) - dp compliance improvements from Shubhangi Shrivastava - stop_machine hack from Chris to fix corruptions when updating GTT ptes on bsw - lots of fifo underrun fixes from Ville - big pile of fbc fixes and improvements from Paulo - fix fbdev failures paths (Tvrtko and Lukas Wunner) - dp link training refactoring (Ander) - interruptible prepare_plane for atomic (Maarten) - basic kabylake support (Deepak&Rodrigo) - don't leak ringspace on resets (Chris) drm-intel-next-2015-10-23: - 2nd attempt at atomic watermarks from Matt, but just prep for now - fixes all over * tag 'drm-intel-next-2015-11-20-merged' of git://anongit.freedesktop.org/drm-intel: (209 commits) drm/i915: Update DRIVER_DATE to 20151120 drm/i915: take a power domain reference while checking the HDMI live status drm/i915: take a power domain ref only when needed during HDMI detect drm/i915: Tear down fbdev if initialization fails async: export current_is_async() Revert "drm/i915: Initialize HWS page address after GPU reset" drm/i915: Fix oops caused by fbdev initialization failure drm/i915: Fix i915_ggtt_view_equal to handle rotation correctly drm/i915: Stuff rotation params into view union drm/i915: Drop return value from intel_fill_fb_ggtt_view drm/i915 : Fix to remove unnecsessary checks in postclose function. drm/i915: add MISSING_CASE to a few port/aux power domain helpers drm/i915/ddi: fix intel_display_port_aux_power_domain() after HDMI detect drm/i915: Remove platform specific *_dp_detect() functions drm/i915: Don't do edp panel detection in g4x_dp_detect() drm/i915: Send TP1 TP2/3 even when panel claims no NO_TRAIN_ON_EXIT. drm/i915: PSR: Don't Skip aux handshake on DP_PSR_NO_TRAIN_ON_EXIT. drm/i915: Reduce PSR re-activation time for VLV/CHV. drm/i915: Delay first PSR activation. drm/i915: Type safe register read/write ...
2015-12-01Merge tag 'topic/drm-misc-2015-11-26' of ↵Dave Airlie78-292/+379
git://anongit.freedesktop.org/drm-intel into drm-next Here's the first drm-misc pull, with really mostly misc stuff all over. Somewhat invasive is only Ville's change to mark the arg struct for fb_create const - that might conflict with a new driver pull. So better to get in fast. * tag 'topic/drm-misc-2015-11-26' of git://anongit.freedesktop.org/drm-intel: drm/mm: use list_next_entry drm/i915: fix potential dangling else problems in for_each_ macros drm: fix potential dangling else problems in for_each_ macros drm/sysfs: Send out uevent when connector->force changes drm/atomic: Small documentation fix. drm/mm: rewrite drm_mm_for_each_hole drm/sysfs: Grab lock for edid/modes_show drm: Print the src/dst/clip rectangles in error in drm_plane_helper drm: Add "prefix" parameter to drm_rect_debug_print() drm: Keep coordinates in the typical x, y, w, h order instead of x, y, h, w drm: Pass the user drm_mode_fb_cmd2 as const to .fb_create() drm: modes: replace simple_strtoul by kstrtouint drm: Describe the Rotation property bits. drm: Remove unused fbdev_list members GPU-DRM: Delete unnecessary checks before drm_property_unreference_blob() drm/dp: add eDP DPCD backlight control bit definitions drm/tegra: Remove local fbdev emulation Kconfig option drm/imx: Remove local fbdev emulation Kconfig option drm/gem: Update/Polish docs drm: Update GEM refcounting docs
2015-11-29Linux 4.4-rc3Linus Torvalds1-1/+1
2015-11-29Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds27-993/+1093
Pull nouveau and radeon fixes from Dave Airlie: "Just some nouveau and radeon/amdgpu fixes. The nouveau fixes look large as the firmware context files are regenerated, but the actual change is quite small" * 'drm-fixes' of git://people.freedesktop.org/~airlied/linux: drm/radeon: make some dpm errors debug only drm/nouveau/volt/pwm/gk104: fix an off-by-one resulting in the voltage not being set drm/nouveau/nvif: allow userspace access to its own client object drm/nouveau/gr/gf100-: fix oops when calling zbc methods drm/nouveau/gr/gf117-: assume no PPC if NV_PGRAPH_GPC_GPM_PD_PES_TPC_ID_MASK is zero drm/nouveau/gr/gf117-: read NV_PGRAPH_GPC_GPM_PD_PES_TPC_ID_MASK from correct GPC drm/nouveau/gr/gf100-: split out per-gpc address calculation macro drm/nouveau/bios: return actual size of the buffer retrieved via _ROM drm/nouveau/instmem: protect instobj list with a spinlock drm/nouveau/pci: enable c800 magic for some unknown Samsung laptop drm/nouveau/pci: enable c800 magic for Clevo P157SM drm/radeon: make rv770_set_sw_state failures non-fatal drm/amdgpu: move dependency handling out of atomic section v2 drm/amdgpu: optimize scheduler fence handling drm/amdgpu: remove vm->mutex drm/amdgpu: add mutex for ba_va->valids/invalids drm/amdgpu: adapt vce session create interface changes drm/amdgpu: vce use multiple cache surface starting from stoney drm/amdgpu: reset vce trap interrupt flag