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2014-03-20drm/i915: Per-process stats work better when evaluated per-processChris Wilson3-9/+43
The idea of printing objects used by each process is to judge how each process is using them. This means that we need to evaluate whether the object is bound for that particular process, rather than just whether it is bound into the global GTT. v2: Restore the non-full-ppgtt path for simplicity as we may not even create vma with older hardware. v3: Tweak handling of global entries and default context entries. Signed-off-by: Chris Wilson <[email protected]> Cc: Ben Widawsky <[email protected]> Reviewed-by: Ben Widawsky <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2014-03-20drm/i915: remove rps local variablesBen Widawsky2-43/+33
With the renamed RPS struct members, it's easier to skip the local variables which no longer clarify anything, and if anything just make the code harder to read. The real motivation for this patch is actually the next patch, which attempts to consolidate some of the functionality. Cc: Jeff McGee <[email protected]> Signed-off-by: Ben Widawsky <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2014-03-20drm/i915: Remove extraneous MMIO for RPSBen Widawsky1-12/+9
The values created at initialization must always exist to use the interface. Reading them again is confusing, and pointless. More cleanups are coming in the next patch. Since I am not 100% certain, moreover on BYT, (though I am extremely close to that) that there is no need to leave the MMIO here, I wanted to make it a separate patch for the bisectable 'just-in-case' Signed-off-by: Ben Widawsky <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2014-03-20drm/i915: Rename and comment all the RPS *stuff*Ben Widawsky5-107/+120
The names of the struct members for RPS are stupid. Every time I need to do anything in this code I have to spend a significant amount of time to remember what it all means. By renaming the variables (and adding the comments) I hope to clear up the situation. Indeed doing this make some upcoming patches more readable. I've avoided ILK because it's possible that the naming used for Ironlake matches what is in the docs. I believe the ILK power docs were never published, and I am too lazy to dig them up. v2: leave rp0, and rp1 in the names. It is useful to have these limits available at times. min_freq and max_freq (which may be equal to rp0, or rp1 depending on the platform) represent the actual HW min and max. Cc: Chris Wilson <[email protected]> Signed-off-by: Ben Widawsky <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2014-03-20drm/i915: Store the HW min frequency as min_freqBen Widawsky2-1/+2
this leaves a temporarily awkward min_delay (the soft limit) with the new min_freq (the hardware limit). It's fixed in the next patch. Signed-off-by: Ben Widawsky <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2014-03-20drm/i915: Fix coding style for RPSBen Widawsky1-10/+10
Introduced: commit b8a5ff8d7c676a04e0da5ec16bb068dd39459042 Author: Jeff McGee <[email protected]> Date: Tue Feb 4 11:37:01 2014 -0600 drm/i915: Update rps interrupt limits Cc: Jeff McGee <[email protected]> Signed-off-by: Ben Widawsky <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2014-03-20drm/i915: Reorganize the overclock codeBen Widawsky1-11/+9
The existing code (which I changed last) was very convoluted. I believe it was attempting to skip the overclock portion if the previous pcode write failed. When I last touched the code, I was preserving this behavior. There is some benefit to doing it that way in that if the first pcode access fails, the later is likely invalid. Having a bit more confidence in my understanding of how things work, I now feel it's better to have clear, readable, code than to try to skip over this one operation in an unusual case. Signed-off-by: Ben Widawsky <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2014-03-20MIPS: Make local_irq_disable macro safe for non-Mipsr2Jim Quinlan1-0/+11
For non-mipsr2 processors, the local_irq_disable contains an mfc0-mtc0 pair with instructions inbetween. With preemption enabled, this sequence may get preempted and effect a stale value of CP0_STATUS when executing the mtc0 instruction. This commit avoids this scenario by incrementing the preempt count before the mfc0 and decrementing it after the mtc9. [[email protected]: This patch is sorting out the part that were missed by e97c5b6098 [MIPS: Make irqflags.h functions preempt-safe for non-mipsr2 cpus.] I also re-enabled the inclusion of <asm/asm-offsets.h> at the top of <asm/asmmacro.h>]. Signed-off-by: Jim Quinlan <[email protected]> Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/6164/ Signed-off-by: Ralf Baechle <[email protected]>
2014-03-20Merge branch 'exynos-drm-fixes' of ↵Dave Airlie1-3/+7
git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-fixes Just fixed resource release issue at open fail. * 'exynos-drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos: drm/exynos: Fix (more) freeing issues in exynos_drm_drv.c
2014-03-20drm/exynos: Fix (more) freeing issues in exynos_drm_drv.cDaniel Kurtz1-3/+7
The following commit [0] fixed a use-after-free, but left the subdrv open in the error path. [0] commit 6ca605f7c70895a35737435f17ae9cc5e36f1466 drm/exynos: Fix freeing issues in exynos_drm_drv.c Signed-off-by: Daniel Kurtz <[email protected]> Acked-by: Sachin Kamat <[email protected]> Signed-off-by: Inki Dae <[email protected]>
2014-03-19mm: fix bad rss-counter if remap_file_pages raced migrationHugh Dickins1-6/+22
Fix some "Bad rss-counter state" reports on exit, arising from the interaction between page migration and remap_file_pages(): zap_pte() must count a migration entry when zapping it. And yes, it is possible (though very unusual) to find an anon page or swap entry in a VM_SHARED nonlinear mapping: coming from that horrid get_user_pages(write, force) case which COWs even in a shared mapping. Signed-off-by: Hugh Dickins <[email protected]> Tested-by: Sasha Levin [email protected]> Tested-by: Dave Jones [email protected]> Cc: Cyrill Gorcunov <[email protected]> Cc: Andrew Morton <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
2014-03-19Merge tag 'pci-v3.14-fixes-3' of ↵Linus Torvalds1-19/+1
git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI resource management fix from Bjorn Helgaas: "This is a fix for an AGP regression exposed by e501b3d87f00 ("agp: Support 64-bit APBASE"), which we merged in v3.14-rc1. We've warned about the conflict between the GART and PCI resources and cleared out the PCI resource for a long time, but after e501b3d87f00, we still *use* that cleared-out PCI resource. I think the GART resource is incorrect, so this patch removes it" * tag 'pci-v3.14-fixes-3' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: Revert "[PATCH] Insert GART region into resource map"
2014-03-19Merge branch 'for-3.14-fixes' of ↵Linus Torvalds1-4/+7
git://git.kernel.org/pub/scm/linux/kernel/git/tj/cgroup Pull cgroup fix from Tejun Heo: "One really late cgroup patch to fix error path in create_css(). Hitting this bug would be pretty rare but still possible and it gets delayed we'd need to backport it through -stable anyway. It only updates error path in create_css() and has low chance of new breakages" * 'for-3.14-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/cgroup: cgroup: fix a failure path in create_css()
2014-03-19MIPS: Octeon: Fix warning in of_device_alloc on cn3xxxAndreas Herrmann1-10/+12
Starting with commit 3da5278727a895d49a601f67fd49dffa0b80f9a5 (of/irq: Rework of_irq_count()) the following warning is triggered on octeon cn3xxx: [ 0.887281] WARNING: CPU: 0 PID: 1 at drivers/of/platform.c:171 of_device_alloc+0x228/0x230() [ 0.895642] Modules linked in: [ 0.898689] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.14.0-rc7-00012-g9ae51f2-dirty #41 [ 0.906860] Stack : c8b439581166d96e ffffffff816b0000 0000000040808000 ffffffff81185ddc [ 0.906860] 0000000000000000 0000000000000000 0000000000000000 000000000000000b [ 0.906860] 000000000000000a 000000000000000a 0000000000000000 0000000000000000 [ 0.906860] ffffffff81740000 ffffffff81720000 ffffffff81615900 ffffffff816b0177 [ 0.906860] ffffffff81727d10 800000041f868fb0 0000000000000001 0000000000000000 [ 0.906860] 0000000000000000 0000000000000038 0000000000000001 ffffffff81568484 [ 0.906860] 800000041f86faa8 ffffffff81145ddc 0000000000000000 ffffffff811873f4 [ 0.906860] 800000041f868b88 800000041f86f9c0 0000000000000000 ffffffff81569c9c [ 0.906860] 0000000000000000 0000000000000000 0000000000000000 0000000000000000 [ 0.906860] 0000000000000000 ffffffff811205e0 0000000000000000 0000000000000000 [ 0.906860] ... [ 0.971695] Call Trace: [ 0.974139] [<ffffffff811205e0>] show_stack+0x68/0x80 [ 0.979183] [<ffffffff81569c9c>] dump_stack+0x8c/0xe0 [ 0.984196] [<ffffffff81145efc>] warn_slowpath_common+0x84/0xb8 [ 0.990110] [<ffffffff81436888>] of_device_alloc+0x228/0x230 [ 0.995726] [<ffffffff814368d8>] of_platform_device_create_pdata+0x48/0xd0 [ 1.002593] [<ffffffff81436a94>] of_platform_bus_create+0x134/0x1e8 [ 1.008837] [<ffffffff81436af8>] of_platform_bus_create+0x198/0x1e8 [ 1.015064] [<ffffffff81436cc4>] of_platform_bus_probe+0xa4/0x100 [ 1.021149] [<ffffffff81100570>] do_one_initcall+0xd8/0x128 [ 1.026701] [<ffffffff816e2a10>] kernel_init_freeable+0x144/0x210 [ 1.032753] [<ffffffff81564bc4>] kernel_init+0x14/0x110 [ 1.037973] [<ffffffff8111bb44>] ret_from_kernel_thread+0x14/0x1c With this commit the kernel starts mapping the interrupts listed for gpio-controller node. irq_domain_ops for CIU (octeon_irq_ciu_map and octeon_irq_ciu_xlat) refuse to handle the GPIO lines (returning -EINVAL) and this is causing above warning in of_device_alloc(). Modify irq_domain_ops for CIU and CIU2 to "gracefully handle" GPIO lines (neither return error code nor call octeon_irq_set_ciu_mapping for it). This should avoid the warning. (As before the real setup for GPIO lines will happen using irq_domain_ops of gpio-controller.) This patch is based on Wei's patch v2 (see http://marc.info/?l=linux-mips&m=139511814813247). Signed-off-by: Andreas Herrmann <[email protected]> Reported-by: Yang Wei <[email protected]> Acked-by: David Daney <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/6624/ Signed-off-by: Ralf Baechle <[email protected]>
2014-03-19MIPS: ftrace: Tweak safe_load()/safe_store() macrosViller Hsiao1-10/+10
Due to name collision in ftrace safe_load and safe_store macros, these macros cannot take expressions as operands. For example, compiler will complain for a macro call like the following: safe_store_code(new_code2, ip + 4, faulted); arch/mips/include/asm/ftrace.h:61:6: note: in definition of macro 'safe_store' : [dst] "r" (dst), [src] "r" (src)\ ^ arch/mips/kernel/ftrace.c:118:2: note: in expansion of macro 'safe_store_code' safe_store_code(new_code2, ip + 4, faulted); ^ arch/mips/kernel/ftrace.c:118:32: error: undefined named operand 'ip + 4' safe_store_code(new_code2, ip + 4, faulted); ^ arch/mips/include/asm/ftrace.h:61:6: note: in definition of macro 'safe_store' : [dst] "r" (dst), [src] "r" (src)\ ^ arch/mips/kernel/ftrace.c:118:2: note: in expansion of macro 'safe_store_code' safe_store_code(new_code2, ip + 4, faulted); ^ This build error is triggered by a4671094 [MIPS: ftrace: Fix icache flush range error]. Tweak variable naming in those macros to allow flexible operands. Signed-off-by: Viller Hsiao <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/6622/ Signed-off-by: Ralf Baechle <[email protected]>
2014-03-20Merge tag 'drm-intel-fixes-2014-03-19' of ↵Dave Airlie3-1/+17
git://anongit.freedesktop.org/drm-intel into drm-fixes two more fixes, both regressions. * tag 'drm-intel-fixes-2014-03-19' of git://anongit.freedesktop.org/drm-intel: drm/i915: Disable stolen memory when DMAR is active Revert "drm/i915: don't touch the VDD when disabling the panel"
2014-03-19via-rhine: Disable device in error pathRoger Luethi1-3/+5
Currently, via-rhine fails to call pci_disable_device() for errors in rhine_init_one(). Reported-by: Huqiu Liu <[email protected]> Signed-off-by: Roger Luethi <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2014-03-19Merge branch 'timers-urgent-for-linus' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull timer fix from Thomas Gleixner: "A single bugfix: make the scheduler clock on Vybrid SoCs count forward" * 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: clocksource: vf_pit_timer: use complement for sched_clock reading
2014-03-19drm/i915: init pm.suspended earlierPaulo Zanoni1-2/+1
Function intel_init_runtime_pm is supposed to start allowing runtime PM from that point, but it's called very late on the driver initialization code, to prevent the driver from trying to suspend while still initializing. The problem is that variables are accessed earlier than that, so initalize them at intel_pm_setup, which is supposed to be the correct place. Notice that this shouldn't fix any specific bugs because dev_priv is zeroed when allocated, so the value is already correct right from the start. v2: - Rebase. Reviewed-by: Jesse Barnes <[email protected]> Signed-off-by: Paulo Zanoni <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2014-03-19drm/i915: update the PC8 and runtime PM documentationPaulo Zanoni2-40/+35
Now that PC8 got much simpler, there are less things to document. Also, runtime PM already has a nice documentation, so we don't need to re-explain it on our driver. v2: - Rebase. - Fix typo (Jesse). Reviewed-by: Jesse Barnes <[email protected]> Signed-off-by: Paulo Zanoni <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2014-03-19drm/i915: rename __hsw_do_{en, dis}able_pc8Paulo Zanoni3-6/+6
After we removed all the intermediate abstractions, we can rename these functions to just hsw_{en,dis}able_pc8. v2: - Rebase. Reviewed-by: Jesse Barnes <[email protected]> Signed-off-by: Paulo Zanoni <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2014-03-19drm/i915: kill struct i915_package_c8Paulo Zanoni3-9/+0
The only remaining field of the struct was the lock, which was useless. v2: - Rebase. Reviewed-by: Jesse Barnes <[email protected]> Signed-off-by: Paulo Zanoni <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2014-03-19drm/i915: move pc8.irqs_disabled to pm.irqs_disabledPaulo Zanoni7-41/+42
When other platforms add runtime PM support they will also need to disable interrupts, so move the variable to the runtime PM struct. Also notice that the longer-term goal is to completely kill the regsave struct, and I even have patches for that. v2: - Rebase. v3: - Rebase. Reviewed-by: Jesse Barnes <[email protected]> Signed-off-by: Paulo Zanoni <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2014-03-19drm/i915: remove dev_priv->pc8.enabledPaulo Zanoni4-9/+0
It was just being used on debugfs and on a WARN inside hsw_set_power_well. But now that we PC8 is part of runtime PM and we get/put runtime PM when we get/put any power domain, we shouldn't need the WARN anymore. v2: - Rebase. v3: - Rebase. Reviewed-by: Jesse Barnes <[email protected]> Signed-off-by: Paulo Zanoni <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2014-03-19drm/i915: don't get/put PC8 when getting/putting power wellsPaulo Zanoni3-24/+0
Because we already get/put runtime PM every time we get/put any power domain, and now PC8 and runtime PM are the same thing. With this, we can also now kill the hsw_{en,dis}able_package_c8 functions. v2: - Rebase. v3: - Rebase. v4: - Rebase. Reviewed-by: Jesse Barnes <[email protected]> Signed-off-by: Paulo Zanoni <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2014-03-19drm/i915: make intel_aux_display_runtime_get get runtime PM, not PC8Paulo Zanoni1-3/+2
Because we merged the PC8 and runtime PM features, so calling intel_runtime_pm_get now has the same meaning, and we plan to just remove hsw_disable_package_c8 for this exact reason. My first patch tried to completely kill intel_aux_display_runtime_get/put, because I was assuming that whoever needed more than just runtime PM would have to get the appropriate power domain instead of that, but it seems some people still want the intel_aux_display_runtime_get abstraction, so keep it until someone else tries to replace it with the more-standard power domain calls. Signed-off-by: Paulo Zanoni <[email protected]> Reviewed-by: Imre Deak <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2014-03-19drm/i915: don't get/put PC8 reference on freeze/thawPaulo Zanoni1-5/+0
We already get runtime PM references, and PC8 is now part of runtime PM, so this is enough. v2: - Rebase. Reviewed-by: Jesse Barnes <[email protected]> Signed-off-by: Paulo Zanoni <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2014-03-19drm/i915: remove an indirection level on PC8 functionsPaulo Zanoni1-14/+2
After the latest changes, the indirection is useless. Reviewed-by: Jesse Barnes <[email protected]> Signed-off-by: Paulo Zanoni <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2014-03-19drm/i915: kill pc8.disable_countPaulo Zanoni4-17/+0
Since after the latest patches it's only being used to prevent getting/putting the runtime PM refcount. Reviewed-by: Jesse Barnes <[email protected]> Signed-off-by: Paulo Zanoni <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2014-03-19drm/i915: get runtime PM references when the GPU is idle/busyPaulo Zanoni1-2/+2
... instead of PC8 references. Now that both are the same thing and we are killing PC8, just get the runtime PM reference. Reviewed-by: Jesse Barnes <[email protected]> Signed-off-by: Paulo Zanoni <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2014-03-19drm/i915: remove dev_priv->pc8.requirements_metPaulo Zanoni4-59/+3
The requirements_met variable was used to track two things: enabled CRTCs and the power well. After the latest chagnes, we get a runtime PM reference whenever we get any of the power domains, and we get power domains when we enable CRTCs or the power well, so we should already be covered, not needing this specific tracking. v2: - Rebase. v3: - Rebase. Signed-off-by: Paulo Zanoni <[email protected]> Reviewed-by: Imre Deak <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2014-03-19drm/i915: get/put runtime PM when we get/put a power domainPaulo Zanoni1-0/+4
Any power domain will require the HW to be in PCI D0 state, so just do the simple thing. Dear maintainer: since intel_display_power_put() and intel_display_power_get() are almost identical, git-am has failed apply the patch on my local machine once: it added both chunks to put(), instead of one chunk to get() and another to put(). When you apply this patch to your tree, please check if it is correct. v2: - Add the warning above. v3: - Rebase. Reviewed-by: Imre Deak <[email protected]> Signed-off-by: Paulo Zanoni <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2014-03-19drm/i915: make PC8 be part of runtime PM suspend/resumePaulo Zanoni7-53/+43
Currently, when our driver becomes idle for i915.pc8_timeout (default: 5s) we enable PC8, so we save some power, but not everything we can. Then, while PC8 is enabled, if we stay idle for more autosuspend_delay_ms (default: 10s) we'll enter runtime PM and put the graphics device in D3 state, saving even more power. The two features are separate things with increasing levels of power savings, but if we disable PC8 we'll never get into D3. While from the modularity point of view it would be nice to keep these features as separate, we have reasons to merge them: - We are not aware of anybody wanting a "PC8 without D3" environment. - If we keep both features as separate, we'll have to to test both PC8 and PC8+D3 code paths. We're already having a major pain to make QA do automated testing of just one thing, testing both paths will cost even more. - Only Haswell+ supports PC8, so if we want to add runtime PM support to, for example, IVB, we'll have to copy some code from the PC8 feature to runtime PM, so merging both features as a single thing will make it easier for enabling runtime PM on other platforms. This patch only does the very basic steps required to have PC8 and runtime PM merged on a single feature: the next patches will take care of cleaning up everything. v2: - Rebase. v3: - Rebase. - Fully remove the deprecated i915 params since Daniel doesn't consider them as part of the ABI. v4: - Rebase. - Fix typo in the commit message. v5: - Rebase, again. - Add a huge comment explaining the different forcewake usage (Chris, Daniel). - Use open-coded forcewake functions (Daniel). Signed-off-by: Paulo Zanoni <[email protected]> Reviewed-by: Imre Deak <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2014-03-19drm/i915: extract __hsw_do_{en, dis}able_package_c8Paulo Zanoni1-26/+38
When we merge PC8 and runtime PM, these new functions are going to be called by the runtime suspend/resume functions, and their callers are going to be removed. v2: - Rebase Reviewed-by: Imre Deak <[email protected]> (v1) Signed-off-by: Paulo Zanoni <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2014-03-19Merge branch 'topic/dp-aux-rework' into drm-intel-next-queuedDaniel Vetter252-4231/+7837
Conflicts: drivers/gpu/drm/i915/intel_dp.c A bit a mess with reverts which differe in details between -fixes and -next and some other unrelated shuffling. Signed-off-by: Daniel Vetter <[email protected]>
2014-03-19ALSA: compress: Pass through return value of open ops callbackCharles Keepax1-1/+1
The snd_compr_open function would always return 0 even if the compressed ops open function failed, obviously this is incorrect. Looks like this was introduced by a small typo in: commit a0830dbd4e42b38aefdf3fb61ba5019a1a99ea85 ALSA: Add a reference counter to card instance This patch returns the value from the compressed op as it should. Signed-off-by: Charles Keepax <[email protected]> Acked-by: Vinod Koul <[email protected]> Cc: <[email protected]> Signed-off-by: Takashi Iwai <[email protected]>
2014-03-19drm/i915: Rename similar plane functions to avoid confusionMatt Roper2-27/+36
The name 'update_plane' was used both for the primary plane functions in intel_display.c and the sprite/overlay functions in intel_sprite.c. Rename the primary plane functions to 'update_primary_plane' to avoid confusion. On a similar note, intel_display.c already had a function called intel_disable_primary_plane() that programs the hardware to disable a pipe's primary plane. When we hook up primary planes through the DRM plane interface, one of the natural handler names will be intel_primary_plane_disable(), which is very similar. To avoid confusion, rename the existing intel_disable_primary_plane() to intel_disable_primary_hw_plane() to make the two names a little more distinct. Cc: Intel Graphics Development <[email protected]> Signed-off-by: Matt Roper <[email protected]> [danvet: Fix up conflicts.] Signed-off-by: Daniel Vetter <[email protected]>
2014-03-19drm/i915/vlv: no MCHBAR on VLVJesse Barnes1-0/+3
So don't try to allocate and program it, we're only fooling ourselves. Reported-by: "Chang, Junxiao" <[email protected]> Signed-off-by: Jesse Barnes <[email protected]> Reviewed-by: Junxiao Chang <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2014-03-19drm/i915/bdw: Restore PPAT on thawBen Widawsky1-1/+5
Apparently it is wiped out from under us, and we get some really fun caching artifacts upon resume (it seems to be WB for all types by default). Reported-by: James Ausmus <[email protected]> Signed-off-by: Ben Widawsky <[email protected]> Tested-by: James Ausmus <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76113 Tested-by: Timo Aaltonen <[email protected]> Cc: [email protected] Signed-off-by: Daniel Vetter <[email protected]>
2014-03-19MIPS: BCM47XX: Check all (32) GPIOs when looking for a pinRafał Miłecki1-1/+1
Broadcom boards support 32 GPIOs and NVRAM may have entires for higher ones too. Example: gpio23=wombo_reset Signed-off-by: Rafa? Mi?ecki <[email protected]> Acked-by: Hauke Mehrtens <[email protected]> Cc: [email protected] Cc: Rafał Miłecki <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/6547/ Signed-off-by: Ralf Baechle <[email protected]>
2014-03-19drm/i915: Disable stolen memory when DMAR is activeChris Wilson1-0/+7
We have reports of heavy screen corruption if we try to use the stolen memory reserved by the BIOS whilst the DMA-Remapper is active. This quirk may be only specific to a few machines or BIOSes, but first lets apply the big hammer and always disable use of stolen memory when DMAR is active. v2 by Jani: Rebase on -fixes, only look at intel_iommu_gfx_mapped. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68535 Signed-off-by: Chris Wilson <[email protected]> Reviewed-by: Daniel Vetter <[email protected]> Cc: [email protected] Signed-off-by: Jani Nikula <[email protected]>
2014-03-19Revert "drm/i915: don't touch the VDD when disabling the panel"Jani Nikula2-1/+10
This reverts commit dff392dbd258381a6c3164f38420593f2d291e3b Author: Paulo Zanoni <[email protected]> Date: Fri Dec 6 17:32:41 2013 -0200 drm/i915: don't touch the VDD when disabling the panel which didn't take into account commit 6cb49835da0426f69a2931bc2a0a8156344b0e41 Author: Daniel Vetter <[email protected]> Date: Sun May 20 17:14:50 2012 +0200 drm/i915: enable vdd when switching off the eDP panel and commit 35a38556d900b9cb5dfa2529c93944b847f8a8a4 Author: Daniel Vetter <[email protected]> Date: Sun Aug 12 22:17:14 2012 +0200 drm/i915: reorder edp disabling to fix ivb MacBook Air Unsurprisingly, various MacBooks failed. Effectively the same has already been done in drm-intel-next-queued. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74628 Tested-by: Patrik Jakobsson <[email protected]> Cc: Paulo Zanoni <[email protected]> Acked-by: Daniel Vetter <[email protected]> Signed-off-by: Jani Nikula <[email protected]>
2014-03-19drm/i915: Do not dereference pointers from ring buffer in evict eventSteven Rostedt1-1/+3
The TP_printk() should never dereference any pointers, because the ring buffer can be read at some unknown time in the future. If a device no longer exists, it can cause a kernel oops. This also makes this event useless when saving the ring buffer in userspaces tools such as perf and trace-cmd. The i915_gem_evict_vm dereferences the vm pointer which may also not exist when the ring buffer is read sometime in the future. Link: http://lkml.kernel.org/r/[email protected] Reported-by: Ramkumar Ramachandra <[email protected]> Cc: [email protected] # 3.13+ Fixes: bcccff847d1f "drm/i915: trace vm eviction instead of everything" Signed-off-by: Steven Rostedt <[email protected]> [danvet: Try to make it actually compile] Signed-off-by: Daniel Vetter <[email protected]>
2014-03-18cgroup: fix a failure path in create_css()Li Zefan1-4/+7
If online_css() fails, we should remove cgroup files belonging to css->ss. Signed-off-by: Li Zefan <[email protected]> Signed-off-by: Tejun Heo <[email protected]>
2014-03-18Revert "[PATCH] Insert GART region into resource map"Bjorn Helgaas1-19/+1
This reverts commit 56dd669a138c, which makes the GART visible in /proc/iomem. This fixes a regression: e501b3d87f00 ("agp: Support 64-bit APBASE") exposed an existing problem with a conflict between the GART region and a PCI BAR region. The GART addresses are bus addresses, not CPU addresses, and therefore should not be inserted in iomem_resource. On many machines, the GART region is addressable by the CPU as well as by an AGP master, but CPU addressability is not required by the spec. On some of these machines, the GART is mapped by a PCI BAR, and in that case, the PCI core automatically inserts it into iomem_resource, just as it does for all BARs. Inserting it here means we'll have a conflict if the PCI core later tries to claim the GART region, so let's drop the insertion here. The conflict indirectly causes X failures, as reported by Jouni in the bugzilla below. We detected the conflict even before e501b3d87f00, but after it the AGP code (fix_northbridge()) uses the PCI resource (which is zeroed because of the conflict) instead of reading the BAR again. Conflicts: arch/x86_64/kernel/aperture.c Fixes: e501b3d87f00 agp: Support 64-bit APBASE Link: https://bugzilla.kernel.org/show_bug.cgi?id=72201 Reported-and-tested-by: Jouni Mettälä <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2014-03-18ATHEROS-ATL1E: Convert iounmap to pci_iounmapPeter Senna Tschudin1-2/+2
Use pci_iounmap instead of iounmap when the virtual mapping was done with pci_iomap. A simplified version of the semantic patch that finds this issue is as follows: (http://coccinelle.lip6.fr/) // <smpl> @r@ expression addr; @@ addr = pci_iomap(...) @rr@ expression r.addr; @@ * iounmap(addr) // </smpl> Signed-off-by: Peter Senna Tschudin <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2014-03-18vxlan: fix potential NULL dereference in arp_reduce()David Stevens1-0/+3
This patch fixes a NULL pointer dereference in the event of an skb allocation failure in arp_reduce(). Signed-Off-By: David L Stevens <[email protected]> Acked-by: Cong Wang <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2014-03-18Merge branch 'cnic-net'David S. Miller8-122/+138
Michael Chan says: ==================== cnic bug fixes for net-next Michael Chan (3): cnic: Use proper ulp_ops for per device operations. cnic,bnx2i,bnx2fc: Fix inconsistent use of page size cnic: Update version to 2.5.20 and copyright year. ==================== Signed-off-by: David S. Miller <[email protected]>
2014-03-18cnic: Update version to 2.5.20 and copyright year.Michael Chan4-6/+6
Signed-off-by: Michael Chan <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2014-03-18cnic,bnx2i,bnx2fc: Fix inconsistent use of page sizeMichael Chan6-114/+129
The bnx2/bnx2x rings are made up of linked pages. However there is an upper limit on the page size as some the page size settings are 16-bit in the hardware/firmware interface. In the current code, some parts use BNX2_PAGE_SIZE which has a 16K upper limit and some parts use PAGE_SIZE. On archs with >= 64K PAGE_SIZE, it generates some compile warnings. Define a new CNIC_PAGE_SZIE which has an upper limit of 16K and use it consistently in all relevant parts. Signed-off-by: Michael Chan <[email protected]> Signed-off-by: Eddie Wai <[email protected]> Signed-off-by: David S. Miller <[email protected]>
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